2 * FreeRTOS Kernel V10.1.1
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3 * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 /*-----------------------------------------------------------
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29 * Implementation of functions defined in portable.h for the ST STR75x ARM7
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31 *----------------------------------------------------------*/
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33 /* Library includes. */
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35 #include "75x_eic.h"
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37 /* Scheduler includes. */
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38 #include "FreeRTOS.h"
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41 /* Constants required to setup the initial stack. */
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42 #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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43 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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45 /* Constants required to handle critical sections. */
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46 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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48 /* Prescale used on the timer clock when calculating the tick period. */
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49 #define portPRESCALE 20
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52 /*-----------------------------------------------------------*/
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54 /* Setup the TB to generate the tick interrupts. */
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55 static void prvSetupTimerInterrupt( void );
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57 /* ulCriticalNesting will get set to zero when the first task starts. It
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58 cannot be initialised to 0 as this will cause interrupts to be enabled
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59 during the kernel initialisation process. */
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60 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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62 /* Tick interrupt routines for preemptive operation. */
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63 __arm void vPortPreemptiveTick( void );
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65 /*-----------------------------------------------------------*/
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68 * Initialise the stack of a task to look exactly as if a call to
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69 * portSAVE_CONTEXT had been called.
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71 * See header file for description.
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73 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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75 StackType_t *pxOriginalTOS;
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77 pxOriginalTOS = pxTopOfStack;
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79 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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80 is not really required. */
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83 /* Setup the initial stack of the task. The stack is set exactly as
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84 expected by the portRESTORE_CONTEXT() macro. */
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86 /* First on the stack is the return address - which in this case is the
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87 start of the task. The offset is added to make the return address appear
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88 as it would within an IRQ ISR. */
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89 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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92 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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94 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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96 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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98 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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100 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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102 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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104 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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106 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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108 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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110 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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112 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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114 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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116 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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118 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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121 /* When the task starts is will expect to find the function parameter in
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123 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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126 /* The status register is set for system mode, with interrupts enabled. */
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127 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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130 /* Interrupt flags cannot always be stored on the stack and will
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131 instead be stored in a variable, which is then saved as part of the
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133 *pxTopOfStack = portNO_CRITICAL_NESTING;
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135 return pxTopOfStack;
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137 /*-----------------------------------------------------------*/
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139 BaseType_t xPortStartScheduler( void )
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141 extern void vPortStartFirstTask( void );
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143 /* Start the timer that generates the tick ISR. Interrupts are disabled
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145 prvSetupTimerInterrupt();
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147 /* Start the first task. */
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148 vPortStartFirstTask();
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150 /* Should not get here! */
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153 /*-----------------------------------------------------------*/
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155 void vPortEndScheduler( void )
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157 /* It is unlikely that the ARM port will require this function as there
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158 is nothing to return to. */
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160 /*-----------------------------------------------------------*/
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162 __arm void vPortPreemptiveTick( void )
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164 /* Increment the tick counter. */
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165 if( xTaskIncrementTick() != pdFALSE )
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167 /* Select a new task to execute. */
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168 vTaskSwitchContext();
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171 TB_ClearITPendingBit( TB_IT_Update );
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173 /*-----------------------------------------------------------*/
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175 static void prvSetupTimerInterrupt( void )
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177 EIC_IRQInitTypeDef EIC_IRQInitStructure;
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178 TB_InitTypeDef TB_InitStructure;
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180 /* Setup the EIC for the TB. */
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181 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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182 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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183 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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184 EIC_IRQInit(&EIC_IRQInitStructure);
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186 /* Setup the TB for the generation of the tick interrupt. */
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187 TB_InitStructure.TB_Mode = TB_Mode_Timing;
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188 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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189 TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
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190 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
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191 TB_Init(&TB_InitStructure);
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193 /* Enable TB Update interrupt */
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194 TB_ITConfig(TB_IT_Update, ENABLE);
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196 /* Clear TB Update interrupt pending bit */
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197 TB_ClearITPendingBit(TB_IT_Update);
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202 /*-----------------------------------------------------------*/
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204 __arm __interwork void vPortEnterCritical( void )
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206 /* Disable interrupts first! */
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207 __disable_interrupt();
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209 /* Now interrupts are disabled ulCriticalNesting can be accessed
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210 directly. Increment ulCriticalNesting to keep a count of how many times
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211 portENTER_CRITICAL() has been called. */
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212 ulCriticalNesting++;
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214 /*-----------------------------------------------------------*/
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216 __arm __interwork void vPortExitCritical( void )
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218 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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220 /* Decrement the nesting count as we are leaving a critical section. */
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221 ulCriticalNesting--;
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223 /* If the nesting level has reached zero then interrupts should be
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225 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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227 __enable_interrupt();
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231 /*-----------------------------------------------------------*/
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