2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /*-----------------------------------------------------------
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76 * Implementation of functions defined in portable.h for the ST STR75x ARM7
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78 *----------------------------------------------------------*/
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80 /* Library includes. */
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82 #include "75x_eic.h"
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84 /* Scheduler includes. */
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85 #include "FreeRTOS.h"
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88 /* Constants required to setup the initial stack. */
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89 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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90 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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92 /* Constants required to handle critical sections. */
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93 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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95 /* Prescale used on the timer clock when calculating the tick period. */
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96 #define portPRESCALE 20
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99 /*-----------------------------------------------------------*/
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101 /* Setup the TB to generate the tick interrupts. */
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102 static void prvSetupTimerInterrupt( void );
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104 /* ulCriticalNesting will get set to zero when the first task starts. It
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105 cannot be initialised to 0 as this will cause interrupts to be enabled
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106 during the kernel initialisation process. */
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107 unsigned long ulCriticalNesting = ( unsigned long ) 9999;
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109 /* Tick interrupt routines for preemptive operation. */
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110 __arm void vPortPreemptiveTick( void );
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112 /*-----------------------------------------------------------*/
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115 * Initialise the stack of a task to look exactly as if a call to
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116 * portSAVE_CONTEXT had been called.
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118 * See header file for description.
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120 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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122 portSTACK_TYPE *pxOriginalTOS;
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124 pxOriginalTOS = pxTopOfStack;
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126 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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127 is not really required. */
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130 /* Setup the initial stack of the task. The stack is set exactly as
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131 expected by the portRESTORE_CONTEXT() macro. */
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133 /* First on the stack is the return address - which in this case is the
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134 start of the task. The offset is added to make the return address appear
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135 as it would within an IRQ ISR. */
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136 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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139 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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141 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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143 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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145 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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147 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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149 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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151 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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153 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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155 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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157 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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159 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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161 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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163 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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165 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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168 /* When the task starts is will expect to find the function parameter in
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170 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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173 /* The status register is set for system mode, with interrupts enabled. */
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174 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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177 /* Interrupt flags cannot always be stored on the stack and will
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178 instead be stored in a variable, which is then saved as part of the
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180 *pxTopOfStack = portNO_CRITICAL_NESTING;
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182 return pxTopOfStack;
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184 /*-----------------------------------------------------------*/
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186 portBASE_TYPE xPortStartScheduler( void )
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188 extern void vPortStartFirstTask( void );
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190 /* Start the timer that generates the tick ISR. Interrupts are disabled
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192 prvSetupTimerInterrupt();
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194 /* Start the first task. */
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195 vPortStartFirstTask();
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197 /* Should not get here! */
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200 /*-----------------------------------------------------------*/
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202 void vPortEndScheduler( void )
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204 /* It is unlikely that the ARM port will require this function as there
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205 is nothing to return to. */
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207 /*-----------------------------------------------------------*/
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209 __arm void vPortPreemptiveTick( void )
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211 /* Increment the tick counter. */
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212 vTaskIncrementTick();
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214 /* The new tick value might unblock a task. Ensure the highest task that
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215 is ready to execute is the task that will execute when the tick ISR
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217 #if configUSE_PREEMPTION == 1
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218 vTaskSwitchContext();
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221 TB_ClearITPendingBit( TB_IT_Update );
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223 /*-----------------------------------------------------------*/
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225 static void prvSetupTimerInterrupt( void )
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227 EIC_IRQInitTypeDef EIC_IRQInitStructure;
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228 TB_InitTypeDef TB_InitStructure;
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230 /* Setup the EIC for the TB. */
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231 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
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232 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
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233 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
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234 EIC_IRQInit(&EIC_IRQInitStructure);
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236 /* Setup the TB for the generation of the tick interrupt. */
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237 TB_InitStructure.TB_Mode = TB_Mode_Timing;
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238 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
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239 TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
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240 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
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241 TB_Init(&TB_InitStructure);
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243 /* Enable TB Update interrupt */
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244 TB_ITConfig(TB_IT_Update, ENABLE);
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246 /* Clear TB Update interrupt pending bit */
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247 TB_ClearITPendingBit(TB_IT_Update);
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252 /*-----------------------------------------------------------*/
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254 __arm __interwork void vPortEnterCritical( void )
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256 /* Disable interrupts first! */
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257 __disable_interrupt();
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259 /* Now interrupts are disabled ulCriticalNesting can be accessed
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260 directly. Increment ulCriticalNesting to keep a count of how many times
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261 portENTER_CRITICAL() has been called. */
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262 ulCriticalNesting++;
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264 /*-----------------------------------------------------------*/
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266 __arm __interwork void vPortExitCritical( void )
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268 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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270 /* Decrement the nesting count as we are leaving a critical section. */
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271 ulCriticalNesting--;
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273 /* If the nesting level has reached zero then interrupts should be
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275 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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277 __enable_interrupt();
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281 /*-----------------------------------------------------------*/
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