2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the ST STR91x ARM9
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73 *----------------------------------------------------------*/
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75 /* Library includes. */
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76 #include "91x_lib.h"
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78 /* Standard includes. */
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 #ifndef configUSE_WATCHDOG_TICK
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87 #error configUSE_WATCHDOG_TICK must be set to either 1 or 0 in FreeRTOSConfig.h to use either the Watchdog or timer 2 to generate the tick interrupt respectively.
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90 /* Constants required to setup the initial stack. */
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91 #ifndef _RUN_TASK_IN_ARM_MODE_
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92 #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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94 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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97 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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99 /* Constants required to handle critical sections. */
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100 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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103 #define abs(x) ((x)>0 ? (x) : -(x))
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107 * Toggle a led using the following algorithm:
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108 * if ( GPIO_ReadBit(GPIO9, GPIO_Pin_2) )
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110 * GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
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114 * GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
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118 #define TOGGLE_LED(port,pin) \
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119 if ( ((((port)->DR[(pin)<<2])) & (pin)) != Bit_RESET ) \
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121 (port)->DR[(pin) <<2] = 0x00; \
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125 (port)->DR[(pin) <<2] = (pin); \
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129 /*-----------------------------------------------------------*/
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131 /* Setup the watchdog to generate the tick interrupts. */
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132 static void prvSetupTimerInterrupt( void );
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134 /* ulCriticalNesting will get set to zero when the first task starts. It
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135 cannot be initialised to 0 as this will cause interrupts to be enabled
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136 during the kernel initialisation process. */
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137 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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139 /* Tick interrupt routines for cooperative and preemptive operation
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140 respectively. The preemptive version is not defined as __irq as it is called
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141 from an asm wrapper function. */
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142 void WDG_IRQHandler( void );
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144 /* VIC interrupt default handler. */
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145 static void prvDefaultHandler( void );
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147 #if configUSE_WATCHDOG_TICK == 0
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148 /* Used to update the OCR timer register */
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149 static u16 s_nPulseLength;
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152 /*-----------------------------------------------------------*/
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155 * Initialise the stack of a task to look exactly as if a call to
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156 * portSAVE_CONTEXT had been called.
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158 * See header file for description.
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160 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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162 StackType_t *pxOriginalTOS;
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164 pxOriginalTOS = pxTopOfStack;
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166 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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167 is not really required. */
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170 /* Setup the initial stack of the task. The stack is set exactly as
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171 expected by the portRESTORE_CONTEXT() macro. */
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173 /* First on the stack is the return address - which in this case is the
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174 start of the task. The offset is added to make the return address appear
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175 as it would within an IRQ ISR. */
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176 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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179 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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181 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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183 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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185 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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187 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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189 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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191 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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193 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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195 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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197 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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199 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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201 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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203 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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205 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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208 /* When the task starts is will expect to find the function parameter in
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210 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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213 /* The status register is set for system mode, with interrupts enabled. */
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214 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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217 /* Interrupt flags cannot always be stored on the stack and will
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218 instead be stored in a variable, which is then saved as part of the
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220 *pxTopOfStack = portNO_CRITICAL_NESTING;
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222 return pxTopOfStack;
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224 /*-----------------------------------------------------------*/
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226 BaseType_t xPortStartScheduler( void )
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228 extern void vPortStartFirstTask( void );
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230 /* Start the timer that generates the tick ISR. Interrupts are disabled
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232 prvSetupTimerInterrupt();
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234 /* Start the first task. */
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235 vPortStartFirstTask();
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237 /* Should not get here! */
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240 /*-----------------------------------------------------------*/
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242 void vPortEndScheduler( void )
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244 /* It is unlikely that the ARM port will require this function as there
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245 is nothing to return to. */
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247 /*-----------------------------------------------------------*/
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249 /* This function is called from an asm wrapper, so does not require the __irq
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251 #if configUSE_WATCHDOG_TICK == 1
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253 static void prvFindFactors(u32 n, u16 *a, u32 *b)
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255 /* This function is copied from the ST STR7 library and is
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256 copyright STMicroelectronics. Reproduced with permission. */
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260 int32_t err, err_min=n;
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262 *a = a0 = ((n-1)/65536ul) + 1;
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265 for (; *a <= 256; (*a)++)
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268 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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269 if (abs(err) > (*a / 2))
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272 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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274 if (abs(err) < abs(err_min))
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279 if (err == 0) break;
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286 /*-----------------------------------------------------------*/
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288 static void prvSetupTimerInterrupt( void )
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290 WDG_InitTypeDef xWdg;
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292 uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
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294 /* Configure the watchdog as a free running timer that generates a
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295 periodic interrupt. */
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297 SCU_APBPeriphClockConfig( __WDG, ENABLE );
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299 WDG_StructInit(&xWdg);
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300 prvFindFactors( n, &a, &b );
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301 xWdg.WDG_Prescaler = a - 1;
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302 xWdg.WDG_Preload = b - 1;
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304 WDG_ITConfig(ENABLE);
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306 /* Configure the VIC for the WDG interrupt. */
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307 VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
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308 VIC_ITCmd( WDG_ITLine, ENABLE );
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310 /* Install the default handlers for both VIC's. */
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311 VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
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312 VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
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316 /*-----------------------------------------------------------*/
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318 void WDG_IRQHandler( void )
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321 /* Increment the tick counter. */
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322 if( xTaskIncrementTick() != pdFALSE )
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324 /* Select a new task to execute. */
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325 vTaskSwitchContext();
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328 /* Clear the interrupt in the watchdog. */
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329 WDG->SR &= ~0x0001;
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335 static void prvFindFactors(u32 n, u8 *a, u16 *b)
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337 /* This function is copied from the ST STR7 library and is
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338 copyright STMicroelectronics. Reproduced with permission. */
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342 int32_t err, err_min=n;
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345 *a = a0 = ((n-1)/256) + 1;
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348 for (; *a <= 256; (*a)++)
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351 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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352 if (abs(err) > (*a / 2))
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355 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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357 if (abs(err) < abs(err_min))
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362 if (err == 0) break;
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369 /*-----------------------------------------------------------*/
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371 static void prvSetupTimerInterrupt( void )
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375 uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;
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377 TIM_InitTypeDef timer;
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379 SCU_APBPeriphClockConfig( __TIM23, ENABLE );
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381 TIM_StructInit(&timer);
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382 prvFindFactors( n, &a, &b );
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384 timer.TIM_Mode = TIM_OCM_CHANNEL_1;
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385 timer.TIM_OC1_Modes = TIM_TIMING;
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386 timer.TIM_Clock_Source = TIM_CLK_APB;
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387 timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
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388 timer.TIM_Prescaler = a-1;
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389 timer.TIM_Pulse_Level_1 = TIM_HIGH;
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390 timer.TIM_Pulse_Length_1 = s_nPulseLength = b-1;
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392 TIM_Init (TIM2, &timer);
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393 TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);
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394 /* Configure the VIC for the WDG interrupt. */
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395 VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );
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396 VIC_ITCmd( TIM2_ITLine, ENABLE );
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398 /* Install the default handlers for both VIC's. */
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399 VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
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400 VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
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402 TIM_CounterCmd(TIM2, TIM_CLEAR);
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403 TIM_CounterCmd(TIM2, TIM_START);
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405 /*-----------------------------------------------------------*/
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407 void TIM2_IRQHandler( void )
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409 /* Reset the timer counter to avioid overflow. */
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410 TIM2->OC1R += s_nPulseLength;
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412 /* Increment the tick counter. */
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413 if( xTaskIncrementTick() != pdFALSE )
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415 /* Select a new task to run. */
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416 vTaskSwitchContext();
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419 /* Clear the interrupt in the watchdog. */
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420 TIM2->SR &= ~TIM_FLAG_OC1;
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423 #endif /* USE_WATCHDOG_TICK */
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425 /*-----------------------------------------------------------*/
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427 __arm __interwork void vPortEnterCritical( void )
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429 /* Disable interrupts first! */
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430 portDISABLE_INTERRUPTS();
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432 /* Now interrupts are disabled ulCriticalNesting can be accessed
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433 directly. Increment ulCriticalNesting to keep a count of how many times
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434 portENTER_CRITICAL() has been called. */
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435 ulCriticalNesting++;
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437 /*-----------------------------------------------------------*/
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439 __arm __interwork void vPortExitCritical( void )
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441 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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443 /* Decrement the nesting count as we are leaving a critical section. */
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444 ulCriticalNesting--;
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446 /* If the nesting level has reached zero then interrupts should be
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448 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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450 portENABLE_INTERRUPTS();
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454 /*-----------------------------------------------------------*/
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456 static void prvDefaultHandler( void )
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