2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ST STR91x ARM9
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69 *----------------------------------------------------------*/
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71 /* Library includes. */
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72 #include "91x_lib.h"
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74 /* Standard includes. */
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78 /* Scheduler includes. */
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79 #include "FreeRTOS.h"
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82 #ifndef configUSE_WATCHDOG_TICK
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83 #error configUSE_WATCHDOG_TICK must be set to either 1 or 0 in FreeRTOSConfig.h to use either the Watchdog or timer 2 to generate the tick interrupt respectively.
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86 /* Constants required to setup the initial stack. */
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87 #ifndef _RUN_TASK_IN_ARM_MODE_
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88 #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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90 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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93 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
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95 /* Constants required to handle critical sections. */
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96 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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99 #define abs(x) ((x)>0 ? (x) : -(x))
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103 * Toggle a led using the following algorithm:
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104 * if ( GPIO_ReadBit(GPIO9, GPIO_Pin_2) )
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106 * GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
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110 * GPIO_WriteBit( GPIO9, GPIO_Pin_2, Bit_RESET );
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114 #define TOGGLE_LED(port,pin) \
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115 if ( ((((port)->DR[(pin)<<2])) & (pin)) != Bit_RESET ) \
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117 (port)->DR[(pin) <<2] = 0x00; \
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121 (port)->DR[(pin) <<2] = (pin); \
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125 /*-----------------------------------------------------------*/
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127 /* Setup the watchdog to generate the tick interrupts. */
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128 static void prvSetupTimerInterrupt( void );
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130 /* ulCriticalNesting will get set to zero when the first task starts. It
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131 cannot be initialised to 0 as this will cause interrupts to be enabled
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132 during the kernel initialisation process. */
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133 uint32_t ulCriticalNesting = ( uint32_t ) 9999;
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135 /* Tick interrupt routines for cooperative and preemptive operation
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136 respectively. The preemptive version is not defined as __irq as it is called
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137 from an asm wrapper function. */
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138 void WDG_IRQHandler( void );
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140 /* VIC interrupt default handler. */
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141 static void prvDefaultHandler( void );
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143 #if configUSE_WATCHDOG_TICK == 0
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144 /* Used to update the OCR timer register */
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145 static u16 s_nPulseLength;
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148 /*-----------------------------------------------------------*/
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151 * Initialise the stack of a task to look exactly as if a call to
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152 * portSAVE_CONTEXT had been called.
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154 * See header file for description.
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156 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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158 StackType_t *pxOriginalTOS;
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160 pxOriginalTOS = pxTopOfStack;
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162 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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163 is not really required. */
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166 /* Setup the initial stack of the task. The stack is set exactly as
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167 expected by the portRESTORE_CONTEXT() macro. */
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169 /* First on the stack is the return address - which in this case is the
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170 start of the task. The offset is added to make the return address appear
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171 as it would within an IRQ ISR. */
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172 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
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175 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
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177 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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179 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
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181 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
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183 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
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185 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
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187 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
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189 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
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191 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
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193 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
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195 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
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197 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
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199 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
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201 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
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204 /* When the task starts is will expect to find the function parameter in
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206 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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209 /* The status register is set for system mode, with interrupts enabled. */
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210 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
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213 /* Interrupt flags cannot always be stored on the stack and will
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214 instead be stored in a variable, which is then saved as part of the
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216 *pxTopOfStack = portNO_CRITICAL_NESTING;
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218 return pxTopOfStack;
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220 /*-----------------------------------------------------------*/
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222 BaseType_t xPortStartScheduler( void )
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224 extern void vPortStartFirstTask( void );
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226 /* Start the timer that generates the tick ISR. Interrupts are disabled
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228 prvSetupTimerInterrupt();
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230 /* Start the first task. */
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231 vPortStartFirstTask();
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233 /* Should not get here! */
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236 /*-----------------------------------------------------------*/
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238 void vPortEndScheduler( void )
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240 /* It is unlikely that the ARM port will require this function as there
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241 is nothing to return to. */
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243 /*-----------------------------------------------------------*/
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245 /* This function is called from an asm wrapper, so does not require the __irq
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247 #if configUSE_WATCHDOG_TICK == 1
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249 static void prvFindFactors(u32 n, u16 *a, u32 *b)
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251 /* This function is copied from the ST STR7 library and is
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252 copyright STMicroelectronics. Reproduced with permission. */
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256 int32_t err, err_min=n;
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258 *a = a0 = ((n-1)/65536ul) + 1;
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261 for (; *a <= 256; (*a)++)
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264 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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265 if (abs(err) > (*a / 2))
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268 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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270 if (abs(err) < abs(err_min))
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275 if (err == 0) break;
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282 /*-----------------------------------------------------------*/
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284 static void prvSetupTimerInterrupt( void )
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286 WDG_InitTypeDef xWdg;
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288 uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;
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290 /* Configure the watchdog as a free running timer that generates a
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291 periodic interrupt. */
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293 SCU_APBPeriphClockConfig( __WDG, ENABLE );
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295 WDG_StructInit(&xWdg);
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296 prvFindFactors( n, &a, &b );
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297 xWdg.WDG_Prescaler = a - 1;
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298 xWdg.WDG_Preload = b - 1;
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300 WDG_ITConfig(ENABLE);
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302 /* Configure the VIC for the WDG interrupt. */
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303 VIC_Config( WDG_ITLine, VIC_IRQ, 10 );
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304 VIC_ITCmd( WDG_ITLine, ENABLE );
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306 /* Install the default handlers for both VIC's. */
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307 VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
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308 VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
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312 /*-----------------------------------------------------------*/
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314 void WDG_IRQHandler( void )
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317 /* Increment the tick counter. */
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318 if( xTaskIncrementTick() != pdFALSE )
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320 /* Select a new task to execute. */
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321 vTaskSwitchContext();
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324 /* Clear the interrupt in the watchdog. */
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325 WDG->SR &= ~0x0001;
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331 static void prvFindFactors(u32 n, u8 *a, u16 *b)
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333 /* This function is copied from the ST STR7 library and is
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334 copyright STMicroelectronics. Reproduced with permission. */
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338 int32_t err, err_min=n;
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341 *a = a0 = ((n-1)/256) + 1;
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344 for (; *a <= 256; (*a)++)
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347 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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348 if (abs(err) > (*a / 2))
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351 err = (int32_t)*a * (int32_t)*b - (int32_t)n;
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353 if (abs(err) < abs(err_min))
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358 if (err == 0) break;
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365 /*-----------------------------------------------------------*/
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367 static void prvSetupTimerInterrupt( void )
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371 uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;
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373 TIM_InitTypeDef timer;
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375 SCU_APBPeriphClockConfig( __TIM23, ENABLE );
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377 TIM_StructInit(&timer);
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378 prvFindFactors( n, &a, &b );
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380 timer.TIM_Mode = TIM_OCM_CHANNEL_1;
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381 timer.TIM_OC1_Modes = TIM_TIMING;
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382 timer.TIM_Clock_Source = TIM_CLK_APB;
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383 timer.TIM_Clock_Edge = TIM_CLK_EDGE_RISING;
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384 timer.TIM_Prescaler = a-1;
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385 timer.TIM_Pulse_Level_1 = TIM_HIGH;
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386 timer.TIM_Pulse_Length_1 = s_nPulseLength = b-1;
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388 TIM_Init (TIM2, &timer);
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389 TIM_ITConfig(TIM2, TIM_IT_OC1, ENABLE);
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390 /* Configure the VIC for the WDG interrupt. */
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391 VIC_Config( TIM2_ITLine, VIC_IRQ, 10 );
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392 VIC_ITCmd( TIM2_ITLine, ENABLE );
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394 /* Install the default handlers for both VIC's. */
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395 VIC0->DVAR = ( uint32_t ) prvDefaultHandler;
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396 VIC1->DVAR = ( uint32_t ) prvDefaultHandler;
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398 TIM_CounterCmd(TIM2, TIM_CLEAR);
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399 TIM_CounterCmd(TIM2, TIM_START);
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401 /*-----------------------------------------------------------*/
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403 void TIM2_IRQHandler( void )
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405 /* Reset the timer counter to avioid overflow. */
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406 TIM2->OC1R += s_nPulseLength;
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408 /* Increment the tick counter. */
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409 if( xTaskIncrementTick() != pdFALSE )
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411 /* Select a new task to run. */
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412 vTaskSwitchContext();
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415 /* Clear the interrupt in the watchdog. */
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416 TIM2->SR &= ~TIM_FLAG_OC1;
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419 #endif /* USE_WATCHDOG_TICK */
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421 /*-----------------------------------------------------------*/
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423 __arm __interwork void vPortEnterCritical( void )
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425 /* Disable interrupts first! */
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426 portDISABLE_INTERRUPTS();
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428 /* Now interrupts are disabled ulCriticalNesting can be accessed
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429 directly. Increment ulCriticalNesting to keep a count of how many times
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430 portENTER_CRITICAL() has been called. */
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431 ulCriticalNesting++;
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433 /*-----------------------------------------------------------*/
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435 __arm __interwork void vPortExitCritical( void )
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437 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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439 /* Decrement the nesting count as we are leaving a critical section. */
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440 ulCriticalNesting--;
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442 /* If the nesting level has reached zero then interrupts should be
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444 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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446 portENABLE_INTERRUPTS();
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450 /*-----------------------------------------------------------*/
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452 static void prvDefaultHandler( void )
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