2 FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the PIC32MEC14xx port.
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72 *----------------------------------------------------------*/
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74 /* Scheduler include files. */
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75 #include "FreeRTOS.h"
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78 /* Microchip includes. */
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80 #include <cp0defs.h>
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82 #if !defined(__MEC__)
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83 #error This port is designed to work with XC32 on MEC14xx. Please update your C compiler version or settings.
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86 #if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )
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87 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0
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90 /* Bits within various registers. */
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91 #define portIE_BIT ( 0x00000001 )
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92 #define portEXL_BIT ( 0x00000002 )
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94 /* The EXL bit is set to ensure interrupts do not occur while the context of
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95 the first task is being restored. MEC14xx does not have DSP HW. */
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96 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT )
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98 /* MEC14xx RTOS Timer MMCR's. */
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99 #define portMMCR_RTMR_PRELOAD *((volatile uint32_t *)(0xA0007404ul))
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100 #define portMMCR_RTMR_CONTROL *((volatile uint32_t *)(0xA0007408ul))
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102 /* MEC14xx JTVIC external interrupt controller is mapped to M14K closely-coupled
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103 peripheral space. */
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104 #define portGIRQ23_RTOS_TIMER_BITPOS ( 4 )
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105 #define portGIRQ23_RTOS_TIMER_MASK ( 1ul << ( portGIRQ23_RTOS_TIMER_BITPOS ) )
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106 #define portMMCR_JTVIC_GIRQ23_SRC *((volatile uint32_t *)(0xBFFFC0F0ul))
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107 #define portMMCR_JTVIC_GIRQ23_SETEN *((volatile uint32_t *)(0xBFFFC0F4ul))
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108 #define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))
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110 /* MIPS Software Interrupts are routed through JTVIC GIRQ24 */
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111 #define portGIRQ24_M14K_SOFTIRQ0_BITPOS ( 1 )
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112 #define portGIRQ24_M14K_SOFTIRQ0_MASK ( 1ul << ( portGIRQ24_M14K_SOFTIRQ0_BITPOS ) )
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113 #define portMMCR_JTVIC_GIRQ24_SRC *((volatile uint32_t *)(0xBFFFC100ul))
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114 #define portMMCR_JTVIC_GIRQ24_SETEN *((volatile uint32_t *)(0xBFFFC104ul))
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115 #define portMMCR_JTVIC_GIRQ24_PRIA *((volatile uint32_t *)(0xBFFFC400ul))
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118 By default port.c generates its tick interrupt from the RTOS timer. The user
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119 can override this behaviour by:
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120 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),
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121 which is the function that configures the timer. The function is defined
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122 as a weak symbol in this file so if the same function name is used in the
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123 application code then the version in the application code will be linked
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124 into the application in preference to the version defined in this file.
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125 2: Provide a vector implementation in port_asm.S that overrides the default
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126 behaviour for the specified interrupt vector.
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127 3: Specify the correct bit to clear the interrupt during the timer interrupt
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130 #ifndef configTICK_INTERRUPT_VECTOR
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131 #define configTICK_INTERRUPT_VECTOR girq23_b4
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132 #define configCLEAR_TICK_TIMER_INTERRUPT() portMMCR_JTVIC_GIRQ23_SRC = portGIRQ23_RTOS_TIMER_MASK
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134 #ifndef configCLEAR_TICK_TIMER_INTERRUPT
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135 #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
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139 /* Let the user override the pre-loading of the initial RA with the address of
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140 prvTaskExitError() in case it messes up unwinding of the stack in the debugger -
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141 in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */
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142 #ifdef configTASK_RETURN_ADDRESS
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143 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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145 #define portTASK_RETURN_ADDRESS prvTaskExitError
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148 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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149 stack checking. A problem in the ISR stack will trigger an assert, not call the
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150 stack overflow hook function (because the stack overflow hook is specific to a
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151 task stack, not the ISR stack). */
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152 #if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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154 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
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155 the task stacks, and so will legitimately appear in many positions within
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157 #define portISR_STACK_FILL_BYTE 0xee
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159 static const uint8_t ucExpectedStackBytes[] = {
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160 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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161 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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162 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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163 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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164 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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166 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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168 /* Define the function away. */
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169 #define portCHECK_ISR_STACK()
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170 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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173 /*-----------------------------------------------------------*/
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176 * Used to catch tasks that attempt to return from their implementing function.
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178 static void prvTaskExitError( void );
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180 /*-----------------------------------------------------------*/
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182 /* Records the interrupt nesting depth. This is initialised to one as it is
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183 decremented to 0 when the first task starts. */
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184 volatile UBaseType_t uxInterruptNesting = 0x01;
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186 /* Stores the task stack pointer when a switch is made to use the system stack. */
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187 UBaseType_t uxSavedTaskStackPointer = 0;
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189 /* The stack used by interrupt service routines that cause a context switch. */
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190 StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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192 /* The top of stack value ensures there is enough space to store 6 registers on
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193 the callers stack, as some functions seem to want to do this. */
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194 const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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196 /*-----------------------------------------------------------*/
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199 * See header file for description.
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201 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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203 /* Ensure byte alignment is maintained when leaving this function. */
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206 *pxTopOfStack = (StackType_t) 0xDEADBEEF;
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209 *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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212 *pxTopOfStack = (StackType_t) ulPortGetCP0Cause();
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215 *pxTopOfStack = (StackType_t) portINITIAL_SR; /* CP0_STATUS */
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218 *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
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221 *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
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222 pxTopOfStack -= 15;
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224 *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
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225 pxTopOfStack -= 15;
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227 return pxTopOfStack;
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229 /*-----------------------------------------------------------*/
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231 static __inline uint32_t prvDisableInterrupt( void )
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233 uint32_t prev_state;
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235 __asm volatile( "di %0; ehb" : "=r" ( prev_state ) :: "memory" );
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238 /*-----------------------------------------------------------*/
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240 static void prvTaskExitError( void )
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242 /* A function that implements a task must not exit or attempt to return to
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243 its caller as there is nothing to return to. If a task wants to exit it
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244 should instead call vTaskDelete( NULL ).
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246 Artificially force an assert() to be triggered if configASSERT() is
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247 defined, then stop here so application writers can catch the error. */
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248 configASSERT( uxSavedTaskStackPointer == 0UL );
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249 portDISABLE_INTERRUPTS();
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252 /*-----------------------------------------------------------*/
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255 * Setup a timer for a regular tick. This function uses the RTOS timer.
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256 * The function is declared weak so an application writer can use a different
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257 * timer by redefining this implementation. If a different timer is used then
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258 * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
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259 * ensure the RTOS provided tick interrupt handler is installed on the correct
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262 __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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264 /* MEC14xx RTOS Timer whose input clock is 32KHz. */
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265 const uint32_t ulPreload = ( 32768ul / ( configTICK_RATE_HZ ) );
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267 configASSERT( ulPreload != 0UL );
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269 /* Configure the RTOS timer. */
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270 portMMCR_RTMR_CONTROL = 0ul;
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271 portMMCR_RTMR_PRELOAD = ulPreload;
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273 /* Configure interrupts from the RTOS timer. */
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274 portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );
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275 portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 );
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276 portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 );
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277 portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK );
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279 /* Enable the RTOS timer. */
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280 portMMCR_RTMR_CONTROL = 0x0Fu;
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282 /*-----------------------------------------------------------*/
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284 void vPortEndScheduler(void)
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286 /* Not implemented in ports where there is nothing to return to.
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287 Artificially force an assert. */
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288 configASSERT( uxInterruptNesting == 1000UL );
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290 /*-----------------------------------------------------------*/
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292 BaseType_t xPortStartScheduler( void )
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294 extern void vPortStartFirstTask( void );
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295 extern void *pxCurrentTCB;
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297 #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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299 /* Fill the ISR stack to make it easy to asses how much is being used. */
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300 memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
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302 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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304 /* Clear the software interrupt flag. */
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305 portMMCR_JTVIC_GIRQ24_SRC = (portGIRQ24_M14K_SOFTIRQ0_MASK);
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307 /* Set software timer priority. Each GIRQn has one nibble containing its
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309 portMMCR_JTVIC_GIRQ24_PRIA &= ~(0xF0ul);
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310 portMMCR_JTVIC_GIRQ24_PRIA |= ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) << 4 );
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312 /* Enable software interrupt. */
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313 portMMCR_JTVIC_GIRQ24_SETEN = ( portGIRQ24_M14K_SOFTIRQ0_MASK );
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315 /* Setup the timer to generate the tick. Interrupts will have been disabled
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316 by the time we get here. */
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317 vApplicationSetupTickTimerInterrupt();
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319 /* Start the highest priority task that has been created so far. Its stack
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320 location is loaded into uxSavedTaskStackPointer. */
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321 uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
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322 vPortStartFirstTask();
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324 /* Should never get here as the tasks will now be executing! Call the task
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325 exit error function to prevent compiler warnings about a static function
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326 not being called in the case that the application writer overrides this
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327 functionality by defining configTASK_RETURN_ADDRESS. */
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328 prvTaskExitError();
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332 /*-----------------------------------------------------------*/
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334 void vPortIncrementTick( void )
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336 UBaseType_t uxSavedStatus;
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339 uxSavedStatus = uxPortSetInterruptMaskFromISR();
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341 if( xTaskIncrementTick() != pdFALSE )
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343 /* Pend a context switch. */
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344 ulCause = ulPortGetCP0Cause();
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345 ulCause |= ( 1ul << 8UL );
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346 vPortSetCP0Cause( ulCause );
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349 vPortClearInterruptMaskFromISR( uxSavedStatus );
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351 /* Look for the ISR stack getting near or past its limit. */
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352 portCHECK_ISR_STACK();
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354 /* Clear timer interrupt. */
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355 configCLEAR_TICK_TIMER_INTERRUPT();
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357 /*-----------------------------------------------------------*/
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359 UBaseType_t uxPortSetInterruptMaskFromISR( void )
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361 UBaseType_t uxSavedStatusRegister;
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363 prvDisableInterrupt();
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364 uxSavedStatusRegister = ulPortGetCP0Status() | 0x01;
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366 /* This clears the IPL bits, then sets them to
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367 configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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368 from an interrupt that has a priority above
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369 configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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370 can only result in the IPL being unchanged or raised, and therefore never
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372 vPortSetCP0Status( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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374 return uxSavedStatusRegister;
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376 /*-----------------------------------------------------------*/
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378 void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
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380 vPortSetCP0Status( uxSavedStatusRegister );
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382 /*-----------------------------------------------------------*/
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