2 FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /* FreeRTOS includes. */
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71 #include "FreeRTOSConfig.h"
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72 #include "ISR_Support.h"
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74 /* Microchip includes. */
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76 #include <sys/asm.h>
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78 .extern pxCurrentTCB
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79 .extern vTaskSwitchContext
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80 .extern vPortIncrementTick
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81 .extern xISRStackTop
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83 PORT_CPP_JTVIC_BASE = 0xBFFFC000
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84 PORT_CCP_JTVIC_GIRQ24_SRC = 0xBFFFC100
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86 .global vPortStartFirstTask .text
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87 .global vPortYieldISR .text
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88 .global vPortTickInterruptHandler .text
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91 /******************************************************************/
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94 /***************************************************************
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95 * The following is needed to locate the
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96 * vPortTickInterruptHandler function into the correct vector
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97 * MEC14xx - This ISR will only be used if HW timers' interrupts
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98 * in GIRQ23 are disaggregated.
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100 ***************************************************************/
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106 .section .text, code
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107 .ent vPortTickInterruptHandler
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109 #if configTIMERS_DISAGGREGATED_ISRS == 0
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114 vPortTickInterruptHandler:
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121 portRESTORE_CONTEXT
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123 .end vPortTickInterruptHandler
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130 vPortTickInterruptHandler:
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134 jal vPortIncrementTick
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137 portRESTORE_CONTEXT
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139 .end vPortTickInterruptHandler
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141 #endif /* #if configTIMERS_DISAGGREGATED_ISRS == 0 */
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143 /******************************************************************/
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149 .section .text, code
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150 .ent vPortStartFirstTask
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152 vPortStartFirstTask:
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154 /* Simply restore the context of the highest priority task that has
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155 been created so far. */
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156 portRESTORE_CONTEXT
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158 .end vPortStartFirstTask
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162 /*******************************************************************/
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164 /***************************************************************
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165 * The following is needed to locate the vPortYieldISR function into the correct
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167 ***************************************************************/
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173 .section .text, code
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175 .global vPortYieldISR
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178 #if configCPU_DISAGGREGATED_ISRS == 0
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182 la k0, PORT_CPP_JTVIC_BASE
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185 bgtz k1, vPortYieldISR
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192 portRESTORE_CONTEXT
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203 /* Make room for the context. First save the current status so it can be
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204 manipulated, and the cause and EPC registers so thier original values
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206 addiu sp, sp, -portCONTEXT_SIZE
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207 mfc0 k1, _CP0_STATUS
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209 /* Also save s6 and s5 so they can be used. Any nesting interrupts should
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210 maintain the values of these registers across the ISR. */
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213 sw k1, portSTATUS_STACK_LOCATION(sp)
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215 /* Prepare to re-enable interrupts above the kernel priority. */
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216 ins k1, zero, 10, 7 /* Clear IPL bits 0:6. */
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217 ins k1, zero, 18, 1 /* Clear IPL bit 7 */
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218 ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )
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219 ins k1, zero, 1, 4 /* Clear EXL, ERL and UM. */
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221 /* s5 is used as the frame pointer. */
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224 /* Swap to the system stack. This is not conditional on the nesting
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225 count as this interrupt is always the lowest priority and therefore
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226 the nesting is always 0. */
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227 la sp, xISRStackTop
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230 /* Set the nesting count. */
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231 la k0, uxInterruptNesting
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235 /* s6 holds the EPC value, this is saved with the rest of the context
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236 after interrupts are enabled. */
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239 /* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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240 mtc0 k1, _CP0_STATUS
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242 /* Save the context into the space just created. s6 is saved again
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243 here as it now contains the EPC value. */
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263 sw s6, portEPC_STACK_LOCATION(s5)
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264 /* s5 and s6 has already been saved. */
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272 /* s7 is used as a scratch register as this should always be saved acro ss
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273 nesting interrupts. */
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279 /* Save the stack pointer to the task. */
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280 la s7, pxCurrentTCB
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284 /* Set the interrupt mask to the max priority that can use the API.
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285 The yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY
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286 which is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only
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287 ever raise the IPL value and never lower it. */
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290 mfc0 s7, _CP0_STATUS
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291 ins s7, zero, 10, 7
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292 ins s7, zero, 18, 1
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293 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
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295 /* This mtc0 re-enables interrupts, but only above
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296 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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297 mtc0 s6, _CP0_STATUS
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300 /* Clear the software interrupt in the core. */
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301 mfc0 s6, _CP0_CAUSE
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303 mtc0 s6, _CP0_CAUSE
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306 /* Clear the interrupt in the interrupt controller.
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307 MEC14xx GIRQ24 Source bit[1] = 1 to clear */
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308 la s6, PORT_CCP_JTVIC_GIRQ24_SRC
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311 jal vTaskSwitchContext
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314 /* Clear the interrupt mask again. The saved status value is still in s7 */
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315 mtc0 s7, _CP0_STATUS
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318 /* Restore the stack pointer from the TCB. */
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319 la s0, pxCurrentTCB
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323 /* Restore the rest of the context. */
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336 /* s5 is loaded later. */
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358 /* Protect access to the k registers, and others. */
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362 /* Set nesting back to zero. As the lowest priority interrupt this
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363 interrupt cannot have nested. */
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364 la k0, uxInterruptNesting
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367 /* Switch back to use the real stack pointer. */
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370 /* Restore the real s5 value. */
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373 /* Pop the status and epc values. */
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374 lw k1, portSTATUS_STACK_LOCATION(sp)
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375 lw k0, portEPC_STACK_LOCATION(sp)
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377 /* Remove stack frame. */
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378 addiu sp, sp, portCONTEXT_SIZE
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380 mtc0 k1, _CP0_STATUS
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