2 * FreeRTOS Kernel V10.0.1
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software.
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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22 * http://www.FreeRTOS.org
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23 * http://aws.amazon.com/freertos
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25 * 1 tab == 4 spaces!
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28 #include "FreeRTOSConfig.h"
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30 #define portCONTEXT_SIZE 132
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31 #define portEPC_STACK_LOCATION 124
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32 #define portSTATUS_STACK_LOCATION 128
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34 /******************************************************************/
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35 .macro portSAVE_CONTEXT
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37 /* Make room for the context. First save the current status so it can be
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38 manipulated, and the cause and EPC registers so their original values are
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41 addiu sp, sp, -portCONTEXT_SIZE
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42 mfc0 k1, _CP0_STATUS
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44 /* Also save s6 and s5 so they can be used. Any nesting interrupts should
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45 maintain the values of these registers across the ISR. */
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48 sw k1, portSTATUS_STACK_LOCATION(sp)
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50 /* Prepare to enable interrupts above the current priority. */
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55 /* s5 is used as the frame pointer. */
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58 /* Check the nesting count value. */
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59 la k0, uxInterruptNesting
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62 /* If the nesting count is 0 then swap to the the system stack, otherwise
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63 the system stack is already being used. */
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67 /* Swap to the system stack. */
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71 /* Increment and save the nesting count. */
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75 /* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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78 /* Re-enable interrupts. */
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79 mtc0 k1, _CP0_STATUS
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81 /* Save the context into the space just created. s6 is saved again
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82 here as it now contains the EPC value. No other s registers need be
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102 sw s6, portEPC_STACK_LOCATION(s5)
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105 /* s6 is used as a scratch register. */
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111 /* Update the task stack pointer value if nesting is zero. */
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112 la s6, uxInterruptNesting
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118 /* Save the stack pointer. */
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119 la s6, uxSavedTaskStackPointer
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124 /******************************************************************/
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125 .macro portRESTORE_CONTEXT
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127 /* Restore the stack pointer from the TCB. This is only done if the
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128 nesting count is 1. */
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129 la s6, uxInterruptNesting
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134 la s6, uxSavedTaskStackPointer
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137 /* Restore the context. */
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143 /* s6 is loaded as it was used as a scratch register and therefore saved
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144 as part of the interrupt context. */
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165 /* Protect access to the k registers, and others. */
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169 /* Decrement the nesting count. */
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170 la k0, uxInterruptNesting
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175 lw k0, portSTATUS_STACK_LOCATION(s5)
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176 lw k1, portEPC_STACK_LOCATION(s5)
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178 /* Leave the stack in its original state. First load sp from s5, then
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179 restore s5 from the stack. */
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182 addiu sp, sp, portCONTEXT_SIZE
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184 mtc0 k0, _CP0_STATUS
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