2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
\r
5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
\r
7 ***************************************************************************
\r
9 * FreeRTOS provides completely free yet professionally developed, *
\r
10 * robust, strictly quality controlled, supported, and cross *
\r
11 * platform software that has become a de facto standard. *
\r
13 * Help yourself get started quickly and support the FreeRTOS *
\r
14 * project by purchasing a FreeRTOS tutorial book, reference *
\r
15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
\r
19 ***************************************************************************
\r
21 This file is part of the FreeRTOS distribution.
\r
23 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
24 the terms of the GNU General Public License (version 2) as published by the
\r
25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
\r
27 >>! NOTE: The modification to the GPL is included to allow you to distribute
\r
28 >>! a combined work that includes FreeRTOS without being obliged to provide
\r
29 >>! the source code for proprietary components outside of the FreeRTOS
\r
32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
\r
33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
\r
34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
\r
35 link: http://www.freertos.org/a00114.html
\r
39 ***************************************************************************
\r
41 * Having a problem? Start by reading the FAQ "My application does *
\r
42 * not run, what could be wrong?" *
\r
44 * http://www.FreeRTOS.org/FAQHelp.html *
\r
46 ***************************************************************************
\r
48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
\r
49 license and Real Time Engineers Ltd. contact details.
\r
51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
\r
52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
\r
53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
\r
55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
\r
56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
\r
57 licenses offer ticketed support, indemnification and middleware.
\r
59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
\r
60 engineered and independently SIL3 certified version for use in safety and
\r
61 mission critical applications that require provable dependability.
\r
67 #include <sys/asm.h>
\r
68 #include "ISR_Support.h"
\r
74 .extern pxCurrentTCB
\r
75 .extern vTaskSwitchContext
\r
76 .extern vPortIncrementTick
\r
77 .extern xISRStackTop
\r
79 .global vPortStartFirstTask
\r
80 .global vPortYieldISR
\r
81 .global vPortTickInterruptHandler
\r
84 /******************************************************************/
\r
88 .ent vPortTickInterruptHandler
\r
90 vPortTickInterruptHandler:
\r
94 jal vPortIncrementTick
\r
99 .end vPortTickInterruptHandler
\r
101 /******************************************************************/
\r
105 .ent vPortStartFirstTask
\r
107 vPortStartFirstTask:
\r
109 /* Simply restore the context of the highest priority task that has been
\r
111 portRESTORE_CONTEXT
\r
113 .end vPortStartFirstTask
\r
117 /*******************************************************************/
\r
125 /* Make room for the context. First save the current status so it can be
\r
127 addiu sp, sp, -portCONTEXT_SIZE
\r
128 mfc0 k1, _CP0_STATUS
\r
130 /* Also save s6 and s5 so they can be used. Any nesting interrupts should
\r
131 maintain the values of these registers across the ISR. */
\r
134 sw k1, portSTATUS_STACK_LOCATION(sp)
\r
136 /* Prepare to re-enabled interrupt above the kernel priority. */
\r
137 ins k1, zero, 10, 6
\r
138 ori k1, k1, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 )
\r
141 /* s5 is used as the frame pointer. */
\r
144 /* Swap to the system stack. This is not conditional on the nesting
\r
145 count as this interrupt is always the lowest priority and therefore
\r
146 the nesting is always 0. */
\r
147 la sp, xISRStackTop
\r
150 /* Set the nesting count. */
\r
151 la k0, uxInterruptNesting
\r
155 /* s6 holds the EPC value, this is saved with the rest of the context
\r
156 after interrupts are enabled. */
\r
159 /* Re-enable interrupts above configMAX_SYSCALL_INTERRUPT_PRIORITY. */
\r
160 mtc0 k1, _CP0_STATUS
\r
162 /* Save the context into the space just created. s6 is saved again
\r
163 here as it now contains the EPC value. */
\r
183 sw s6, portEPC_STACK_LOCATION(s5)
\r
184 /* s5 and s6 has already been saved. */
\r
192 /* s7 is used as a scratch register as this should always be saved across
\r
193 nesting interrupts. */
\r
199 /* Save the stack pointer to the task. */
\r
200 la s7, pxCurrentTCB
\r
204 /* Set the interrupt mask to the max priority that can use the API. The
\r
205 yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY which
\r
206 is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever
\r
207 raise the IPL value and never lower it. */
\r
210 mfc0 s7, _CP0_STATUS
\r
211 ins s7, zero, 10, 6
\r
212 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
\r
214 /* This mtc0 re-enables interrupts, but only above
\r
215 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
\r
216 mtc0 s6, _CP0_STATUS
\r
219 /* Clear the software interrupt in the core. */
\r
220 mfc0 s6, _CP0_CAUSE
\r
222 mtc0 s6, _CP0_CAUSE
\r
225 /* Clear the interrupt in the interrupt controller. */
\r
230 jal vTaskSwitchContext
\r
233 /* Clear the interrupt mask again. The saved status value is still in s7. */
\r
234 mtc0 s7, _CP0_STATUS
\r
237 /* Restore the stack pointer from the TCB. */
\r
238 la s0, pxCurrentTCB
\r
242 /* Restore the rest of the context. */
\r
253 /* s5 is loaded later. */
\r
275 /* Protect access to the k registers, and others. */
\r
279 /* Set nesting back to zero. As the lowest priority interrupt this
\r
280 interrupt cannot have nested. */
\r
281 la k0, uxInterruptNesting
\r
284 /* Switch back to use the real stack pointer. */
\r
287 /* Restore the real s5 value. */
\r
290 /* Pop the status and epc values. */
\r
291 lw k1, portSTATUS_STACK_LOCATION(sp)
\r
292 lw k0, portEPC_STACK_LOCATION(sp)
\r
294 /* Remove stack frame. */
\r
295 addiu sp, sp, portCONTEXT_SIZE
\r
297 mtc0 k1, _CP0_STATUS
\r