2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 #include <p32xxxx.h>
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76 #include <sys/asm.h>
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77 #include "ISR_Support.h"
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83 .extern pxCurrentTCB
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84 .extern vTaskSwitchContext
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85 .extern vPortIncrementTick
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86 .extern xISRStackTop
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88 .global vPortStartFirstTask
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89 .global vPortYieldISR
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90 .global vPortTickInterruptHandler
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93 /******************************************************************/
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97 .ent vPortTickInterruptHandler
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99 vPortTickInterruptHandler:
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103 jal vPortIncrementTick
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106 portRESTORE_CONTEXT
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108 .end vPortTickInterruptHandler
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110 /******************************************************************/
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114 .ent xPortStartScheduler
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116 vPortStartFirstTask:
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118 /* Simply restore the context of the highest priority task that has been
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120 portRESTORE_CONTEXT
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122 .end xPortStartScheduler
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126 /*******************************************************************/
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134 /* Make room for the context. First save the current status so it can be
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135 manipulated, and the cause and EPC registers so thier original values are
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137 mfc0 k0, _CP0_CAUSE
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138 addiu sp, sp, -portCONTEXT_SIZE
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139 mfc0 k1, _CP0_STATUS
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141 /* Also save s6 and s5 so we can use them during this interrupt. Any
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142 nesting interrupts should maintain the values of these registers
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146 sw k1, portSTATUS_STACK_LOCATION(sp)
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148 /* Interrupts above the kernel priority are going to be re-enabled. */
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153 /* s5 is used as the frame pointer. */
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156 /* Swap to the system stack. This is not conditional on the nesting
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157 count as this interrupt is always the lowest priority and therefore
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158 the nesting is always 0. */
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159 la sp, xISRStackTop
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162 /* Set the nesting count. */
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163 la k0, uxInterruptNesting
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167 /* s6 holds the EPC value, this is saved with the rest of the context
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168 after interrupts are enabled. */
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171 /* Re-enable interrupts. */
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172 mtc0 k1, _CP0_STATUS
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174 /* Save the context into the space just created. s6 is saved again
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175 here as it now contains the EPC value. */
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195 sw s6, portEPC_STACK_LOCATION(s5)
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196 /* s5 and s6 has already been saved. */
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204 /* s7 is used as a scratch register as this should always be saved across
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205 nesting interrupts. */
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211 /* Save the stack pointer to the task. */
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212 la s7, pxCurrentTCB
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216 /* Set the interrupt mask to the max priority that can use the API. The
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217 yield handler will only be called at configKERNEL_INTERRUPT_PRIORITY which
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218 is below configMAX_SYSCALL_INTERRUPT_PRIORITY - so this can only ever
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219 raise the IPL value and never lower it. */
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221 mfc0 s7, _CP0_STATUS
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223 ori s6, s7, ( configMAX_SYSCALL_INTERRUPT_PRIORITY << 10 ) | 1
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225 /* This mtc0 re-enables interrupts, but only above
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226 configMAX_SYSCALL_INTERRUPT_PRIORITY. */
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227 mtc0 s6, _CP0_STATUS
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229 /* Clear the software interrupt in the core. */
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230 mfc0 s6, _CP0_CAUSE
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232 mtc0 s6, _CP0_CAUSE
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234 /* Clear the interrupt in the interrupt controller. */
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239 jal vTaskSwitchContext
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242 /* Clear the interrupt mask again. The saved status value is still in s7. */
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243 mtc0 s7, _CP0_STATUS
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245 /* Restore the stack pointer from the TCB. */
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246 la s0, pxCurrentTCB
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250 /* Restore the rest of the context. */
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261 /* s5 is loaded later. */
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283 /* Protect access to the k registers, and others. */
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286 /* Set nesting back to zero. As the lowest priority interrupt this
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287 interrupt cannot have nested. */
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288 la k0, uxInterruptNesting
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291 /* Switch back to use the real stack pointer. */
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294 /* Restore the real s5 value. */
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297 /* Pop the status and epc values. */
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298 lw k1, portSTATUS_STACK_LOCATION(sp)
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299 lw k0, portEPC_STACK_LOCATION(sp)
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301 /* Remove stack frame. */
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302 addiu sp, sp, portCONTEXT_SIZE
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304 mtc0 k1, _CP0_STATUS
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