]> git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/MPLAB/PIC32MX/portmacro.h
+ Update demos that use FreeRTOS+Trace to work with the latest trace recorder library.
[freertos] / FreeRTOS / Source / portable / MPLAB / PIC32MX / portmacro.h
1 /*\r
2     FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
3     All rights reserved\r
4 \r
5     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
6 \r
7     ***************************************************************************\r
8      *                                                                       *\r
9      *    FreeRTOS provides completely free yet professionally developed,    *\r
10      *    robust, strictly quality controlled, supported, and cross          *\r
11      *    platform software that has become a de facto standard.             *\r
12      *                                                                       *\r
13      *    Help yourself get started quickly and support the FreeRTOS         *\r
14      *    project by purchasing a FreeRTOS tutorial book, reference          *\r
15      *    manual, or both from: http://www.FreeRTOS.org/Documentation        *\r
16      *                                                                       *\r
17      *    Thank you!                                                         *\r
18      *                                                                       *\r
19     ***************************************************************************\r
20 \r
21     This file is part of the FreeRTOS distribution.\r
22 \r
23     FreeRTOS is free software; you can redistribute it and/or modify it under\r
24     the terms of the GNU General Public License (version 2) as published by the\r
25     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
26 \r
27     >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
28     >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
29     >>!   obliged to provide the source code for proprietary components     !<<\r
30     >>!   outside of the FreeRTOS kernel.                                   !<<\r
31 \r
32     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
33     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
34     FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
35     link: http://www.freertos.org/a00114.html\r
36 \r
37     1 tab == 4 spaces!\r
38 \r
39     ***************************************************************************\r
40      *                                                                       *\r
41      *    Having a problem?  Start by reading the FAQ "My application does   *\r
42      *    not run, what could be wrong?"                                     *\r
43      *                                                                       *\r
44      *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
45      *                                                                       *\r
46     ***************************************************************************\r
47 \r
48     http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
49     license and Real Time Engineers Ltd. contact details.\r
50 \r
51     http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
52     including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
53     compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
54 \r
55     http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
56     Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
57     licenses offer ticketed support, indemnification and middleware.\r
58 \r
59     http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
60     engineered and independently SIL3 certified version for use in safety and\r
61     mission critical applications that require provable dependability.\r
62 \r
63     1 tab == 4 spaces!\r
64 */\r
65 \r
66 #ifndef PORTMACRO_H\r
67 #define PORTMACRO_H\r
68 \r
69 /* System include files */\r
70 #include <xc.h>\r
71 \r
72 #ifdef __cplusplus\r
73 extern "C" {\r
74 #endif\r
75 \r
76 /*-----------------------------------------------------------\r
77  * Port specific definitions.\r
78  *\r
79  * The settings in this file configure FreeRTOS correctly for the\r
80  * given hardware and compiler.\r
81  *\r
82  * These settings should not be altered.\r
83  *-----------------------------------------------------------\r
84  */\r
85 \r
86 /* Type definitions. */\r
87 #define portCHAR                char\r
88 #define portFLOAT               float\r
89 #define portDOUBLE              double\r
90 #define portLONG                long\r
91 #define portSHORT               short\r
92 #define portSTACK_TYPE  uint32_t\r
93 #define portBASE_TYPE   long\r
94 \r
95 typedef portSTACK_TYPE StackType_t;\r
96 typedef long BaseType_t;\r
97 typedef unsigned long UBaseType_t;\r
98 \r
99 #if( configUSE_16_BIT_TICKS == 1 )\r
100         typedef uint16_t TickType_t;\r
101         #define portMAX_DELAY ( TickType_t ) 0xffff\r
102 #else\r
103         typedef uint32_t TickType_t;\r
104         #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
105 \r
106         /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
107         not need to be guarded with a critical section. */\r
108         #define portTICK_TYPE_IS_ATOMIC 1\r
109 #endif\r
110 /*-----------------------------------------------------------*/\r
111 \r
112 /* Hardware specifics. */\r
113 #define portBYTE_ALIGNMENT                      8\r
114 #define portSTACK_GROWTH                        -1\r
115 #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
116 /*-----------------------------------------------------------*/\r
117 \r
118 /* Critical section management. */\r
119 #define portIPL_SHIFT                           ( 10UL )\r
120 #define portALL_IPL_BITS                        ( 0x3fUL << portIPL_SHIFT )\r
121 #define portSW0_BIT                                     ( 0x01 << 8 )\r
122 \r
123 /* This clears the IPL bits, then sets them to\r
124 configMAX_SYSCALL_INTERRUPT_PRIORITY.  An extra check is performed if\r
125 configASSERT() is defined to ensure an assertion handler does not inadvertently\r
126 attempt to lower the IPL when the call to assert was triggered because the IPL\r
127 value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR\r
128 safe FreeRTOS API function was executed.  ISR safe FreeRTOS API functions are\r
129 those that end in FromISR.  FreeRTOS maintains a separate interrupt API to\r
130 ensure API function and interrupt entry is as fast and as simple as possible. */\r
131 #ifdef configASSERT\r
132         #define portDISABLE_INTERRUPTS()                                                                                        \\r
133         {                                                                                                                                                       \\r
134         uint32_t ulStatus;                                                                                                              \\r
135                                                                                                                                                                 \\r
136                 /* Mask interrupts at and below the kernel interrupt priority. */               \\r
137                 ulStatus = _CP0_GET_STATUS();                                                                                   \\r
138                                                                                                                                                                 \\r
139                 /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */    \\r
140                 if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \\r
141                 {                                                                                                                                               \\r
142                         ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
143                         _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
144                 }                                                                                                                                               \\r
145         }\r
146 #else /* configASSERT */\r
147         #define portDISABLE_INTERRUPTS()                                                                                \\r
148         {                                                                                                                                               \\r
149         uint32_t ulStatus;                                                                                                      \\r
150                                                                                                                                                         \\r
151                 /* Mask interrupts at and below the kernel interrupt priority. */       \\r
152                 ulStatus = _CP0_GET_STATUS();                                                                           \\r
153                 ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
154                 _CP0_SET_STATUS( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \\r
155         }\r
156 #endif /* configASSERT */\r
157 \r
158 #define portENABLE_INTERRUPTS()                                                                                 \\r
159 {                                                                                                                                               \\r
160 uint32_t ulStatus;                                                                                                      \\r
161                                                                                                                                                 \\r
162         /* Unmask all interrupts. */                                                                            \\r
163         ulStatus = _CP0_GET_STATUS();                                                                           \\r
164         ulStatus &= ~portALL_IPL_BITS;                                                                          \\r
165         _CP0_SET_STATUS( ulStatus );                                                                            \\r
166 }\r
167 \r
168 \r
169 extern void vTaskEnterCritical( void );\r
170 extern void vTaskExitCritical( void );\r
171 #define portCRITICAL_NESTING_IN_TCB     1\r
172 #define portENTER_CRITICAL()            vTaskEnterCritical()\r
173 #define portEXIT_CRITICAL()                     vTaskExitCritical()\r
174 \r
175 extern UBaseType_t uxPortSetInterruptMaskFromISR();\r
176 extern void vPortClearInterruptMaskFromISR( UBaseType_t );\r
177 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
178 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )\r
179 \r
180 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
181         #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
182 #endif\r
183 \r
184 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
185 \r
186         /* Check the configuration. */\r
187         #if( configMAX_PRIORITIES > 32 )\r
188                 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
189         #endif\r
190 \r
191         /* Store/clear the ready priorities in a bit map. */\r
192         #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
193         #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
194 \r
195         /*-----------------------------------------------------------*/\r
196 \r
197         #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )\r
198 \r
199 #endif /* taskRECORD_READY_PRIORITY */\r
200 \r
201 /*-----------------------------------------------------------*/\r
202 \r
203 /* Task utilities. */\r
204 \r
205 #define portYIELD()                                                             \\r
206 {                                                                                               \\r
207 uint32_t ulCause;                                                       \\r
208                                                                                                 \\r
209         /* Trigger software interrupt. */                       \\r
210         ulCause = _CP0_GET_CAUSE();                                     \\r
211         ulCause |= portSW0_BIT;                                         \\r
212         _CP0_SET_CAUSE( ulCause );                                      \\r
213 }\r
214 \r
215 extern volatile UBaseType_t uxInterruptNesting;\r
216 #define portASSERT_IF_IN_ISR() configASSERT( uxInterruptNesting == 0 )\r
217 \r
218 #define portNOP()       __asm volatile ( "nop" )\r
219 \r
220 /*-----------------------------------------------------------*/\r
221 \r
222 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
223 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __attribute__((noreturn))\r
224 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
225 /*-----------------------------------------------------------*/\r
226 \r
227 #define portEND_SWITCHING_ISR( xSwitchRequired )        if( xSwitchRequired )   \\r
228                                                                                                         {                                               \\r
229                                                                                                                 portYIELD();            \\r
230                                                                                                         }\r
231 \r
232 /* Required by the kernel aware debugger. */\r
233 #ifdef __DEBUG\r
234         #define portREMOVE_STATIC_QUALIFIER\r
235 #endif\r
236 \r
237 #ifdef __cplusplus\r
238 }\r
239 #endif\r
240 \r
241 #endif /* PORTMACRO_H */\r
242 \r