2 FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 This file is part of the FreeRTOS distribution.
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9 FreeRTOS is free software; you can redistribute it and/or modify it under
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10 the terms of the GNU General Public License (version 2) as published by the
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11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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13 ***************************************************************************
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14 >>! NOTE: The modification to the GPL is included to allow you to !<<
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15 >>! distribute a combined work that includes FreeRTOS without being !<<
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16 >>! obliged to provide the source code for proprietary components !<<
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17 >>! outside of the FreeRTOS kernel. !<<
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18 ***************************************************************************
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20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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22 FOR A PARTICULAR PURPOSE. Full license text is available on the following
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23 link: http://www.freertos.org/a00114.html
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25 ***************************************************************************
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27 * FreeRTOS provides completely free yet professionally developed, *
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28 * robust, strictly quality controlled, supported, and cross *
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29 * platform software that is more than just the market leader, it *
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30 * is the industry's de facto standard. *
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32 * Help yourself get started quickly while simultaneously helping *
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33 * to support the FreeRTOS project by purchasing a FreeRTOS *
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34 * tutorial book, reference manual, or both: *
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35 * http://www.FreeRTOS.org/Documentation *
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37 ***************************************************************************
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39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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40 the FAQ page "My application does not run, what could be wrong?". Have you
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41 defined configASSERT()?
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43 http://www.FreeRTOS.org/support - In return for receiving this top quality
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44 embedded software for free we request you assist our global community by
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45 participating in the support forum.
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47 http://www.FreeRTOS.org/training - Investing in training allows your team to
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48 be as productive as possible as early as possible. Now you can receive
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49 FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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50 Ltd, and the world's leading authority on the world's leading RTOS.
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52 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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53 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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54 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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56 http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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57 Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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59 http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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60 Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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61 licenses offer ticketed support, indemnification and commercial middleware.
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63 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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64 engineered and independently SIL3 certified version for use in safety and
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65 mission critical applications that require provable dependability.
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70 /*-----------------------------------------------------------
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71 * Implementation of functions defined in portable.h for the PIC32MZ port.
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72 *----------------------------------------------------------*/
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76 /* Scheduler include files. */
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77 #include "FreeRTOS.h"
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80 #if !defined(__PIC32MZ__)
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81 #error This port is designed to work with XC32 on PIC32MZ MCUs. Please update your C compiler version or settings.
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84 #if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )
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85 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0
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88 /* Hardware specifics. */
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89 #define portTIMER_PRESCALE 8
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90 #define portPRESCALE_BITS 1
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92 /* Bits within various registers. */
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93 #define portIE_BIT ( 0x00000001 )
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94 #define portEXL_BIT ( 0x00000002 )
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95 #define portMX_BIT ( 0x01000000 ) /* Allow access to DSP instructions. */
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96 #define portCU1_BIT ( 0x20000000 ) /* enable CP1 for parts with hardware. */
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97 #define portFR_BIT ( 0x04000000 ) /* Enable 64 bit floating point registers. */
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99 /* Bits within the CAUSE register. */
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100 #define portCORE_SW_0 ( 0x00000100 )
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101 #define portCORE_SW_1 ( 0x00000200 )
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103 /* The EXL bit is set to ensure interrupts do not occur while the context of
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104 the first task is being restored. */
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105 #if ( __mips_hard_float == 1 )
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106 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT | portFR_BIT | portCU1_BIT )
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108 #define portINITIAL_SR ( portIE_BIT | portEXL_BIT | portMX_BIT )
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111 /* The initial value to store into the FPU status and control register. This is
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112 only used on parts that support a hardware FPU. */
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113 #define portINITIAL_FPSCR (0x1000000) /* High perf on denormal ops */
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117 By default port.c generates its tick interrupt from TIMER1. The user can
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118 override this behaviour by:
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119 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),
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120 which is the function that configures the timer. The function is defined
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121 as a weak symbol in this file so if the same function name is used in the
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122 application code then the version in the application code will be linked
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123 into the application in preference to the version defined in this file.
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124 2: Define configTICK_INTERRUPT_VECTOR to the vector number of the timer used
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125 to generate the tick interrupt. For example, when timer 1 is used then
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126 configTICK_INTERRUPT_VECTOR is set to _TIMER_1_VECTOR.
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127 configTICK_INTERRUPT_VECTOR should be defined in FreeRTOSConfig.h.
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128 3: Define configCLEAR_TICK_TIMER_INTERRUPT() to clear the interrupt in the
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129 timer used to generate the tick interrupt. For example, when timer 1 is
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130 used configCLEAR_TICK_TIMER_INTERRUPT() is defined to
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131 IFS0CLR = _IFS0_T1IF_MASK.
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133 #ifndef configTICK_INTERRUPT_VECTOR
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134 #define configTICK_INTERRUPT_VECTOR _TIMER_1_VECTOR
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135 #define configCLEAR_TICK_TIMER_INTERRUPT() IFS0CLR = _IFS0_T1IF_MASK
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137 #ifndef configCLEAR_TICK_TIMER_INTERRUPT
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138 #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.
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142 /* Let the user override the pre-loading of the initial RA with the address of
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143 prvTaskExitError() in case it messes up unwinding of the stack in the
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144 debugger - in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */
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145 #ifdef configTASK_RETURN_ADDRESS
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146 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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148 #define portTASK_RETURN_ADDRESS prvTaskExitError
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151 /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
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152 stack checking. A problem in the ISR stack will trigger an assert, not call the
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153 stack overflow hook function (because the stack overflow hook is specific to a
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154 task stack, not the ISR stack). */
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155 #if( configCHECK_FOR_STACK_OVERFLOW > 2 )
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157 /* Don't use 0xa5 as the stack fill bytes as that is used by the kernerl for
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158 the task stacks, and so will legitimately appear in many positions within
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160 #define portISR_STACK_FILL_BYTE 0xee
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162 static const uint8_t ucExpectedStackBytes[] = {
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163 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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164 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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165 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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166 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
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167 portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \
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169 #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
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171 /* Define the function away. */
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172 #define portCHECK_ISR_STACK()
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173 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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175 /*-----------------------------------------------------------*/
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178 * Used to catch tasks that attempt to return from their implementing function.
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180 static void prvTaskExitError( void );
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182 /*-----------------------------------------------------------*/
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184 /* Records the interrupt nesting depth. This is initialised to one as it is
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185 decremented to 0 when the first task starts. */
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186 volatile UBaseType_t uxInterruptNesting = 0x01;
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188 /* Stores the task stack pointer when a switch is made to use the system stack. */
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189 UBaseType_t uxSavedTaskStackPointer = 0;
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191 /* The stack used by interrupt service routines that cause a context switch. */
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192 StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };
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194 /* The top of stack value ensures there is enough space to store 6 registers on
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195 the callers stack, as some functions seem to want to do this. */
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196 const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
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198 /* Saved as part of the task context. Set to pdFALSE if the task does not
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199 require an FPU context. */
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200 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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201 uint32_t ulTaskHasFPUContext = 0;
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204 /*-----------------------------------------------------------*/
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207 * See header file for description.
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209 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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211 /* Ensure 8 byte alignment is maintained when leaving this function. */
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215 *pxTopOfStack = (StackType_t) 0xDEADBEEF;
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218 *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */
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221 *pxTopOfStack = (StackType_t) _CP0_GET_CAUSE();
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224 *pxTopOfStack = (StackType_t) portINITIAL_SR;/* CP0_STATUS */
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227 *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */
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230 *pxTopOfStack = (StackType_t) 0x00000000; /* DSPControl */
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231 pxTopOfStack -= 7; /* Includes space for AC1 - AC3. */
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233 *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */
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234 pxTopOfStack -= 15;
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236 *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */
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237 pxTopOfStack -= 15;
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239 *pxTopOfStack = (StackType_t) pdFALSE; /*by default disable FPU context save on parts with FPU */
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241 return pxTopOfStack;
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243 /*-----------------------------------------------------------*/
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245 static void prvTaskExitError( void )
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247 /* A function that implements a task must not exit or attempt to return to
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248 its caller as there is nothing to return to. If a task wants to exit it
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249 should instead call vTaskDelete( NULL ).
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251 Artificially force an assert() to be triggered if configASSERT() is
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252 defined, then stop here so application writers can catch the error. */
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253 configASSERT( uxSavedTaskStackPointer == 0UL );
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254 portDISABLE_INTERRUPTS();
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257 /*-----------------------------------------------------------*/
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260 * Setup a timer for a regular tick. This function uses peripheral timer 1.
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261 * The function is declared weak so an application writer can use a different
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262 * timer by redefining this implementation. If a different timer is used then
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263 * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to
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264 * ensure the RTOS provided tick interrupt handler is installed on the correct
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265 * vector number. When Timer 1 is used the vector number is defined as
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268 __attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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270 const uint32_t ulCompareMatch = ( (configPERIPHERAL_CLOCK_HZ / portTIMER_PRESCALE) / configTICK_RATE_HZ ) - 1UL;
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273 T1CONbits.TCKPS = portPRESCALE_BITS;
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274 PR1 = ulCompareMatch;
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275 IPC1bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
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277 /* Clear the interrupt as a starting condition. */
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280 /* Enable the interrupt. */
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283 /* Start the timer. */
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286 /*-----------------------------------------------------------*/
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288 void vPortEndScheduler(void)
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290 /* Not implemented in ports where there is nothing to return to.
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291 Artificially force an assert. */
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292 configASSERT( uxInterruptNesting == 1000UL );
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294 /*-----------------------------------------------------------*/
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296 BaseType_t xPortStartScheduler( void )
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298 extern void vPortStartFirstTask( void );
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299 extern void *pxCurrentTCB;
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301 #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )
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303 /* Fill the ISR stack to make it easy to asses how much is being used. */
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304 memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
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306 #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
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308 /* Clear the software interrupt flag. */
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309 IFS0CLR = _IFS0_CS0IF_MASK;
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311 /* Set software timer priority. */
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312 IPC0CLR = _IPC0_CS0IP_MASK;
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313 IPC0SET = ( configKERNEL_INTERRUPT_PRIORITY << _IPC0_CS0IP_POSITION );
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315 /* Enable software interrupt. */
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316 IEC0CLR = _IEC0_CS0IE_MASK;
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317 IEC0SET = 1 << _IEC0_CS0IE_POSITION;
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319 /* Setup the timer to generate the tick. Interrupts will have been
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320 disabled by the time we get here. */
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321 vApplicationSetupTickTimerInterrupt();
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323 /* Kick off the highest priority task that has been created so far.
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324 Its stack location is loaded into uxSavedTaskStackPointer. */
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325 uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;
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326 vPortStartFirstTask();
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328 /* Should never get here as the tasks will now be executing! Call the task
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329 exit error function to prevent compiler warnings about a static function
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330 not being called in the case that the application writer overrides this
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331 functionality by defining configTASK_RETURN_ADDRESS. */
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332 prvTaskExitError();
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336 /*-----------------------------------------------------------*/
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338 void vPortIncrementTick( void )
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340 UBaseType_t uxSavedStatus;
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342 uxSavedStatus = uxPortSetInterruptMaskFromISR();
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344 if( xTaskIncrementTick() != pdFALSE )
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346 /* Pend a context switch. */
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347 _CP0_BIS_CAUSE( portCORE_SW_0 );
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350 vPortClearInterruptMaskFromISR( uxSavedStatus );
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352 /* Look for the ISR stack getting near or past its limit. */
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353 portCHECK_ISR_STACK();
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355 /* Clear timer interrupt. */
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356 configCLEAR_TICK_TIMER_INTERRUPT();
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358 /*-----------------------------------------------------------*/
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360 UBaseType_t uxPortSetInterruptMaskFromISR( void )
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362 UBaseType_t uxSavedStatusRegister;
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364 __builtin_disable_interrupts();
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365 uxSavedStatusRegister = _CP0_GET_STATUS() | 0x01;
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366 /* This clears the IPL bits, then sets them to
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367 configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called
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368 from an interrupt that has a priority above
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369 configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action
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370 can only result in the IPL being unchanged or raised, and therefore never
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372 _CP0_SET_STATUS( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );
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374 return uxSavedStatusRegister;
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376 /*-----------------------------------------------------------*/
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378 void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )
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380 _CP0_SET_STATUS( uxSavedStatusRegister );
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382 /*-----------------------------------------------------------*/
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384 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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386 void vPortTaskUsesFPU(void)
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388 extern void vPortInitialiseFPSCR( uint32_t uxFPSCRInit );
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390 portENTER_CRITICAL();
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392 /* Initialise the floating point status register. */
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393 vPortInitialiseFPSCR(portINITIAL_FPSCR);
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395 /* A task is registering the fact that it needs a FPU context. Set the
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396 FPU flag (saved as part of the task context). */
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397 ulTaskHasFPUContext = pdTRUE;
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399 portEXIT_CRITICAL();
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402 #endif /* __mips_hard_float == 1 */
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404 /*-----------------------------------------------------------*/
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