2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /*-----------------------------------------------------------
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30 * Implementation of functions defined in portable.h for the ARM CM4F port.
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31 *----------------------------------------------------------*/
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33 /* Scheduler includes. */
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34 #include "FreeRTOS.h"
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38 #ifndef configSYSTICK_CLOCK_HZ
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39 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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40 /* Ensure the SysTick is clocked at the same frequency as the core. */
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41 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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43 /* The way the SysTick is clocked is not modified in case it is not the same
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45 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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48 /* Constants required to manipulate the core. Registers first... */
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49 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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50 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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51 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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52 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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53 /* ...then bits in the registers. */
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54 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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55 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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56 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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57 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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58 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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60 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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61 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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63 /* Constants required to check the validity of an interrupt priority. */
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64 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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65 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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66 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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67 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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68 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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69 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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70 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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71 #define portPRIGROUP_SHIFT ( 8UL )
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73 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */
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74 #define portVECTACTIVE_MASK ( 0xFFUL )
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76 /* Constants required to manipulate the VFP. */
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77 #define portFPCCR ( ( volatile uint32_t * ) 0xe000ef34 ) /* Floating point context control register. */
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78 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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80 /* Constants required to set up the initial stack. */
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81 #define portINITIAL_XPSR ( 0x01000000 )
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82 #define portINITIAL_EXC_RETURN ( 0xfffffffd )
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84 /* The systick is a 24-bit counter. */
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85 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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87 /* A fiddle factor to estimate the number of SysTick counts that would have
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88 occurred while the SysTick counter is stopped during tickless idle
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90 #define portMISSED_COUNTS_FACTOR ( 45UL )
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92 /* Let the user override the pre-loading of the initial LR with the address of
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93 prvTaskExitError() in case it messes up unwinding of the stack in the
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95 #ifdef configTASK_RETURN_ADDRESS
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96 #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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98 #define portTASK_RETURN_ADDRESS prvTaskExitError
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101 /* Cannot find a weak linkage attribute, so the
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102 configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if the
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103 application writer wants to provide their own implementation of
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104 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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106 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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107 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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110 /* Manual definition of missing asm names. */
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118 extern void *pxCurrentTCB;
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120 /* Each task maintains its own interrupt status in the critical nesting
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122 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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125 * Setup the timer to generate the tick interrupts. The implementation in this
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126 * file is weak to allow application writers to change the timer used to
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127 * generate the tick interrupt.
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129 void vPortSetupTimerInterrupt( void );
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132 * Exception handlers.
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134 void xPortPendSVHandler( void );
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135 void xPortSysTickHandler( void );
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136 void vPortSVCHandler( void );
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139 * Start first task is a separate function so it can be tested in isolation.
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141 static void prvPortStartFirstTask( void );
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144 * Function to enable the VFP.
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146 static void vPortEnableVFP( void );
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149 * Used to catch tasks that attempt to return from their implementing function.
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151 static void prvTaskExitError( void );
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153 /*-----------------------------------------------------------*/
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156 * The number of SysTick increments that make up one tick period.
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158 #if( configUSE_TICKLESS_IDLE == 1 )
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159 static uint32_t ulTimerCountsForOneTick = 0;
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160 #endif /* configUSE_TICKLESS_IDLE */
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163 * The maximum number of tick periods that can be suppressed is limited by the
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164 * 24 bit resolution of the SysTick timer.
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166 #if( configUSE_TICKLESS_IDLE == 1 )
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167 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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168 #endif /* configUSE_TICKLESS_IDLE */
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171 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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172 * power functionality only.
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174 #if( configUSE_TICKLESS_IDLE == 1 )
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175 static uint32_t ulStoppedTimerCompensation = 0;
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176 #endif /* configUSE_TICKLESS_IDLE */
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179 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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180 * FreeRTOS API functions are not called from interrupts that have been assigned
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181 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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183 #if ( configASSERT_DEFINED == 1 )
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184 static uint8_t ucMaxSysCallPriority = 0;
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185 static uint32_t ulMaxPRIGROUPValue = 0;
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186 #endif /* configASSERT_DEFINED */
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188 /*-----------------------------------------------------------*/
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191 * See header file for description.
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193 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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195 /* Simulate the stack frame as it would be created by a context switch
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198 /* Offset added to account for the way the MCU uses the stack on entry/exit
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199 of interrupts, and to ensure alignment. */
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202 /* Sometimes the parameters are loaded from the stack. */
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203 *pxTopOfStack = ( StackType_t ) pvParameters;
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206 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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208 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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210 *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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212 /* Save code space by skipping register initialisation. */
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213 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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214 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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216 /* A save method is being used that requires each task to maintain its
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217 own exec return value. */
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219 *pxTopOfStack = portINITIAL_EXC_RETURN;
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221 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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223 return pxTopOfStack;
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225 /*-----------------------------------------------------------*/
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227 static void prvTaskExitError( void )
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229 /* A function that implements a task must not exit or attempt to return to
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230 its caller as there is nothing to return to. If a task wants to exit it
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231 should instead call vTaskDelete( NULL ).
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233 Artificially force an assert() to be triggered if configASSERT() is
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234 defined, then stop here so application writers can catch the error. */
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235 configASSERT( uxCriticalNesting == ~0UL );
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236 portDISABLE_INTERRUPTS();
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239 /*-----------------------------------------------------------*/
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241 void vPortSVCHandler( void ) iv IVT_INT_SVCall ics ICS_OFF
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244 ldr r3, =_pxCurrentTCB /* Restore the context. */
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245 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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246 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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247 ldm r0!, (r4-r11, r14)/* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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248 msr psp, r0 /* Restore the task stack pointer. */
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255 /*-----------------------------------------------------------*/
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257 static void prvPortStartFirstTask( void )
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260 ldr r0, =0xE000ED08 /* Use the NVIC offset register to locate the stack. */
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263 msr msp, r0 /* Set the msp back to the start of the stack. */
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264 /* Clear the bit that indicates the FPU is in use in case the FPU was used
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265 before the scheduler was started - which would otherwise result in the
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266 unnecessary leaving of space in the SVC stack for lazy saving of FPU
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270 cpsie i /* Globally enable interrupts. */
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274 svc #0 /* System call to start first task. */
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278 /*-----------------------------------------------------------*/
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281 * See header file for description.
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283 BaseType_t xPortStartScheduler( void )
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285 /* configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0.
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286 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */
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287 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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289 #if( configASSERT_DEFINED == 1 )
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291 volatile uint32_t ulOriginalPriority;
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292 volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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293 volatile uint8_t ucMaxPriorityValue;
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295 /* Determine the maximum priority from which ISR safe FreeRTOS API
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296 functions can be called. ISR safe functions are those that end in
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297 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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298 ensure interrupt entry is as fast and simple as possible.
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300 Save the interrupt priority value that is about to be clobbered. */
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301 ulOriginalPriority = *pucFirstUserPriorityRegister;
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303 /* Determine the number of priority bits available. First write to all
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305 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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307 /* Read the value back to see how many bits stuck. */
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308 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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310 /* The kernel interrupt priority should be set to the lowest
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312 configASSERT( ucMaxPriorityValue == ( configKERNEL_INTERRUPT_PRIORITY & ucMaxPriorityValue ) );
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314 /* Use the same mask on the maximum system call priority. */
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315 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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317 /* Calculate the maximum acceptable priority group value for the number
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318 of bits read back. */
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319 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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320 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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322 ulMaxPRIGROUPValue--;
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323 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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326 #ifdef __NVIC_PRIO_BITS
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328 /* Check the CMSIS configuration that defines the number of
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329 priority bits matches the number of priority bits actually queried
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330 from the hardware. */
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331 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == __NVIC_PRIO_BITS );
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335 #ifdef configPRIO_BITS
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337 /* Check the FreeRTOS configuration that defines the number of
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338 priority bits matches the number of priority bits actually queried
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339 from the hardware. */
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340 configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
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344 /* Shift the priority group value back to its position within the AIRCR
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346 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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347 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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349 /* Restore the clobbered interrupt priority register to its original
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351 *pucFirstUserPriorityRegister = ulOriginalPriority;
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353 #endif /* conifgASSERT_DEFINED */
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355 /* Make PendSV and SysTick the lowest priority interrupts. */
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356 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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357 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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359 /* Start the timer that generates the tick ISR. Interrupts are disabled
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361 vPortSetupTimerInterrupt();
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363 /* Initialise the critical nesting count ready for the first task. */
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364 uxCriticalNesting = 0;
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366 /* Ensure the VFP is enabled - it should be anyway. */
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369 /* Lazy save always. */
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370 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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372 /* Start the first task. */
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373 prvPortStartFirstTask();
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375 /* Should never get here as the tasks will now be executing! Call the task
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376 exit error function to prevent compiler warnings about a static function
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377 not being called in the case that the application writer overrides this
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378 functionality by defining configTASK_RETURN_ADDRESS. */
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379 prvTaskExitError();
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381 /* Should not get here! */
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384 /*-----------------------------------------------------------*/
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386 void vPortEndScheduler( void )
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388 /* Not implemented in ports where there is nothing to return to.
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389 Artificially force an assert. */
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390 configASSERT( uxCriticalNesting == 1000UL );
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392 /*-----------------------------------------------------------*/
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394 void vPortEnterCritical( void )
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396 portDISABLE_INTERRUPTS();
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397 uxCriticalNesting++;
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399 /* This is not the interrupt safe version of the enter critical function so
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400 assert() if it is being called from an interrupt context. Only API
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401 functions that end in "FromISR" can be used in an interrupt. Only assert if
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402 the critical nesting count is 1 to protect against recursive calls if the
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403 assert function also uses a critical section. */
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404 if( uxCriticalNesting == 1 )
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406 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
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409 /*-----------------------------------------------------------*/
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411 void vPortExitCritical( void )
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413 configASSERT( uxCriticalNesting );
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414 uxCriticalNesting--;
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415 if( uxCriticalNesting == 0 )
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417 portENABLE_INTERRUPTS();
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420 /*-----------------------------------------------------------*/
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422 const uint8_t ucMaxSyscallInterruptPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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423 void xPortPendSVHandler( void ) iv IVT_INT_PendSV ics ICS_OFF
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427 /* The function is not truly naked, so add back the 4 bytes subtracted
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428 from the stack pointer by the function prologue. */
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434 ldr r3, =_pxCurrentTCB /* Get the location of the current TCB. */
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437 tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
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439 vstmdbeq r0!, (s16-s31)
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441 stmdb r0!, (r4-r11, r14) /* Save the core registers. */
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443 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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445 stmdb sp!, (r0, r3)
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446 ldr r0, =_ucMaxSyscallInterruptPriority
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451 bl _vTaskSwitchContext
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456 ldr r1, [r3] /* The first item in pxCurrentTCB is the task top of stack. */
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459 ldm r0!, (r4-r11, r14) /* Pop the core registers. */
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461 tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
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463 vldmiaeq r0!, (s16-s31)
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470 /*-----------------------------------------------------------*/
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472 void xPortSysTickHandler( void ) iv IVT_INT_SysTick ics ICS_AUTO
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474 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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475 executes all interrupts must be unmasked. There is therefore no need to
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476 save and then restore the interrupt mask value as its value is already
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477 known - therefore the slightly faster portDISABLE_INTERRUPTS() function is
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478 used in place of portSET_INTERRUPT_MASK_FROM_ISR(). */
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479 portDISABLE_INTERRUPTS();
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481 /* Increment the RTOS tick. */
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482 if( xTaskIncrementTick() != pdFALSE )
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484 /* A context switch is required. Context switching is performed in
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485 the PendSV interrupt. Pend the PendSV interrupt. */
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486 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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489 portENABLE_INTERRUPTS();
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491 /*-----------------------------------------------------------*/
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493 #if( ( configUSE_TICKLESS_IDLE == 1 ) && ( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 ) )
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495 void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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497 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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498 TickType_t xModifiableIdleTime;
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500 /* Make sure the SysTick reload value does not overflow the counter. */
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501 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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503 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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506 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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507 is accounted for as best it can be, but using the tickless mode will
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508 inevitably result in some tiny drift of the time maintained by the
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509 kernel with respect to calendar time. */
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510 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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512 /* Calculate the reload value required to wait xExpectedIdleTime
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513 tick periods. -1 is used because this code will execute part way
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514 through one of the tick periods. */
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515 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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516 if( ulReloadValue > ulStoppedTimerCompensation )
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518 ulReloadValue -= ulStoppedTimerCompensation;
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521 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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522 method as that will mask interrupts that should exit sleep mode. */
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523 __asm { "cpsid i" };
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527 /* If a context switch is pending or a task is waiting for the scheduler
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528 to be unsuspended then abandon the low power entry. */
\r
529 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
\r
531 /* Restart from whatever is left in the count register to complete
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532 this tick period. */
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533 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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535 /* Restart SysTick. */
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536 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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538 /* Reset the reload register to the value required for normal tick
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540 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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542 /* Re-enable interrupts - see comments above the cpsid instruction()
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544 __asm { "cpsie i" };
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548 /* Set the new reload value. */
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549 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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551 /* Clear the SysTick count flag and set the count value back to
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553 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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555 /* Restart SysTick. */
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556 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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558 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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559 set its parameter to 0 to indicate that its implementation contains
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560 its own wait for interrupt or wait for event instruction, and so wfi
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561 should not be executed again. However, the original expected idle
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562 time variable must remain unmodified, so a copy is taken. */
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563 xModifiableIdleTime = xExpectedIdleTime;
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564 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
\r
565 if( xModifiableIdleTime > 0 )
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571 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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573 /* Re-enable interrupts to allow the interrupt that brought the MCU
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574 out of sleep mode to execute immediately. see comments above
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575 __disable_interrupt() call above. */
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576 __asm { "cpsie i" };
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580 /* Disable interrupts again because the clock is about to be stopped
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581 and interrupts that execute while the clock is stopped will increase
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582 any slippage between the time maintained by the RTOS and calendar
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584 __asm { "cpsid i" };
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588 /* Disable the SysTick clock without reading the
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589 portNVIC_SYSTICK_CTRL_REG register to ensure the
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590 portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set. Again,
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591 the time the SysTick is stopped for is accounted for as best it can
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592 be, but using the tickless mode will inevitably result in some tiny
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593 drift of the time maintained by the kernel with respect to calendar
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595 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
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597 /* Determine if the SysTick clock has already counted to zero and
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598 been set back to the current reload value (the reload back being
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599 correct for the entire expected idle time) or if the SysTick is yet
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600 to count to zero (in which case an interrupt other than the SysTick
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601 must have brought the system out of sleep mode). */
\r
602 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
\r
604 uint32_t ulCalculatedLoadValue;
\r
606 /* The tick interrupt is already pending, and the SysTick count
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607 reloaded with ulReloadValue. Reset the
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608 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
\r
610 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
\r
612 /* Don't allow a tiny value, or values that have somehow
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613 underflowed because the post sleep hook did something
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614 that took too long. */
\r
615 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
617 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
620 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
622 /* As the pending tick will be processed as soon as this
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623 function exits, the tick value maintained by the tick is stepped
\r
624 forward by one less than the time spent waiting. */
\r
625 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
\r
629 /* Something other than the tick interrupt ended the sleep.
\r
630 Work out how long the sleep lasted rounded to complete tick
\r
631 periods (not the ulReload value which accounted for part
\r
633 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
\r
635 /* How many complete tick periods passed while the processor
\r
637 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
639 /* The reload value is set to whatever fraction of a single tick
\r
641 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
644 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
645 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
\r
647 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
648 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
649 vTaskStepTick( ulCompleteTickPeriods );
\r
650 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
652 /* Exit with interrpts enabled. */
\r
653 __asm { "cpsie i" };
\r
657 #endif /* #if configUSE_TICKLESS_IDLE */
\r
658 /*-----------------------------------------------------------*/
\r
661 * Setup the systick timer to generate the tick interrupts at the required
\r
664 #if( configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0 )
\r
666 void vPortSetupTimerInterrupt( void )
\r
668 /* Calculate the constants required to configure the tick interrupt. */
\r
669 #if( configUSE_TICKLESS_IDLE == 1 )
\r
671 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
672 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
673 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
675 #endif /* configUSE_TICKLESS_IDLE */
\r
677 /* Reset SysTick. */
\r
678 portNVIC_SYSTICK_CTRL_REG = 0UL;
\r
679 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
681 /* Configure SysTick to interrupt at the requested rate. */
\r
682 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
683 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
686 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
687 /*-----------------------------------------------------------*/
\r
689 /* This is a naked function. */
\r
690 static void vPortEnableVFP( void )
\r
693 ldr r0, =0xE000ED88 /* The FPU enable bits are in the CPACR. */
\r
696 orr r1, r1, #0xF00000 /* Enable CP10 and CP11 coprocessors, then save back. */
\r
701 /*-----------------------------------------------------------*/
\r
703 BaseType_t xPortIsInsideInterrupt( void )
\r
705 BaseType_t xReturn;
\r
707 /* Obtain the number of the currently executing interrupt. */
\r
708 if( CPU_REG_GET( CPU_IPSR ) == 0 )
\r
719 /*-----------------------------------------------------------*/
\r
721 #if( configASSERT_DEFINED == 1 )
\r
723 /* Limitations in the MikroC inline asm means ulCurrentInterrupt has to be
\r
724 global - which makes vPortValidateInterruptPriority() non re-entrant.
\r
725 However that should not matter as an interrupt can only itself be
\r
726 interrupted by a higher priority interrupt. That means if
\r
727 ulCurrentInterrupt, so ulCurrentInterrupt getting corrupted cannot lead to
\r
728 an invalid interrupt priority being missed. */
\r
729 uint32_t ulCurrentInterrupt;
\r
730 uint8_t ucCurrentPriority;
\r
731 void vPortValidateInterruptPriority( void )
\r
733 /* Obtain the number of the currently executing interrupt. */
\r
734 __asm { push (r0, r1)
\r
736 ldr r1, =_ulCurrentInterrupt
\r
741 /* Is the interrupt number a user defined interrupt? */
\r
742 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
744 /* Look up the interrupt's priority. */
\r
745 ucCurrentPriority = *( ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + ulCurrentInterrupt ) );
\r
747 /* The following assertion will fail if a service routine (ISR) for
\r
748 an interrupt that has been assigned a priority above
\r
749 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
750 function. ISR safe FreeRTOS API functions must *only* be called
\r
751 from interrupts that have been assigned a priority at or below
\r
752 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
754 Numerically low interrupt priority numbers represent logically high
\r
755 interrupt priorities, therefore the priority of the interrupt must
\r
756 be set to a value equal to or numerically *higher* than
\r
757 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
759 Interrupts that use the FreeRTOS API must not be left at their
\r
760 default priority of zero as that is the highest possible priority,
\r
761 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
762 and therefore also guaranteed to be invalid.
\r
764 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
765 interrupt entry is as fast and simple as possible.
\r
767 The following links provide detailed information:
\r
768 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
769 http://www.freertos.org/FAQHelp.html */
\r
770 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
773 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
774 that define each interrupt's priority to be split between bits that
\r
775 define the interrupt's pre-emption priority bits and bits that define
\r
776 the interrupt's sub-priority. For simplicity all bits must be defined
\r
777 to be pre-emption priority bits. The following assertion will fail if
\r
778 this is not the case (if some bits represent a sub-priority).
\r
780 If the application only uses CMSIS libraries for interrupt
\r
781 configuration then the correct setting can be achieved on all Cortex-M
\r
782 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
783 scheduler. Note however that some vendor specific peripheral libraries
\r
784 assume a non-zero priority group setting, in which cases using a value
\r
785 of zero will result in unpredictable behaviour. */
\r
786 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
789 #endif /* configASSERT_DEFINED */