2 FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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76 /* Standard includes. */
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79 /* Scheduler includes. */
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80 #include "FreeRTOS.h"
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83 /* Constants required to setup the initial task context. */
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84 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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85 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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86 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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87 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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89 /* Constants required to setup the tick ISR. */
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90 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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91 #define portPRESCALE_VALUE 0x00
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92 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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93 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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95 /* Constants required to setup the VIC for the tick ISR. */
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96 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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97 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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98 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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100 /* Constants required to handle interrupts. */
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101 #define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 )
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102 #define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 )
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104 /*-----------------------------------------------------------*/
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106 /* The code generated by the Keil compiler does not maintain separate
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107 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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108 use the stack as per other ports. Instead a variable is used to keep
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109 track of the critical section nesting. This variable has to be stored
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110 as part of the task context and must be initialised to a non zero value. */
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112 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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113 volatile unsigned portLONG ulCriticalNesting = 9999UL;
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115 /*-----------------------------------------------------------*/
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117 /* Setup the timer to generate the tick interrupts. */
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118 static void prvSetupTimerInterrupt( void );
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121 * The scheduler can only be started from ARM mode, so
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122 * vPortStartFirstSTask() is defined in portISR.c.
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124 extern __asm void vPortStartFirstTask( void );
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126 /*-----------------------------------------------------------*/
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129 * See header file for description.
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131 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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133 portSTACK_TYPE *pxOriginalTOS;
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135 /* Setup the initial stack of the task. The stack is set exactly as
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136 expected by the portRESTORE_CONTEXT() macro.
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138 Remember where the top of the (simulated) stack is before we place
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140 pxOriginalTOS = pxTopOfStack;
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142 /* To ensure asserts in tasks.c don't fail, although in this case the assert
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143 is not really required. */
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146 /* First on the stack is the return address - which in this case is the
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147 start of the task. The offset is added to make the return address appear
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148 as it would within an IRQ ISR. */
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149 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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152 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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154 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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156 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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158 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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160 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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162 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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164 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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166 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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168 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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170 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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172 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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174 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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176 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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178 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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180 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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183 /* The last thing onto the stack is the status register, which is set for
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184 system mode, with interrupts enabled. */
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185 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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187 if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL )
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189 /* We want the task to start in thumb mode. */
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190 *pxTopOfStack |= portTHUMB_MODE_BIT;
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195 /* The code generated by the Keil compiler does not maintain separate
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196 stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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197 use the stack as per other ports. Instead a variable is used to keep
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198 track of the critical section nesting. This variable has to be stored
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199 as part of the task context and is initially set to zero. */
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200 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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202 return pxTopOfStack;
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204 /*-----------------------------------------------------------*/
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206 portBASE_TYPE xPortStartScheduler( void )
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208 /* Start the timer that generates the tick ISR. */
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209 prvSetupTimerInterrupt();
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211 /* Start the first task. This is done from portISR.c as ARM mode must be
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213 vPortStartFirstTask();
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215 /* Should not get here! */
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218 /*-----------------------------------------------------------*/
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220 void vPortEndScheduler( void )
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222 /* It is unlikely that the ARM port will require this function as there
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223 is nothing to return to. If this is required - stop the tick ISR then
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224 return back to main. */
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226 /*-----------------------------------------------------------*/
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228 #if configUSE_PREEMPTION == 0
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231 * The cooperative scheduler requires a normal IRQ service routine to
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232 * simply increment the system tick.
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234 void vNonPreemptiveTick( void ) __irq;
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235 void vNonPreemptiveTick( void ) __irq
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237 /* Increment the tick count - this may make a delaying task ready
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238 to run - but a context switch is not performed. */
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239 vTaskIncrementTick();
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241 T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */
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242 VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */
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248 **************************************************************************
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249 * The preemptive scheduler ISR is written in assembler and can be found
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250 * in the portASM.s file. This will only get used if portUSE_PREEMPTION
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251 * is set to 1 in portmacro.h
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252 **************************************************************************
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255 void vPreemptiveTick( void );
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258 /*-----------------------------------------------------------*/
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260 static void prvSetupTimerInterrupt( void )
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262 unsigned portLONG ulCompareMatch;
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264 /* A 1ms tick does not require the use of the timer prescale. This is
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265 defaulted to zero but can be used if necessary. */
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266 T0PR = portPRESCALE_VALUE;
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268 /* Calculate the match value required for our wanted tick rate. */
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269 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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271 /* Protect against divide by zero. Using an if() statement still results
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272 in a warning - hence the #if. */
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273 #if portPRESCALE_VALUE != 0
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275 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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279 T0MR0 = ulCompareMatch;
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281 /* Generate tick with timer 0 compare match. */
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282 T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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284 /* Setup the VIC for the timer. */
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285 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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286 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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288 /* The ISR installed depends on whether the preemptive or cooperative
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289 scheduler is being used. */
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290 #if configUSE_PREEMPTION == 1
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292 VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick;
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296 VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick;
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300 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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302 /* Start the timer - interrupts are disabled when this function is called
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303 so it is okay to do this here. */
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304 T0TCR = portENABLE_TIMER;
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306 /*-----------------------------------------------------------*/
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308 void vPortEnterCritical( void )
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310 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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313 /* Now interrupts are disabled ulCriticalNesting can be accessed
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314 directly. Increment ulCriticalNesting to keep a count of how many times
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315 portENTER_CRITICAL() has been called. */
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316 ulCriticalNesting++;
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318 /*-----------------------------------------------------------*/
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320 void vPortExitCritical( void )
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322 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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324 /* Decrement the nesting count as we are leaving a critical section. */
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325 ulCriticalNesting--;
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327 /* If the nesting level has reached zero then interrupts should be
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329 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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331 /* Enable interrupts as per portEXIT_CRITICAL(). */
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336 /*-----------------------------------------------------------*/
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