2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM CM0 port.
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68 *----------------------------------------------------------*/
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70 /* Scheduler includes. */
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71 #include "FreeRTOS.h"
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74 /* Constants required to manipulate the NVIC. */
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75 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
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76 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
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77 #define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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78 #define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
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79 #define portNVIC_SYSTICK_CLK 0x00000004
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80 #define portNVIC_SYSTICK_INT 0x00000002
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81 #define portNVIC_SYSTICK_ENABLE 0x00000001
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82 #define portNVIC_PENDSVSET 0x10000000
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83 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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84 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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85 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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87 /* Constants required to set up the initial stack. */
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88 #define portINITIAL_XPSR ( 0x01000000 )
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90 /* Constants used with memory barrier intrinsics. */
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91 #define portSY_FULL_READ_WRITE ( 15 )
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93 /* Each task maintains its own interrupt status in the critical nesting
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95 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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98 * Setup the timer to generate the tick interrupts.
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100 static void prvSetupTimerInterrupt( void );
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103 * Exception handlers.
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105 void xPortPendSVHandler( void );
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106 void xPortSysTickHandler( void );
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107 void vPortSVCHandler( void );
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110 * Start first task is a separate function so it can be tested in isolation.
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112 static void prvPortStartFirstTask( void );
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115 * Used to catch tasks that attempt to return from their implementing function.
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117 static void prvTaskExitError( void );
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119 /*-----------------------------------------------------------*/
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122 * See header file for description.
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124 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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126 /* Simulate the stack frame as it would be created by a context switch
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128 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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129 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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131 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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133 *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */
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134 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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135 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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136 pxTopOfStack -= 8; /* R11..R4. */
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138 return pxTopOfStack;
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140 /*-----------------------------------------------------------*/
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142 static void prvTaskExitError( void )
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144 /* A function that implements a task must not exit or attempt to return to
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145 its caller as there is nothing to return to. If a task wants to exit it
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146 should instead call vTaskDelete( NULL ).
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148 Artificially force an assert() to be triggered if configASSERT() is
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149 defined, then stop here so application writers can catch the error. */
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150 configASSERT( uxCriticalNesting == ~0UL );
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151 portDISABLE_INTERRUPTS();
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154 /*-----------------------------------------------------------*/
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156 void vPortSVCHandler( void )
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158 /* This function is no longer used, but retained for backward
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161 /*-----------------------------------------------------------*/
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163 __asm void prvPortStartFirstTask( void )
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165 extern pxCurrentTCB;
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169 /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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170 table offset register that can be used to locate the initial stack value.
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171 Not all M0 parts have the application vector table at address 0. */
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173 ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */
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175 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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176 adds r0, #32 /* Discard everything up to r0. */
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177 msr psp, r0 /* This is now the new top of stack to use in the task. */
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178 movs r0, #2 /* Switch to the psp stack. */
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180 pop {r0-r5} /* Pop the registers that are saved automatically. */
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181 mov lr, r5 /* lr is now in r5. */
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182 cpsie i /* The first task has its context and interrupts can be enabled. */
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183 pop {pc} /* Finally, pop the PC to jump to the user defined task code. */
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187 /*-----------------------------------------------------------*/
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190 * See header file for description.
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192 portBASE_TYPE xPortStartScheduler( void )
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194 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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195 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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196 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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198 /* Start the timer that generates the tick ISR. Interrupts are disabled
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200 prvSetupTimerInterrupt();
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202 /* Initialise the critical nesting count ready for the first task. */
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203 uxCriticalNesting = 0;
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205 /* Start the first task. */
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206 prvPortStartFirstTask();
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208 /* Should not get here! */
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211 /*-----------------------------------------------------------*/
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213 void vPortEndScheduler( void )
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215 /* It is unlikely that the CM0 port will require this function as there
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216 is nothing to return to. */
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218 /*-----------------------------------------------------------*/
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220 void vPortYield( void )
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222 /* Set a PendSV to request a context switch. */
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223 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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225 /* Barriers are normally not required but do ensure the code is completely
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226 within the specified behaviour for the architecture. */
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227 __dsb( portSY_FULL_READ_WRITE );
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228 __isb( portSY_FULL_READ_WRITE );
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230 /*-----------------------------------------------------------*/
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232 void vPortEnterCritical( void )
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234 portDISABLE_INTERRUPTS();
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235 uxCriticalNesting++;
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236 __dsb( portSY_FULL_READ_WRITE );
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237 __isb( portSY_FULL_READ_WRITE );
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239 /*-----------------------------------------------------------*/
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241 void vPortExitCritical( void )
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243 uxCriticalNesting--;
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244 if( uxCriticalNesting == 0 )
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246 portENABLE_INTERRUPTS();
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249 /*-----------------------------------------------------------*/
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251 __asm unsigned long ulSetInterruptMaskFromISR( void )
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257 /*-----------------------------------------------------------*/
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259 __asm void vClearInterruptMaskFromISR( unsigned long ulMask )
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264 /*-----------------------------------------------------------*/
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266 __asm void xPortPendSVHandler( void )
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268 extern vTaskSwitchContext
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269 extern pxCurrentTCB
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275 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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278 subs r0, #32 /* Make space for the remaining low registers. */
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279 str r0, [r2] /* Save the new top of stack. */
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280 stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */
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281 mov r4, r8 /* Store the high registers. */
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289 bl vTaskSwitchContext
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291 pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */
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294 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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295 adds r0, #16 /* Move to the high registers. */
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296 ldmia r0!, {r4-r7} /* Pop the high registers. */
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302 msr psp, r0 /* Remember the new top of stack for the task. */
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304 subs r0, #32 /* Go back for the low registers that are not automatically restored. */
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305 ldmia r0!, {r4-r7} /* Pop low registers. */
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310 /*-----------------------------------------------------------*/
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312 void xPortSysTickHandler( void )
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314 unsigned long ulPreviousMask;
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316 ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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318 /* Increment the RTOS tick. */
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319 if( xTaskIncrementTick() != pdFALSE )
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321 /* Pend a context switch. */
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322 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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325 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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327 /*-----------------------------------------------------------*/
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330 * Setup the systick timer to generate the tick interrupts at the required
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333 void prvSetupTimerInterrupt( void )
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335 /* Configure SysTick to interrupt at the requested rate. */
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336 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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337 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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339 /*-----------------------------------------------------------*/
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