2 FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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32 >>>NOTE<<< The modification to the GPL is included to allow you to
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33 distribute a combined work that includes FreeRTOS without being obliged to
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34 provide the source code for proprietary components outside of the FreeRTOS
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35 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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36 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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37 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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38 more details. You should have received a copy of the GNU General Public
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39 License and the FreeRTOS license exception along with FreeRTOS; if not it
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40 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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41 by writing to Richard Barry, contact details for whom are available on the
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46 ***************************************************************************
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48 * Having a problem? Start by reading the FAQ "My application does *
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49 * not run, what could be wrong?" *
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51 * http://www.FreeRTOS.org/FAQHelp.html *
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53 ***************************************************************************
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56 http://www.FreeRTOS.org - Documentation, training, latest versions, license
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57 and contact details.
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59 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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60 including FreeRTOS+Trace - an indispensable productivity tool.
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62 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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63 the code with commercial support, indemnification, and middleware, under
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64 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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65 provide a safety engineered and independently SIL3 certified version under
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66 the SafeRTOS brand: http://www.SafeRTOS.com.
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69 /*-----------------------------------------------------------
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70 * Implementation of functions defined in portable.h for the ARM CM3 port.
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71 *----------------------------------------------------------*/
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73 /* Scheduler includes. */
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74 #include "FreeRTOS.h"
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77 #ifndef configKERNEL_INTERRUPT_PRIORITY
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78 #define configKERNEL_INTERRUPT_PRIORITY 255
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81 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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82 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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85 #ifndef configSYSTICK_CLOCK_HZ
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86 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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87 #if configUSE_TICKLESS_IDLE == 1
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88 static const unsigned long ulStoppedTimerCompensation = 45UL;
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90 #else /* configSYSTICK_CLOCK_HZ */
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91 #if configUSE_TICKLESS_IDLE == 1
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92 /* Assumes the SysTick clock is slower than the CPU clock. */
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93 static const unsigned long ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
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95 #endif /* configSYSTICK_CLOCK_HZ */
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97 /* Constants required to manipulate the core. Registers first... */
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98 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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99 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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100 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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101 #define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) )
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102 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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103 /* ...then bits in the registers. */
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104 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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105 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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106 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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107 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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108 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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109 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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110 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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112 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
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113 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
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115 /* Constants required to set up the initial stack. */
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116 #define portINITIAL_XPSR ( 0x01000000 )
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118 /* Each task maintains its own interrupt status in the critical nesting
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120 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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123 * Setup the timer to generate the tick interrupts.
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125 static void prvSetupTimerInterrupt( void );
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128 * Exception handlers.
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130 void xPortPendSVHandler( void );
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131 void xPortSysTickHandler( void );
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132 void vPortSVCHandler( void );
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135 * Start first task is a separate function so it can be tested in isolation.
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137 static void prvStartFirstTask( void );
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139 /*-----------------------------------------------------------*/
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142 * The number of SysTick increments that make up one tick period.
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144 static unsigned long ulTimerReloadValueForOneTick = 0;
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147 * The maximum number of tick periods that can be suppressed is limited by the
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148 * 24 bit resolution of the SysTick timer.
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150 #if configUSE_TICKLESS_IDLE == 1
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151 static unsigned long xMaximumPossibleSuppressedTicks = 0;
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152 #endif /* configUSE_TICKLESS_IDLE */
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154 /*-----------------------------------------------------------*/
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157 * See header file for description.
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159 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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161 /* Simulate the stack frame as it would be created by a context switch
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163 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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164 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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166 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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168 *pxTopOfStack = 0; /* LR */
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169 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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170 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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171 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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173 return pxTopOfStack;
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175 /*-----------------------------------------------------------*/
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177 __asm void vPortSVCHandler( void )
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181 ldr r3, =pxCurrentTCB /* Restore the context. */
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182 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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183 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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184 ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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185 msr psp, r0 /* Restore the task stack pointer. */
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191 /*-----------------------------------------------------------*/
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193 __asm void prvStartFirstTask( void )
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197 /* Use the NVIC offset register to locate the stack. */
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198 ldr r0, =0xE000ED08
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201 /* Set the msp back to the start of the stack. */
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203 /* Globally enable interrupts. */
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205 /* Call SVC to start the first task. */
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209 /*-----------------------------------------------------------*/
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212 * See header file for description.
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214 portBASE_TYPE xPortStartScheduler( void )
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216 /* Make PendSV, CallSV and SysTick the same priority as the kernel. */
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217 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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218 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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220 /* Start the timer that generates the tick ISR. Interrupts are disabled
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222 prvSetupTimerInterrupt();
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224 /* Initialise the critical nesting count ready for the first task. */
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225 uxCriticalNesting = 0;
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227 /* Start the first task. */
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228 prvStartFirstTask();
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230 /* Should not get here! */
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233 /*-----------------------------------------------------------*/
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235 void vPortEndScheduler( void )
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237 /* It is unlikely that the CM3 port will require this function as there
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238 is nothing to return to. */
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240 /*-----------------------------------------------------------*/
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242 void vPortYieldFromISR( void )
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244 /* Set a PendSV to request a context switch. */
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245 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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247 /*-----------------------------------------------------------*/
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249 void vPortEnterCritical( void )
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251 portDISABLE_INTERRUPTS();
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252 uxCriticalNesting++;
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254 /*-----------------------------------------------------------*/
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256 void vPortExitCritical( void )
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258 uxCriticalNesting--;
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259 if( uxCriticalNesting == 0 )
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261 portENABLE_INTERRUPTS();
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264 /*-----------------------------------------------------------*/
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266 __asm void xPortPendSVHandler( void )
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268 extern uxCriticalNesting;
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269 extern pxCurrentTCB;
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270 extern vTaskSwitchContext;
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276 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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279 stmdb r0!, {r4-r11} /* Save the remaining registers. */
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280 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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282 stmdb sp!, {r3, r14}
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283 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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285 bl vTaskSwitchContext
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288 ldmia sp!, {r3, r14}
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291 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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292 ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */
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297 /*-----------------------------------------------------------*/
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299 void xPortSysTickHandler( void )
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301 #if configUSE_PREEMPTION == 1
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303 /* If using preemption, also force a context switch. */
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304 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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308 #if configUSE_TICKLESS_IDLE == 1
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309 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
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312 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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314 vTaskIncrementTick();
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316 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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318 /*-----------------------------------------------------------*/
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320 #if configUSE_TICKLESS_IDLE == 1
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322 __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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324 unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;
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326 /* Make sure the SysTick reload value does not overflow the counter. */
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327 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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329 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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332 /* Calculate the reload value required to wait xExpectedIdleTime
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333 tick periods. -1 is used because this code will execute part way
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334 through one of the tick periods, and the fraction of a tick period is
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335 accounted for later. */
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336 ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );
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337 if( ulReloadValue > ulStoppedTimerCompensation )
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339 ulReloadValue -= ulStoppedTimerCompensation;
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342 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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343 is accounted for as best it can be, but using the tickless mode will
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344 inevitably result in some tiny drift of the time maintained by the
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345 kernel with respect to calendar time. */
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346 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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348 /* If a context switch is pending then abandon the low power entry as
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349 the context switch might have been pended by an external interrupt that
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350 requires processing. */
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351 if( ( portNVIC_INT_CTRL_REG & portNVIC_PENDSVSET_BIT ) != 0 )
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353 /* Restart SysTick. */
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354 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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358 /* Adjust the reload value to take into account that the current
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359 time slice is already partially complete. */
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360 ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );
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361 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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363 /* Clear the SysTick count flag and set the count value back to
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365 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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367 /* Restart SysTick. */
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368 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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370 /* Sleep until something happens. */
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371 configPRE_SLEEP_PROCESSING();
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373 configPOST_SLEEP_PROCESSING();
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375 /* Stop SysTick. Again, the time the SysTick is stopped for is
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376 accounted for as best it can be, but using the tickless mode will
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377 inevitably result in some tiny drift of the time maintained by the
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378 kernel with respect to calendar time. */
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379 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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381 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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383 /* The tick interrupt has already executed, and the SysTick
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384 count reloaded with the portNVIC_SYSTICK_LOAD_REG value.
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385 Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of
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386 this tick period. */
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387 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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389 /* The tick interrupt handler will already have pended the tick
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390 processing in the kernel. As the pending tick will be
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391 processed as soon as this function exits, the tick value
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392 maintained by the tick is stepped forward by one less than the
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393 time spent waiting. */
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394 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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398 /* Something other than the tick interrupt ended the sleep.
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399 Work out how long the sleep lasted. */
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400 ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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402 /* How many complete tick periods passed while the processor
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404 ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;
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406 /* The reload value is set to whatever fraction of a single tick
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408 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;
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411 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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412 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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414 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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415 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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417 vTaskStepTick( ulCompleteTickPeriods );
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421 #endif /* #if configUSE_TICKLESS_IDLE */
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423 /*-----------------------------------------------------------*/
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426 * Setup the SysTick timer to generate the tick interrupts at the required
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429 void prvSetupTimerInterrupt( void )
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431 /* Calculate the constants required to configure the tick interrupt. */
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432 ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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433 #if configUSE_TICKLESS_IDLE == 1
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434 xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
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435 #endif /* configUSE_TICKLESS_IDLE */
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437 /* Configure SysTick to interrupt at the requested rate. */
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438 portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
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439 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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441 /*-----------------------------------------------------------*/
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443 __asm unsigned long ulPortSetInterruptMask( void )
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448 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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453 /*-----------------------------------------------------------*/
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455 __asm void vPortClearInterruptMask( unsigned long ulNewMask )
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