2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM CM3 port.
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68 *----------------------------------------------------------*/
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70 /* Scheduler includes. */
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71 #include "FreeRTOS.h"
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74 #ifndef configKERNEL_INTERRUPT_PRIORITY
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75 #define configKERNEL_INTERRUPT_PRIORITY 255
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78 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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79 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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82 #ifndef configSYSTICK_CLOCK_HZ
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83 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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84 /* Ensure the SysTick is clocked at the same frequency as the core. */
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85 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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87 /* The way the SysTick is clocked is not modified in case it is not the same
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89 #define portNVIC_SYSTICK_CLK_BIT ( 0 )
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92 /* The __weak attribute does not work as you might expect with the Keil tools
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93 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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94 the application writer wants to provide their own implementation of
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95 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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97 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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98 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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101 /* Constants required to manipulate the core. Registers first... */
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102 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )
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103 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )
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104 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )
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105 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
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106 /* ...then bits in the registers. */
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107 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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108 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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109 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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110 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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111 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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113 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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114 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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116 /* Constants required to check the validity of an interrupt priority. */
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117 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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118 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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119 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )
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120 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )
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121 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )
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122 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )
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123 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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124 #define portPRIGROUP_SHIFT ( 8UL )
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126 /* Constants required to set up the initial stack. */
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127 #define portINITIAL_XPSR ( 0x01000000 )
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129 /* Constants used with memory barrier intrinsics. */
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130 #define portSY_FULL_READ_WRITE ( 15 )
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132 /* The systick is a 24-bit counter. */
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133 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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135 /* A fiddle factor to estimate the number of SysTick counts that would have
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136 occurred while the SysTick counter is stopped during tickless idle
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138 #define portMISSED_COUNTS_FACTOR ( 45UL )
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140 /* Each task maintains its own interrupt status in the critical nesting
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142 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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145 * Setup the timer to generate the tick interrupts. The implementation in this
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146 * file is weak to allow application writers to change the timer used to
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147 * generate the tick interrupt.
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149 void vPortSetupTimerInterrupt( void );
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152 * Exception handlers.
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154 void xPortPendSVHandler( void );
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155 void xPortSysTickHandler( void );
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156 void vPortSVCHandler( void );
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159 * Start first task is a separate function so it can be tested in isolation.
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161 static void prvStartFirstTask( void );
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164 * Used to catch tasks that attempt to return from their implementing function.
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166 static void prvTaskExitError( void );
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168 /*-----------------------------------------------------------*/
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171 * The number of SysTick increments that make up one tick period.
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173 #if configUSE_TICKLESS_IDLE == 1
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174 static uint32_t ulTimerCountsForOneTick = 0;
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175 #endif /* configUSE_TICKLESS_IDLE */
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178 * The maximum number of tick periods that can be suppressed is limited by the
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179 * 24 bit resolution of the SysTick timer.
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181 #if configUSE_TICKLESS_IDLE == 1
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182 static uint32_t xMaximumPossibleSuppressedTicks = 0;
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183 #endif /* configUSE_TICKLESS_IDLE */
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186 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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187 * power functionality only.
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189 #if configUSE_TICKLESS_IDLE == 1
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190 static uint32_t ulStoppedTimerCompensation = 0;
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191 #endif /* configUSE_TICKLESS_IDLE */
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194 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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195 * FreeRTOS API functions are not called from interrupts that have been assigned
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196 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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198 #if ( configASSERT_DEFINED == 1 )
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199 static uint8_t ucMaxSysCallPriority = 0;
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200 static uint32_t ulMaxPRIGROUPValue = 0;
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201 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;
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202 #endif /* configASSERT_DEFINED */
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204 /*-----------------------------------------------------------*/
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207 * See header file for description.
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209 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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211 /* Simulate the stack frame as it would be created by a context switch
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213 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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214 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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216 *pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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218 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */
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220 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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221 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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222 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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224 return pxTopOfStack;
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226 /*-----------------------------------------------------------*/
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228 static void prvTaskExitError( void )
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230 /* A function that implements a task must not exit or attempt to return to
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231 its caller as there is nothing to return to. If a task wants to exit it
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232 should instead call vTaskDelete( NULL ).
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234 Artificially force an assert() to be triggered if configASSERT() is
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235 defined, then stop here so application writers can catch the error. */
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236 configASSERT( uxCriticalNesting == ~0UL );
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237 portDISABLE_INTERRUPTS();
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240 /*-----------------------------------------------------------*/
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242 __asm void vPortSVCHandler( void )
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246 ldr r3, =pxCurrentTCB /* Restore the context. */
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247 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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248 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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249 ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
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250 msr psp, r0 /* Restore the task stack pointer. */
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257 /*-----------------------------------------------------------*/
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259 __asm void prvStartFirstTask( void )
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263 /* Use the NVIC offset register to locate the stack. */
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264 ldr r0, =0xE000ED08
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267 /* Set the msp back to the start of the stack. */
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269 /* Globally enable interrupts. */
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273 /* Call SVC to start the first task. */
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277 /*-----------------------------------------------------------*/
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280 * See header file for description.
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282 BaseType_t xPortStartScheduler( void )
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284 #if( configASSERT_DEFINED == 1 )
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286 volatile uint32_t ulOriginalPriority;
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287 volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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288 volatile uint8_t ucMaxPriorityValue;
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290 /* Determine the maximum priority from which ISR safe FreeRTOS API
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291 functions can be called. ISR safe functions are those that end in
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292 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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293 ensure interrupt entry is as fast and simple as possible.
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295 Save the interrupt priority value that is about to be clobbered. */
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296 ulOriginalPriority = *pucFirstUserPriorityRegister;
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298 /* Determine the number of priority bits available. First write to all
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300 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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302 /* Read the value back to see how many bits stuck. */
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303 ucMaxPriorityValue = *pucFirstUserPriorityRegister;
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305 /* Use the same mask on the maximum system call priority. */
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306 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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308 /* Calculate the maximum acceptable priority group value for the number
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309 of bits read back. */
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310 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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311 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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313 ulMaxPRIGROUPValue--;
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314 ucMaxPriorityValue <<= ( uint8_t ) 0x01;
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317 /* Shift the priority group value back to its position within the AIRCR
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319 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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320 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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322 /* Restore the clobbered interrupt priority register to its original
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324 *pucFirstUserPriorityRegister = ulOriginalPriority;
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326 #endif /* conifgASSERT_DEFINED */
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328 /* Make PendSV and SysTick the lowest priority interrupts. */
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329 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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330 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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332 /* Start the timer that generates the tick ISR. Interrupts are disabled
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334 vPortSetupTimerInterrupt();
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336 /* Initialise the critical nesting count ready for the first task. */
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337 uxCriticalNesting = 0;
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339 /* Start the first task. */
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340 prvStartFirstTask();
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342 /* Should not get here! */
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345 /*-----------------------------------------------------------*/
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347 void vPortEndScheduler( void )
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349 /* Not implemented in ports where there is nothing to return to.
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350 Artificially force an assert. */
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351 configASSERT( uxCriticalNesting == 1000UL );
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353 /*-----------------------------------------------------------*/
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355 void vPortYield( void )
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357 /* Set a PendSV to request a context switch. */
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358 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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360 /* Barriers are normally not required but do ensure the code is completely
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361 within the specified behaviour for the architecture. */
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362 __dsb( portSY_FULL_READ_WRITE );
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363 __isb( portSY_FULL_READ_WRITE );
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365 /*-----------------------------------------------------------*/
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367 void vPortEnterCritical( void )
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369 portDISABLE_INTERRUPTS();
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370 uxCriticalNesting++;
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371 __dsb( portSY_FULL_READ_WRITE );
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372 __isb( portSY_FULL_READ_WRITE );
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374 /*-----------------------------------------------------------*/
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376 void vPortExitCritical( void )
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378 configASSERT( uxCriticalNesting );
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379 uxCriticalNesting--;
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380 if( uxCriticalNesting == 0 )
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382 portENABLE_INTERRUPTS();
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385 /*-----------------------------------------------------------*/
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387 __asm void xPortPendSVHandler( void )
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389 extern uxCriticalNesting;
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390 extern pxCurrentTCB;
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391 extern vTaskSwitchContext;
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398 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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401 stmdb r0!, {r4-r11} /* Save the remaining registers. */
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402 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */
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404 stmdb sp!, {r3, r14}
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405 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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407 bl vTaskSwitchContext
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410 ldmia sp!, {r3, r14}
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413 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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414 ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */
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420 /*-----------------------------------------------------------*/
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422 void xPortSysTickHandler( void )
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424 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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425 executes all interrupts must be unmasked. There is therefore no need to
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426 save and then restore the interrupt mask value as its value is already
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428 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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430 /* Increment the RTOS tick. */
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431 if( xTaskIncrementTick() != pdFALSE )
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433 /* A context switch is required. Context switching is performed in
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434 the PendSV interrupt. Pend the PendSV interrupt. */
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435 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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438 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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440 /*-----------------------------------------------------------*/
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442 #if configUSE_TICKLESS_IDLE == 1
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444 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
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446 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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447 TickType_t xModifiableIdleTime;
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449 /* Make sure the SysTick reload value does not overflow the counter. */
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450 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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452 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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455 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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456 is accounted for as best it can be, but using the tickless mode will
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457 inevitably result in some tiny drift of the time maintained by the
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458 kernel with respect to calendar time. */
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459 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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461 /* Calculate the reload value required to wait xExpectedIdleTime
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462 tick periods. -1 is used because this code will execute part way
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463 through one of the tick periods. */
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464 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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465 if( ulReloadValue > ulStoppedTimerCompensation )
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467 ulReloadValue -= ulStoppedTimerCompensation;
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470 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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471 method as that will mask interrupts that should exit sleep mode. */
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474 /* If a context switch is pending or a task is waiting for the scheduler
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475 to be unsuspended then abandon the low power entry. */
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476 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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478 /* Restart from whatever is left in the count register to complete
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479 this tick period. */
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480 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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482 /* Restart SysTick. */
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483 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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485 /* Reset the reload register to the value required for normal tick
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487 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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489 /* Re-enable interrupts - see comments above __disable_irq() call
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495 /* Set the new reload value. */
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496 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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498 /* Clear the SysTick count flag and set the count value back to
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500 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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502 /* Restart SysTick. */
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503 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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505 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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506 set its parameter to 0 to indicate that its implementation contains
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507 its own wait for interrupt or wait for event instruction, and so wfi
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508 should not be executed again. However, the original expected idle
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509 time variable must remain unmodified, so a copy is taken. */
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510 xModifiableIdleTime = xExpectedIdleTime;
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511 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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512 if( xModifiableIdleTime > 0 )
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514 __dsb( portSY_FULL_READ_WRITE );
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516 __isb( portSY_FULL_READ_WRITE );
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518 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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520 /* Stop SysTick. Again, the time the SysTick is stopped for is
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521 accounted for as best it can be, but using the tickless mode will
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522 inevitably result in some tiny drift of the time maintained by the
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523 kernel with respect to calendar time. */
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524 ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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525 portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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527 /* Re-enable interrupts - see comments above __disable_irq() call
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531 if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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533 uint32_t ulCalculatedLoadValue;
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535 /* The tick interrupt has already executed, and the SysTick
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536 count reloaded with ulReloadValue. Reset the
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537 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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539 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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541 /* Don't allow a tiny value, or values that have somehow
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542 underflowed because the post sleep hook did something
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543 that took too long. */
\r
544 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
546 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
549 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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551 /* The tick interrupt handler will already have pended the tick
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552 processing in the kernel. As the pending tick will be
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553 processed as soon as this function exits, the tick value
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554 maintained by the tick is stepped forward by one less than the
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555 time spent waiting. */
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556 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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560 /* Something other than the tick interrupt ended the sleep.
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561 Work out how long the sleep lasted rounded to complete tick
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562 periods (not the ulReload value which accounted for part
\r
564 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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566 /* How many complete tick periods passed while the processor
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568 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
570 /* The reload value is set to whatever fraction of a single tick
\r
572 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
575 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
\r
576 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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577 value. The critical section is used to ensure the tick interrupt
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578 can only execute once in the case that the reload register is near
\r
580 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
581 portENTER_CRITICAL();
\r
583 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
584 vTaskStepTick( ulCompleteTickPeriods );
\r
585 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
587 portEXIT_CRITICAL();
\r
591 #endif /* #if configUSE_TICKLESS_IDLE */
\r
593 /*-----------------------------------------------------------*/
\r
596 * Setup the SysTick timer to generate the tick interrupts at the required
\r
599 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
601 void vPortSetupTimerInterrupt( void )
\r
603 /* Calculate the constants required to configure the tick interrupt. */
\r
604 #if configUSE_TICKLESS_IDLE == 1
\r
606 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
607 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
608 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
610 #endif /* configUSE_TICKLESS_IDLE */
\r
612 /* Configure SysTick to interrupt at the requested rate. */
\r
613 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
\r
614 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
617 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
618 /*-----------------------------------------------------------*/
\r
620 __asm uint32_t ulPortSetInterruptMask( void )
\r
625 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
629 /*-----------------------------------------------------------*/
\r
631 __asm void vPortClearInterruptMask( uint32_t ulNewMask )
\r
638 /*-----------------------------------------------------------*/
\r
640 __asm uint32_t vPortGetIPSR( void )
\r
647 /*-----------------------------------------------------------*/
\r
649 #if( configASSERT_DEFINED == 1 )
\r
651 void vPortValidateInterruptPriority( void )
\r
653 uint32_t ulCurrentInterrupt;
\r
654 uint8_t ucCurrentPriority;
\r
656 /* Obtain the number of the currently executing interrupt. */
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657 ulCurrentInterrupt = vPortGetIPSR();
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659 /* Is the interrupt number a user defined interrupt? */
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660 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
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662 /* Look up the interrupt's priority. */
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663 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
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665 /* The following assertion will fail if a service routine (ISR) for
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666 an interrupt that has been assigned a priority above
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667 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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668 function. ISR safe FreeRTOS API functions must *only* be called
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669 from interrupts that have been assigned a priority at or below
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670 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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672 Numerically low interrupt priority numbers represent logically high
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673 interrupt priorities, therefore the priority of the interrupt must
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674 be set to a value equal to or numerically *higher* than
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675 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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677 Interrupts that use the FreeRTOS API must not be left at their
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678 default priority of zero as that is the highest possible priority,
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679 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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680 and therefore also guaranteed to be invalid.
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682 FreeRTOS maintains separate thread and ISR API functions to ensure
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683 interrupt entry is as fast and simple as possible.
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685 The following links provide detailed information:
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686 http://www.freertos.org/RTOS-Cortex-M3-M4.html
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687 http://www.freertos.org/FAQHelp.html */
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688 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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691 /* Priority grouping: The interrupt controller (NVIC) allows the bits
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692 that define each interrupt's priority to be split between bits that
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693 define the interrupt's pre-emption priority bits and bits that define
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694 the interrupt's sub-priority. For simplicity all bits must be defined
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695 to be pre-emption priority bits. The following assertion will fail if
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696 this is not the case (if some bits represent a sub-priority).
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698 If the application only uses CMSIS libraries for interrupt
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699 configuration then the correct setting can be achieved on all Cortex-M
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700 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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701 scheduler. Note however that some vendor specific peripheral libraries
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702 assume a non-zero priority group setting, in which cases using a value
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703 of zero will result in unpredicable behaviour. */
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704 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
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707 #endif /* configASSERT_DEFINED */
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