2 FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd.
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5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS provides completely free yet professionally developed, *
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10 * robust, strictly quality controlled, supported, and cross *
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11 * platform software that has become a de facto standard. *
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13 * Help yourself get started quickly and support the FreeRTOS *
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14 * project by purchasing a FreeRTOS tutorial book, reference *
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15 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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19 ***************************************************************************
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21 This file is part of the FreeRTOS distribution.
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23 FreeRTOS is free software; you can redistribute it and/or modify it under
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24 the terms of the GNU General Public License (version 2) as published by the
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25 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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27 >>! NOTE: The modification to the GPL is included to allow you to distribute
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28 >>! a combined work that includes FreeRTOS without being obliged to provide
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29 >>! the source code for proprietary components outside of the FreeRTOS
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32 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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33 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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34 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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35 link: http://www.freertos.org/a00114.html
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39 ***************************************************************************
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41 * Having a problem? Start by reading the FAQ "My application does *
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42 * not run, what could be wrong?" *
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44 * http://www.FreeRTOS.org/FAQHelp.html *
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46 ***************************************************************************
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48 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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49 license and Real Time Engineers Ltd. contact details.
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51 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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52 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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53 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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55 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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56 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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57 licenses offer ticketed support, indemnification and middleware.
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59 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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60 engineered and independently SIL3 certified version for use in safety and
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61 mission critical applications that require provable dependability.
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66 /*-----------------------------------------------------------
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67 * Implementation of functions defined in portable.h for the ARM CM4F port.
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68 *----------------------------------------------------------*/
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70 /* Scheduler includes. */
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71 #include "FreeRTOS.h"
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74 #ifndef __TARGET_FPU_VFP
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75 #error This port can only be used when the project options are configured to enable hardware floating point support.
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78 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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79 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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82 #ifndef configSYSTICK_CLOCK_HZ
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83 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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86 /* The __weak attribute does not work as you might expect with the Keil tools
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87 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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88 the application writer wants to provide their own implementation of
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89 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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91 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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92 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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95 /* Constants required to manipulate the core. Registers first... */
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96 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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97 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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98 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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99 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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100 /* ...then bits in the registers. */
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101 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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102 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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103 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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104 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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105 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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106 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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108 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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109 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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111 /* Constants required to check the validity of an interrupt priority. */
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112 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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113 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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114 #define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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115 #define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
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116 #define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
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117 #define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
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118 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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119 #define portPRIGROUP_SHIFT ( 8UL )
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121 /* Constants required to manipulate the VFP. */
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122 #define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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123 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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125 /* Constants required to set up the initial stack. */
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126 #define portINITIAL_XPSR ( 0x01000000 )
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127 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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129 /* Constants used with memory barrier intrinsics. */
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130 #define portSY_FULL_READ_WRITE ( 15 )
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132 /* The systick is a 24-bit counter. */
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133 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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135 /* A fiddle factor to estimate the number of SysTick counts that would have
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136 occurred while the SysTick counter is stopped during tickless idle
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138 #define portMISSED_COUNTS_FACTOR ( 45UL )
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140 /* Each task maintains its own interrupt status in the critical nesting
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142 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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145 * Setup the timer to generate the tick interrupts. The implementation in this
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146 * file is weak to allow application writers to change the timer used to
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147 * generate the tick interrupt.
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149 void vPortSetupTimerInterrupt( void );
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152 * Exception handlers.
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154 void xPortPendSVHandler( void );
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155 void xPortSysTickHandler( void );
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156 void vPortSVCHandler( void );
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159 * Start first task is a separate function so it can be tested in isolation.
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161 static void prvStartFirstTask( void );
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164 * Functions defined in portasm.s to enable the VFP.
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166 static void prvEnableVFP( void );
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169 * Used to catch tasks that attempt to return from their implementing function.
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171 static void prvTaskExitError( void );
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173 /*-----------------------------------------------------------*/
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176 * The number of SysTick increments that make up one tick period.
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178 #if configUSE_TICKLESS_IDLE == 1
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179 static unsigned long ulTimerCountsForOneTick = 0;
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180 #endif /* configUSE_TICKLESS_IDLE */
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183 * The maximum number of tick periods that can be suppressed is limited by the
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184 * 24 bit resolution of the SysTick timer.
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186 #if configUSE_TICKLESS_IDLE == 1
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187 static unsigned long xMaximumPossibleSuppressedTicks = 0;
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188 #endif /* configUSE_TICKLESS_IDLE */
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191 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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192 * power functionality only.
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194 #if configUSE_TICKLESS_IDLE == 1
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195 static unsigned long ulStoppedTimerCompensation = 0;
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196 #endif /* configUSE_TICKLESS_IDLE */
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199 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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200 * FreeRTOS API functions are not called from interrupts that have been assigned
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201 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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203 #if ( configASSERT_DEFINED == 1 )
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204 static unsigned char ucMaxSysCallPriority = 0;
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205 static unsigned long ulMaxPRIGROUPValue = 0;
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206 static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;
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207 #endif /* configASSERT_DEFINED */
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209 /*-----------------------------------------------------------*/
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212 * See header file for description.
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214 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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216 /* Simulate the stack frame as it would be created by a context switch
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219 /* Offset added to account for the way the MCU uses the stack on entry/exit
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220 of interrupts, and to ensure alignment. */
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223 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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225 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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227 *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */
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229 /* Save code space by skipping register initialisation. */
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230 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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231 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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233 /* A save method is being used that requires each task to maintain its
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234 own exec return value. */
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236 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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238 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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240 return pxTopOfStack;
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242 /*-----------------------------------------------------------*/
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244 static void prvTaskExitError( void )
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246 /* A function that implements a task must not exit or attempt to return to
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247 its caller as there is nothing to return to. If a task wants to exit it
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248 should instead call vTaskDelete( NULL ).
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250 Artificially force an assert() to be triggered if configASSERT() is
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251 defined, then stop here so application writers can catch the error. */
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252 configASSERT( uxCriticalNesting == ~0UL );
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253 portDISABLE_INTERRUPTS();
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256 /*-----------------------------------------------------------*/
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258 __asm void vPortSVCHandler( void )
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262 /* Get the location of the current TCB. */
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263 ldr r3, =pxCurrentTCB
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266 /* Pop the core registers. */
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267 ldmia r0!, {r4-r11, r14}
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274 /*-----------------------------------------------------------*/
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276 __asm void prvStartFirstTask( void )
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280 /* Use the NVIC offset register to locate the stack. */
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281 ldr r0, =0xE000ED08
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284 /* Set the msp back to the start of the stack. */
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286 /* Globally enable interrupts. */
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290 /* Call SVC to start the first task. */
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294 /*-----------------------------------------------------------*/
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296 __asm void prvEnableVFP( void )
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300 /* The FPU enable bits are in the CPACR. */
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301 ldr.w r0, =0xE000ED88
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304 /* Enable CP10 and CP11 coprocessors, then save back. */
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305 orr r1, r1, #( 0xf << 20 )
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310 /*-----------------------------------------------------------*/
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313 * See header file for description.
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315 portBASE_TYPE xPortStartScheduler( void )
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317 #if( configASSERT_DEFINED == 1 )
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319 volatile unsigned long ulOriginalPriority;
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320 volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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321 volatile unsigned char ucMaxPriorityValue;
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323 /* Determine the maximum priority from which ISR safe FreeRTOS API
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324 functions can be called. ISR safe functions are those that end in
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325 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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326 ensure interrupt entry is as fast and simple as possible.
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328 Save the interrupt priority value that is about to be clobbered. */
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329 ulOriginalPriority = *pcFirstUserPriorityRegister;
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331 /* Determine the number of priority bits available. First write to all
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333 *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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335 /* Read the value back to see how many bits stuck. */
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336 ucMaxPriorityValue = *pcFirstUserPriorityRegister;
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338 /* Use the same mask on the maximum system call priority. */
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339 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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341 /* Calculate the maximum acceptable priority group value for the number
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342 of bits read back. */
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343 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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344 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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346 ulMaxPRIGROUPValue--;
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347 ucMaxPriorityValue <<= ( unsigned char ) 0x01;
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350 /* Shift the priority group value back to its position within the AIRCR
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352 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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353 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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355 /* Restore the clobbered interrupt priority register to its original
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357 *pcFirstUserPriorityRegister = ulOriginalPriority;
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359 #endif /* conifgASSERT_DEFINED */
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361 /* Make PendSV and SysTick the lowest priority interrupts. */
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362 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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363 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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365 /* Start the timer that generates the tick ISR. Interrupts are disabled
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367 vPortSetupTimerInterrupt();
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369 /* Initialise the critical nesting count ready for the first task. */
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370 uxCriticalNesting = 0;
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372 /* Ensure the VFP is enabled - it should be anyway. */
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375 /* Lazy save always. */
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376 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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378 /* Start the first task. */
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379 prvStartFirstTask();
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381 /* Should not get here! */
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384 /*-----------------------------------------------------------*/
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386 void vPortEndScheduler( void )
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388 /* Not implemented in ports where there is nothing to return to.
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389 Artificially force an assert. */
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390 configASSERT( uxCriticalNesting == 1000UL );
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392 /*-----------------------------------------------------------*/
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394 void vPortYield( void )
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396 /* Set a PendSV to request a context switch. */
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397 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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399 /* Barriers are normally not required but do ensure the code is completely
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400 within the specified behaviour for the architecture. */
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401 __dsb( portSY_FULL_READ_WRITE );
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402 __isb( portSY_FULL_READ_WRITE );
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404 /*-----------------------------------------------------------*/
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406 void vPortEnterCritical( void )
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408 portDISABLE_INTERRUPTS();
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409 uxCriticalNesting++;
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410 __dsb( portSY_FULL_READ_WRITE );
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411 __isb( portSY_FULL_READ_WRITE );
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413 /*-----------------------------------------------------------*/
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415 void vPortExitCritical( void )
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417 configASSERT( uxCriticalNesting );
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418 uxCriticalNesting--;
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419 if( uxCriticalNesting == 0 )
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421 portENABLE_INTERRUPTS();
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424 /*-----------------------------------------------------------*/
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426 __asm void xPortPendSVHandler( void )
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428 extern uxCriticalNesting;
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429 extern pxCurrentTCB;
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430 extern vTaskSwitchContext;
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436 /* Get the location of the current TCB. */
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437 ldr r3, =pxCurrentTCB
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440 /* Is the task using the FPU context? If so, push high vfp registers. */
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443 vstmdbeq r0!, {s16-s31}
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445 /* Save the core registers. */
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446 stmdb r0!, {r4-r11, r14}
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448 /* Save the new top of stack into the first member of the TCB. */
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452 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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454 bl vTaskSwitchContext
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459 /* The first item in pxCurrentTCB is the task top of stack. */
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463 /* Pop the core registers. */
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464 ldmia r0!, {r4-r11, r14}
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466 /* Is the task using the FPU context? If so, pop the high vfp registers
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470 vldmiaeq r0!, {s16-s31}
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474 #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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475 #if WORKAROUND_PMU_CM001 == 1
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485 /*-----------------------------------------------------------*/
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487 void xPortSysTickHandler( void )
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489 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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490 executes all interrupts must be unmasked. There is therefore no need to
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491 save and then restore the interrupt mask value as its value is already
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493 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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495 /* Increment the RTOS tick. */
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496 if( xTaskIncrementTick() != pdFALSE )
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498 /* A context switch is required. Context switching is performed in
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499 the PendSV interrupt. Pend the PendSV interrupt. */
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500 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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503 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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505 /*-----------------------------------------------------------*/
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507 #if configUSE_TICKLESS_IDLE == 1
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509 __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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511 unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;
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512 portTickType xModifiableIdleTime;
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514 /* Make sure the SysTick reload value does not overflow the counter. */
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515 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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517 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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520 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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521 is accounted for as best it can be, but using the tickless mode will
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522 inevitably result in some tiny drift of the time maintained by the
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523 kernel with respect to calendar time. */
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524 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
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526 /* Calculate the reload value required to wait xExpectedIdleTime
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527 tick periods. -1 is used because this code will execute part way
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528 through one of the tick periods. */
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529 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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530 if( ulReloadValue > ulStoppedTimerCompensation )
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532 ulReloadValue -= ulStoppedTimerCompensation;
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535 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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536 method as that will mask interrupts that should exit sleep mode. */
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539 /* If a context switch is pending or a task is waiting for the scheduler
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540 to be unsuspended then abandon the low power entry. */
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541 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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543 /* Restart from whatever is left in the count register to complete
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544 this tick period. */
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545 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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547 /* Restart SysTick. */
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548 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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550 /* Reset the reload register to the value required for normal tick
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552 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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554 /* Re-enable interrupts - see comments above __disable_irq() call
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560 /* Set the new reload value. */
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561 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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563 /* Clear the SysTick count flag and set the count value back to
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565 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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567 /* Restart SysTick. */
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568 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
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570 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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571 set its parameter to 0 to indicate that its implementation contains
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572 its own wait for interrupt or wait for event instruction, and so wfi
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573 should not be executed again. However, the original expected idle
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574 time variable must remain unmodified, so a copy is taken. */
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575 xModifiableIdleTime = xExpectedIdleTime;
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576 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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577 if( xModifiableIdleTime > 0 )
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579 __dsb( portSY_FULL_READ_WRITE );
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581 __isb( portSY_FULL_READ_WRITE );
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583 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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585 /* Stop SysTick. Again, the time the SysTick is stopped for is
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586 accounted for as best it can be, but using the tickless mode will
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587 inevitably result in some tiny drift of the time maintained by the
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588 kernel with respect to calendar time. */
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589 ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;
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590 portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );
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592 /* Re-enable interrupts - see comments above __disable_irq() call
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596 if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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598 unsigned long ulCalculatedLoadValue;
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600 /* The tick interrupt has already executed, and the SysTick
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601 count reloaded with ulReloadValue. Reset the
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602 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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604 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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606 /* Don't allow a tiny value, or values that have somehow
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607 underflowed because the post sleep hook did something
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608 that took too long. */
\r
609 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
611 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
614 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
\r
616 /* The tick interrupt handler will already have pended the tick
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617 processing in the kernel. As the pending tick will be
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618 processed as soon as this function exits, the tick value
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619 maintained by the tick is stepped forward by one less than the
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620 time spent waiting. */
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621 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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625 /* Something other than the tick interrupt ended the sleep.
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626 Work out how long the sleep lasted rounded to complete tick
\r
627 periods (not the ulReload value which accounted for part
\r
629 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
\r
631 /* How many complete tick periods passed while the processor
\r
633 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
635 /* The reload value is set to whatever fraction of a single tick
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637 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
640 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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641 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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642 value. The critical section is used to ensure the tick interrupt
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643 can only execute once in the case that the reload register is near
\r
645 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
646 portENTER_CRITICAL();
\r
648 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
\r
649 vTaskStepTick( ulCompleteTickPeriods );
\r
650 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
652 portEXIT_CRITICAL();
\r
656 #endif /* #if configUSE_TICKLESS_IDLE */
\r
658 /*-----------------------------------------------------------*/
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661 * Setup the SysTick timer to generate the tick interrupts at the required
\r
664 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
666 void vPortSetupTimerInterrupt( void )
\r
668 /* Calculate the constants required to configure the tick interrupt. */
\r
669 #if configUSE_TICKLESS_IDLE == 1
\r
671 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
672 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
673 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
675 #endif /* configUSE_TICKLESS_IDLE */
\r
677 /* Configure SysTick to interrupt at the requested rate. */
\r
678 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
\r
679 portNVIC_SYSTICK_CTRL_REG |= ( portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
\r
682 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
683 /*-----------------------------------------------------------*/
\r
685 __asm unsigned long ulPortSetInterruptMask( void )
\r
690 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
694 /*-----------------------------------------------------------*/
\r
696 __asm void vPortClearInterruptMask( unsigned long ulNewMask )
\r
703 /*-----------------------------------------------------------*/
\r
705 __asm unsigned long vPortGetIPSR( void )
\r
712 /*-----------------------------------------------------------*/
\r
714 #if( configASSERT_DEFINED == 1 )
\r
716 void vPortValidateInterruptPriority( void )
\r
718 unsigned long ulCurrentInterrupt;
\r
719 unsigned char ucCurrentPriority;
\r
721 /* Obtain the number of the currently executing interrupt. */
\r
722 ulCurrentInterrupt = vPortGetIPSR();
\r
724 /* Is the interrupt number a user defined interrupt? */
\r
725 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
727 /* Look up the interrupt's priority. */
\r
728 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
730 /* The following assertion will fail if a service routine (ISR) for
\r
731 an interrupt that has been assigned a priority above
\r
732 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
733 function. ISR safe FreeRTOS API functions must *only* be called
\r
734 from interrupts that have been assigned a priority at or below
\r
735 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
737 Numerically low interrupt priority numbers represent logically high
\r
738 interrupt priorities, therefore the priority of the interrupt must
\r
739 be set to a value equal to or numerically *higher* than
\r
740 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
742 Interrupts that use the FreeRTOS API must not be left at their
\r
743 default priority of zero as that is the highest possible priority,
\r
744 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
745 and therefore also guaranteed to be invalid.
\r
747 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
748 interrupt entry is as fast and simple as possible.
\r
750 The following links provide detailed information:
\r
751 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
752 http://www.freertos.org/FAQHelp.html */
\r
753 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
756 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
757 that define each interrupt's priority to be split between bits that
\r
758 define the interrupt's pre-emption priority bits and bits that define
\r
759 the interrupt's sub-priority. For simplicity all bits must be defined
\r
760 to be pre-emption priority bits. The following assertion will fail if
\r
761 this is not the case (if some bits represent a sub-priority).
\r
763 If the application only uses CMSIS libraries for interrupt
\r
764 configuration then the correct setting can be achieved on all Cortex-M
\r
765 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
766 scheduler. Note however that some vendor specific peripheral libraries
\r
767 assume a non-zero priority group setting, in which cases using a value
\r
768 of zero will result in unpredicable behaviour. */
\r
769 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
772 #endif /* configASSERT_DEFINED */
\r