2 FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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6 ***************************************************************************
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8 * FreeRTOS provides completely free yet professionally developed, *
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9 * robust, strictly quality controlled, supported, and cross *
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10 * platform software that has become a de facto standard. *
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12 * Help yourself get started quickly and support the FreeRTOS *
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13 * project by purchasing a FreeRTOS tutorial book, reference *
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14 * manual, or both from: http://www.FreeRTOS.org/Documentation *
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18 ***************************************************************************
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20 This file is part of the FreeRTOS distribution.
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22 FreeRTOS is free software; you can redistribute it and/or modify it under
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23 the terms of the GNU General Public License (version 2) as published by the
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24 Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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26 >>! NOTE: The modification to the GPL is included to allow you to distribute
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27 >>! a combined work that includes FreeRTOS without being obliged to provide
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28 >>! the source code for proprietary components outside of the FreeRTOS
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31 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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32 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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33 FOR A PARTICULAR PURPOSE. Full license text is available from the following
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34 link: http://www.freertos.org/a00114.html
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38 ***************************************************************************
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40 * Having a problem? Start by reading the FAQ "My application does *
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41 * not run, what could be wrong?" *
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43 * http://www.FreeRTOS.org/FAQHelp.html *
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45 ***************************************************************************
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47 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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48 license and Real Time Engineers Ltd. contact details.
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50 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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51 including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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52 compatible FAT file system, and our tiny thread aware UDP/IP stack.
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54 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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55 Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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56 licenses offer ticketed support, indemnification and middleware.
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58 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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59 engineered and independently SIL3 certified version for use in safety and
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60 mission critical applications that require provable dependability.
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65 /*-----------------------------------------------------------
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66 * Implementation of functions defined in portable.h for the ARM CM4F port.
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67 *----------------------------------------------------------*/
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69 /* Scheduler includes. */
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70 #include "FreeRTOS.h"
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73 #ifndef __TARGET_FPU_VFP
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74 #error This port can only be used when the project options are configured to enable hardware floating point support.
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77 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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78 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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81 #ifndef configSYSTICK_CLOCK_HZ
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82 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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85 /* The __weak attribute does not work as you might expect with the Keil tools
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86 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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87 the application writer wants to provide their own implementation of
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88 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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90 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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91 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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94 /* Constants required to manipulate the core. Registers first... */
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95 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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96 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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97 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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98 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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99 /* ...then bits in the registers. */
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100 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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101 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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102 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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103 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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104 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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105 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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107 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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108 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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110 /* Constants required to check the validity of an interrupt priority. */
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111 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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112 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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113 #define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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114 #define portMAX_8_BIT_VALUE ( ( unsigned char ) 0xff )
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115 #define portTOP_BIT_OF_BYTE ( ( unsigned char ) 0x80 )
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116 #define portMAX_PRIGROUP_BITS ( ( unsigned char ) 7 )
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117 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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118 #define portPRIGROUP_SHIFT ( 8UL )
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120 /* Constants required to manipulate the VFP. */
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121 #define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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122 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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124 /* Constants required to set up the initial stack. */
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125 #define portINITIAL_XPSR ( 0x01000000 )
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126 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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128 /* Constants used with memory barrier intrinsics. */
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129 #define portSY_FULL_READ_WRITE ( 15 )
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131 /* The systick is a 24-bit counter. */
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132 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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134 /* A fiddle factor to estimate the number of SysTick counts that would have
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135 occurred while the SysTick counter is stopped during tickless idle
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137 #define portMISSED_COUNTS_FACTOR ( 45UL )
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139 /* Each task maintains its own interrupt status in the critical nesting
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141 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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144 * Setup the timer to generate the tick interrupts. The implementation in this
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145 * file is weak to allow application writers to change the timer used to
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146 * generate the tick interrupt.
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148 void vPortSetupTimerInterrupt( void );
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151 * Exception handlers.
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153 void xPortPendSVHandler( void );
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154 void xPortSysTickHandler( void );
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155 void vPortSVCHandler( void );
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158 * Start first task is a separate function so it can be tested in isolation.
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160 static void prvStartFirstTask( void );
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163 * Functions defined in portasm.s to enable the VFP.
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165 static void prvEnableVFP( void );
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168 * Used to catch tasks that attempt to return from their implementing function.
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170 static void prvTaskExitError( void );
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172 /*-----------------------------------------------------------*/
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175 * The number of SysTick increments that make up one tick period.
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177 #if configUSE_TICKLESS_IDLE == 1
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178 static unsigned long ulTimerCountsForOneTick = 0;
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179 #endif /* configUSE_TICKLESS_IDLE */
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182 * The maximum number of tick periods that can be suppressed is limited by the
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183 * 24 bit resolution of the SysTick timer.
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185 #if configUSE_TICKLESS_IDLE == 1
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186 static unsigned long xMaximumPossibleSuppressedTicks = 0;
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187 #endif /* configUSE_TICKLESS_IDLE */
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190 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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191 * power functionality only.
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193 #if configUSE_TICKLESS_IDLE == 1
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194 static unsigned long ulStoppedTimerCompensation = 0;
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195 #endif /* configUSE_TICKLESS_IDLE */
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198 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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199 * FreeRTOS API functions are not called from interrupts that have been assigned
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200 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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202 #if ( configASSERT_DEFINED == 1 )
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203 static unsigned char ucMaxSysCallPriority = 0;
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204 static unsigned long ulMaxPRIGROUPValue = 0;
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205 static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;
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206 #endif /* configASSERT_DEFINED */
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208 /*-----------------------------------------------------------*/
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211 * See header file for description.
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213 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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215 /* Simulate the stack frame as it would be created by a context switch
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218 /* Offset added to account for the way the MCU uses the stack on entry/exit
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219 of interrupts, and to ensure alignment. */
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222 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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224 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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226 *pxTopOfStack = ( portSTACK_TYPE ) prvTaskExitError; /* LR */
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228 /* Save code space by skipping register initialisation. */
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229 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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230 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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232 /* A save method is being used that requires each task to maintain its
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233 own exec return value. */
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235 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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237 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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239 return pxTopOfStack;
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241 /*-----------------------------------------------------------*/
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243 static void prvTaskExitError( void )
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245 /* A function that implements a task must not exit or attempt to return to
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246 its caller as there is nothing to return to. If a task wants to exit it
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247 should instead call vTaskDelete( NULL ).
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249 Artificially force an assert() to be triggered if configASSERT() is
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250 defined, then stop here so application writers can catch the error. */
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251 configASSERT( uxCriticalNesting == ~0UL );
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252 portDISABLE_INTERRUPTS();
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255 /*-----------------------------------------------------------*/
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257 __asm void vPortSVCHandler( void )
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261 /* Get the location of the current TCB. */
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262 ldr r3, =pxCurrentTCB
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265 /* Pop the core registers. */
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266 ldmia r0!, {r4-r11, r14}
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272 /*-----------------------------------------------------------*/
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274 __asm void prvStartFirstTask( void )
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278 /* Use the NVIC offset register to locate the stack. */
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279 ldr r0, =0xE000ED08
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282 /* Set the msp back to the start of the stack. */
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284 /* Globally enable interrupts. */
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286 /* Call SVC to start the first task. */
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290 /*-----------------------------------------------------------*/
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292 __asm void prvEnableVFP( void )
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296 /* The FPU enable bits are in the CPACR. */
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297 ldr.w r0, =0xE000ED88
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300 /* Enable CP10 and CP11 coprocessors, then save back. */
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301 orr r1, r1, #( 0xf << 20 )
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306 /*-----------------------------------------------------------*/
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309 * See header file for description.
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311 portBASE_TYPE xPortStartScheduler( void )
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313 #if( configASSERT_DEFINED == 1 )
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315 volatile unsigned long ulOriginalPriority;
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316 volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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317 volatile unsigned char ucMaxPriorityValue;
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319 /* Determine the maximum priority from which ISR safe FreeRTOS API
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320 functions can be called. ISR safe functions are those that end in
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321 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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322 ensure interrupt entry is as fast and simple as possible.
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324 Save the interrupt priority value that is about to be clobbered. */
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325 ulOriginalPriority = *pcFirstUserPriorityRegister;
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327 /* Determine the number of priority bits available. First write to all
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329 *pcFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
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331 /* Read the value back to see how many bits stuck. */
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332 ucMaxPriorityValue = *pcFirstUserPriorityRegister;
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334 /* Use the same mask on the maximum system call priority. */
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335 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
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337 /* Calculate the maximum acceptable priority group value for the number
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338 of bits read back. */
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339 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
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340 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
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342 ulMaxPRIGROUPValue--;
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343 ucMaxPriorityValue <<= ( unsigned char ) 0x01;
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346 /* Shift the priority group value back to its position within the AIRCR
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348 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
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349 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
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351 /* Restore the clobbered interrupt priority register to its original
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353 *pcFirstUserPriorityRegister = ulOriginalPriority;
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355 #endif /* conifgASSERT_DEFINED */
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357 /* Make PendSV and SysTick the lowest priority interrupts. */
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358 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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359 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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361 /* Start the timer that generates the tick ISR. Interrupts are disabled
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363 vPortSetupTimerInterrupt();
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365 /* Initialise the critical nesting count ready for the first task. */
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366 uxCriticalNesting = 0;
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368 /* Ensure the VFP is enabled - it should be anyway. */
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371 /* Lazy save always. */
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372 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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374 /* Start the first task. */
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375 prvStartFirstTask();
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377 /* Should not get here! */
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380 /*-----------------------------------------------------------*/
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382 void vPortEndScheduler( void )
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384 /* It is unlikely that the CM4F port will require this function as there
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385 is nothing to return to. */
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387 /*-----------------------------------------------------------*/
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389 void vPortYield( void )
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391 /* Set a PendSV to request a context switch. */
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392 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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394 /* Barriers are normally not required but do ensure the code is completely
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395 within the specified behaviour for the architecture. */
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396 __dsb( portSY_FULL_READ_WRITE );
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397 __isb( portSY_FULL_READ_WRITE );
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399 /*-----------------------------------------------------------*/
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401 void vPortEnterCritical( void )
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403 portDISABLE_INTERRUPTS();
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404 uxCriticalNesting++;
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405 __dsb( portSY_FULL_READ_WRITE );
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406 __isb( portSY_FULL_READ_WRITE );
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408 /*-----------------------------------------------------------*/
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410 void vPortExitCritical( void )
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412 uxCriticalNesting--;
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413 if( uxCriticalNesting == 0 )
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415 portENABLE_INTERRUPTS();
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418 /*-----------------------------------------------------------*/
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420 __asm void xPortPendSVHandler( void )
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422 extern uxCriticalNesting;
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423 extern pxCurrentTCB;
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424 extern vTaskSwitchContext;
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430 /* Get the location of the current TCB. */
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431 ldr r3, =pxCurrentTCB
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434 /* Is the task using the FPU context? If so, push high vfp registers. */
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437 vstmdbeq r0!, {s16-s31}
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439 /* Save the core registers. */
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440 stmdb r0!, {r4-r11, r14}
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442 /* Save the new top of stack into the first member of the TCB. */
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445 stmdb sp!, {r3, r14}
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446 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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448 bl vTaskSwitchContext
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451 ldmia sp!, {r3, r14}
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453 /* The first item in pxCurrentTCB is the task top of stack. */
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457 /* Pop the core registers. */
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458 ldmia r0!, {r4-r11, r14}
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460 /* Is the task using the FPU context? If so, pop the high vfp registers
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464 vldmiaeq r0!, {s16-s31}
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468 #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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469 #if WORKAROUND_PMU_CM001 == 1
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478 /*-----------------------------------------------------------*/
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480 void xPortSysTickHandler( void )
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482 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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483 executes all interrupts must be unmasked. There is therefore no need to
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484 save and then restore the interrupt mask value as its value is already
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486 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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488 /* Increment the RTOS tick. */
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489 if( xTaskIncrementTick() != pdFALSE )
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491 /* A context switch is required. Context switching is performed in
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492 the PendSV interrupt. Pend the PendSV interrupt. */
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493 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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496 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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498 /*-----------------------------------------------------------*/
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500 #if configUSE_TICKLESS_IDLE == 1
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502 __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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504 unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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505 portTickType xModifiableIdleTime;
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507 /* Make sure the SysTick reload value does not overflow the counter. */
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508 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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510 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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513 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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514 is accounted for as best it can be, but using the tickless mode will
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515 inevitably result in some tiny drift of the time maintained by the
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516 kernel with respect to calendar time. */
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517 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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519 /* Calculate the reload value required to wait xExpectedIdleTime
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520 tick periods. -1 is used because this code will execute part way
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521 through one of the tick periods. */
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522 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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523 if( ulReloadValue > ulStoppedTimerCompensation )
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525 ulReloadValue -= ulStoppedTimerCompensation;
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528 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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529 method as that will mask interrupts that should exit sleep mode. */
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532 /* If a context switch is pending or a task is waiting for the scheduler
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533 to be unsuspended then abandon the low power entry. */
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534 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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536 /* Restart from whatever is left in the count register to complete
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537 this tick period. */
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538 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
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540 /* Restart SysTick. */
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541 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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543 /* Reset the reload register to the value required for normal tick
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545 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
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547 /* Re-enable interrupts - see comments above __disable_irq() call
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553 /* Set the new reload value. */
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554 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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556 /* Clear the SysTick count flag and set the count value back to
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558 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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560 /* Restart SysTick. */
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561 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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563 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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564 set its parameter to 0 to indicate that its implementation contains
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565 its own wait for interrupt or wait for event instruction, and so wfi
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566 should not be executed again. However, the original expected idle
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567 time variable must remain unmodified, so a copy is taken. */
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568 xModifiableIdleTime = xExpectedIdleTime;
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569 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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570 if( xModifiableIdleTime > 0 )
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572 __dsb( portSY_FULL_READ_WRITE );
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574 __isb( portSY_FULL_READ_WRITE );
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576 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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578 /* Stop SysTick. Again, the time the SysTick is stopped for is
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579 accounted for as best it can be, but using the tickless mode will
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580 inevitably result in some tiny drift of the time maintained by the
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581 kernel with respect to calendar time. */
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582 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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584 /* Re-enable interrupts - see comments above __disable_irq() call
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588 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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590 unsigned long ulCalculatedLoadValue;
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592 /* The tick interrupt has already executed, and the SysTick
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593 count reloaded with ulReloadValue. Reset the
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594 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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596 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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598 /* Don't allow a tiny value, or values that have somehow
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599 underflowed because the post sleep hook did something
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600 that took too long. */
\r
601 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
\r
603 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
\r
606 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
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608 /* The tick interrupt handler will already have pended the tick
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609 processing in the kernel. As the pending tick will be
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610 processed as soon as this function exits, the tick value
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611 maintained by the tick is stepped forward by one less than the
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612 time spent waiting. */
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613 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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617 /* Something other than the tick interrupt ended the sleep.
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618 Work out how long the sleep lasted rounded to complete tick
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619 periods (not the ulReload value which accounted for part
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621 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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623 /* How many complete tick periods passed while the processor
\r
625 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
\r
627 /* The reload value is set to whatever fraction of a single tick
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629 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
\r
632 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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633 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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634 value. The critical section is used to ensure the tick interrupt
\r
635 can only execute once in the case that the reload register is near
\r
637 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
\r
638 portENTER_CRITICAL();
\r
640 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
\r
641 vTaskStepTick( ulCompleteTickPeriods );
\r
642 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
644 portEXIT_CRITICAL();
\r
648 #endif /* #if configUSE_TICKLESS_IDLE */
\r
650 /*-----------------------------------------------------------*/
\r
653 * Setup the SysTick timer to generate the tick interrupts at the required
\r
656 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
658 void vPortSetupTimerInterrupt( void )
\r
660 /* Calculate the constants required to configure the tick interrupt. */
\r
661 #if configUSE_TICKLESS_IDLE == 1
\r
663 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
664 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
\r
665 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
667 #endif /* configUSE_TICKLESS_IDLE */
\r
669 /* Configure SysTick to interrupt at the requested rate. */
\r
670 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
\r
671 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
\r
674 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
675 /*-----------------------------------------------------------*/
\r
677 __asm unsigned long ulPortSetInterruptMask( void )
\r
682 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
686 /*-----------------------------------------------------------*/
\r
688 __asm void vPortClearInterruptMask( unsigned long ulNewMask )
\r
695 /*-----------------------------------------------------------*/
\r
697 __asm unsigned long vPortGetIPSR( void )
\r
704 /*-----------------------------------------------------------*/
\r
706 #if( configASSERT_DEFINED == 1 )
\r
708 void vPortValidateInterruptPriority( void )
\r
710 unsigned long ulCurrentInterrupt;
\r
711 unsigned char ucCurrentPriority;
\r
713 /* Obtain the number of the currently executing interrupt. */
\r
714 ulCurrentInterrupt = vPortGetIPSR();
\r
716 /* Is the interrupt number a user defined interrupt? */
\r
717 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
719 /* Look up the interrupt's priority. */
\r
720 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
722 /* The following assertion will fail if a service routine (ISR) for
\r
723 an interrupt that has been assigned a priority above
\r
724 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
\r
725 function. ISR safe FreeRTOS API functions must *only* be called
\r
726 from interrupts that have been assigned a priority at or below
\r
727 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
729 Numerically low interrupt priority numbers represent logically high
\r
730 interrupt priorities, therefore the priority of the interrupt must
\r
731 be set to a value equal to or numerically *higher* than
\r
732 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
734 Interrupts that use the FreeRTOS API must not be left at their
\r
735 default priority of zero as that is the highest possible priority,
\r
736 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
\r
737 and therefore also guaranteed to be invalid.
\r
739 FreeRTOS maintains separate thread and ISR API functions to ensure
\r
740 interrupt entry is as fast and simple as possible.
\r
742 The following links provide detailed information:
\r
743 http://www.freertos.org/RTOS-Cortex-M3-M4.html
\r
744 http://www.freertos.org/FAQHelp.html */
\r
745 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
\r
748 /* Priority grouping: The interrupt controller (NVIC) allows the bits
\r
749 that define each interrupt's priority to be split between bits that
\r
750 define the interrupt's pre-emption priority bits and bits that define
\r
751 the interrupt's sub-priority. For simplicity all bits must be defined
\r
752 to be pre-emption priority bits. The following assertion will fail if
\r
753 this is not the case (if some bits represent a sub-priority).
\r
755 If the application only uses CMSIS libraries for interrupt
\r
756 configuration then the correct setting can be achieved on all Cortex-M
\r
757 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
\r
758 scheduler. Note however that some vendor specific peripheral libraries
\r
759 assume a non-zero priority group setting, in which cases using a value
\r
760 of zero will result in unpredicable behaviour. */
\r
761 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
\r
764 #endif /* configASSERT_DEFINED */
\r