2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /*-----------------------------------------------------------
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76 * Implementation of functions defined in portable.h for the ARM CM4F port.
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77 *----------------------------------------------------------*/
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79 /* Scheduler includes. */
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80 #include "FreeRTOS.h"
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83 #ifndef __TARGET_FPU_VFP
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84 #error This port can only be used when the project options are configured to enable hardware floating point support.
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87 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
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88 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
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91 #ifndef configSYSTICK_CLOCK_HZ
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92 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
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95 /* The __weak attribute does not work as you might expect with the Keil tools
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96 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if
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97 the application writer wants to provide their own implementation of
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98 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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100 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION
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101 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0
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104 /* Constants required to manipulate the core. Registers first... */
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105 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
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106 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
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107 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
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108 #define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
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109 /* ...then bits in the registers. */
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110 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
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111 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
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112 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
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113 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
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114 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
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115 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
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117 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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118 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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120 /* Constants required to check the validity of an interrupt prority. */
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121 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )
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122 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )
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123 #define portAIRCR_REG ( * ( ( volatile unsigned long * ) 0xE000ED0C ) )
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124 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )
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126 /* Constants required to manipulate the VFP. */
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127 #define portFPCCR ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */
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128 #define portASPEN_AND_LSPEN_BITS ( 0x3UL << 30UL )
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130 /* Constants required to set up the initial stack. */
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131 #define portINITIAL_XPSR ( 0x01000000 )
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132 #define portINITIAL_EXEC_RETURN ( 0xfffffffd )
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134 /* Constants used with memory barrier intrinsics. */
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135 #define portSY_FULL_READ_WRITE ( 15 )
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137 /* The systick is a 24-bit counter. */
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138 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )
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140 /* A fiddle factor to estimate the number of SysTick counts that would have
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141 occurred while the SysTick counter is stopped during tickless idle
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143 #define portMISSED_COUNTS_FACTOR ( 45UL )
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145 /* Each task maintains its own interrupt status in the critical nesting
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147 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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150 * Setup the timer to generate the tick interrupts. The implementation in this
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151 * file is weak to allow application writers to change the timer used to
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152 * generate the tick interrupt.
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154 void vPortSetupTimerInterrupt( void );
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157 * Exception handlers.
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159 void xPortPendSVHandler( void );
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160 void xPortSysTickHandler( void );
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161 void vPortSVCHandler( void );
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164 * Start first task is a separate function so it can be tested in isolation.
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166 static void prvStartFirstTask( void );
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169 * Functions defined in portasm.s to enable the VFP.
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171 static void prvEnableVFP( void );
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172 /*-----------------------------------------------------------*/
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175 * The number of SysTick increments that make up one tick period.
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177 #if configUSE_TICKLESS_IDLE == 1
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178 static unsigned long ulTimerCountsForOneTick = 0;
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179 #endif /* configUSE_TICKLESS_IDLE */
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182 * The maximum number of tick periods that can be suppressed is limited by the
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183 * 24 bit resolution of the SysTick timer.
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185 #if configUSE_TICKLESS_IDLE == 1
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186 static unsigned long xMaximumPossibleSuppressedTicks = 0;
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187 #endif /* configUSE_TICKLESS_IDLE */
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190 * Compensate for the CPU cycles that pass while the SysTick is stopped (low
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191 * power functionality only.
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193 #if configUSE_TICKLESS_IDLE == 1
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194 static unsigned long ulStoppedTimerCompensation = 0;
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195 #endif /* configUSE_TICKLESS_IDLE */
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198 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure
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199 * FreeRTOS API functions are not called from interrupts that have been assigned
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200 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.
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202 #if ( configASSERT_DEFINED == 1 )
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203 static unsigned char ucMaxSysCallPriority = 0;
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204 static const volatile unsigned char * const pcInterruptPriorityRegisters = ( unsigned char * ) portNVIC_IP_REGISTERS_OFFSET_16;
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205 #endif /* configASSERT_DEFINED */
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207 /*-----------------------------------------------------------*/
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210 * See header file for description.
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212 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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214 /* Simulate the stack frame as it would be created by a context switch
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217 /* Offset added to account for the way the MCU uses the stack on entry/exit
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218 of interrupts, and to ensure alignment. */
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221 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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223 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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225 *pxTopOfStack = 0; /* LR */
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227 /* Save code space by skipping register initialisation. */
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228 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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229 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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231 /* A save method is being used that requires each task to maintain its
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232 own exec return value. */
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234 *pxTopOfStack = portINITIAL_EXEC_RETURN;
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236 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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238 return pxTopOfStack;
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240 /*-----------------------------------------------------------*/
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242 __asm void vPortSVCHandler( void )
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246 /* Get the location of the current TCB. */
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247 ldr r3, =pxCurrentTCB
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250 /* Pop the core registers. */
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251 ldmia r0!, {r4-r11, r14}
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257 /*-----------------------------------------------------------*/
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259 __asm void prvStartFirstTask( void )
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263 /* Use the NVIC offset register to locate the stack. */
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264 ldr r0, =0xE000ED08
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267 /* Set the msp back to the start of the stack. */
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269 /* Globally enable interrupts. */
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271 /* Call SVC to start the first task. */
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275 /*-----------------------------------------------------------*/
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277 __asm void prvEnableVFP( void )
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281 /* The FPU enable bits are in the CPACR. */
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282 ldr.w r0, =0xE000ED88
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285 /* Enable CP10 and CP11 coprocessors, then save back. */
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286 orr r1, r1, #( 0xf << 20 )
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291 /*-----------------------------------------------------------*/
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294 * See header file for description.
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296 portBASE_TYPE xPortStartScheduler( void )
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298 #if( configASSERT_DEFINED == 1 )
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300 volatile unsigned long ulOriginalPriority;
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301 volatile char * const pcFirstUserPriorityRegister = ( char * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
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303 /* Determine the maximum priority from which ISR safe FreeRTOS API
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304 functions can be called. ISR safe functions are those that end in
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305 "FromISR". FreeRTOS maintains separate thread and ISR API functions to
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306 ensure interrupt entry is as fast and simple as possible.
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308 Save the interrupt priority value that is about to be clobbered. */
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309 ulOriginalPriority = *pcFirstUserPriorityRegister;
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311 /* Write the configMAX_SYSCALL_INTERRUPT_PRIORITY value to an interrupt
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312 priority register. */
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313 *pcFirstUserPriorityRegister = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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315 /* Read back the written priority to obtain its value as seen by the
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316 hardware, which will only implement a subset of the priority bits. */
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317 ucMaxSysCallPriority = *pcFirstUserPriorityRegister;
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319 /* Restore the clobbered interrupt priority register to its original
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321 *pcFirstUserPriorityRegister = ulOriginalPriority;
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323 #endif /* conifgASSERT_DEFINED */
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325 /* Make PendSV and SysTick the lowest priority interrupts. */
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326 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
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327 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
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329 /* Start the timer that generates the tick ISR. Interrupts are disabled
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331 vPortSetupTimerInterrupt();
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333 /* Initialise the critical nesting count ready for the first task. */
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334 uxCriticalNesting = 0;
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336 /* Ensure the VFP is enabled - it should be anyway. */
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339 /* Lazy save always. */
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340 *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
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342 /* Start the first task. */
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343 prvStartFirstTask();
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345 /* Should not get here! */
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348 /*-----------------------------------------------------------*/
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350 void vPortEndScheduler( void )
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352 /* It is unlikely that the CM4F port will require this function as there
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353 is nothing to return to. */
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355 /*-----------------------------------------------------------*/
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357 void vPortYield( void )
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359 /* Set a PendSV to request a context switch. */
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360 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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362 /* Barriers are normally not required but do ensure the code is completely
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363 within the specified behaviour for the architecture. */
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364 __dsb( portSY_FULL_READ_WRITE );
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365 __isb( portSY_FULL_READ_WRITE );
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367 /*-----------------------------------------------------------*/
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369 void vPortEnterCritical( void )
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371 portDISABLE_INTERRUPTS();
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372 uxCriticalNesting++;
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373 __dsb( portSY_FULL_READ_WRITE );
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374 __isb( portSY_FULL_READ_WRITE );
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376 /*-----------------------------------------------------------*/
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378 void vPortExitCritical( void )
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380 uxCriticalNesting--;
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381 if( uxCriticalNesting == 0 )
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383 portENABLE_INTERRUPTS();
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386 /*-----------------------------------------------------------*/
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388 __asm void xPortPendSVHandler( void )
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390 extern uxCriticalNesting;
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391 extern pxCurrentTCB;
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392 extern vTaskSwitchContext;
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398 /* Get the location of the current TCB. */
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399 ldr r3, =pxCurrentTCB
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402 /* Is the task using the FPU context? If so, push high vfp registers. */
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405 vstmdbeq r0!, {s16-s31}
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407 /* Save the core registers. */
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408 stmdb r0!, {r4-r11, r14}
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410 /* Save the new top of stack into the first member of the TCB. */
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413 stmdb sp!, {r3, r14}
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414 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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416 bl vTaskSwitchContext
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419 ldmia sp!, {r3, r14}
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421 /* The first item in pxCurrentTCB is the task top of stack. */
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425 /* Pop the core registers. */
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426 ldmia r0!, {r4-r11, r14}
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428 /* Is the task using the FPU context? If so, pop the high vfp registers
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432 vldmiaeq r0!, {s16-s31}
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438 /*-----------------------------------------------------------*/
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440 void xPortSysTickHandler( void )
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442 /* The SysTick runs at the lowest interrupt priority, so when this interrupt
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443 executes all interrupts must be unmasked. There is therefore no need to
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444 save and then restore the interrupt mask value as its value is already
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446 ( void ) portSET_INTERRUPT_MASK_FROM_ISR();
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448 /* Increment the RTOS tick. */
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449 if( xTaskIncrementTick() != pdFALSE )
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451 /* A context switch is required. Context switching is performed in
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452 the PendSV interrupt. Pend the PendSV interrupt. */
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453 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
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456 portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
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458 /*-----------------------------------------------------------*/
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460 #if configUSE_TICKLESS_IDLE == 1
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462 __weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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464 unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
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465 portTickType xModifiableIdleTime;
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467 /* Make sure the SysTick reload value does not overflow the counter. */
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468 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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470 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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473 /* Stop the SysTick momentarily. The time the SysTick is stopped for
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474 is accounted for as best it can be, but using the tickless mode will
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475 inevitably result in some tiny drift of the time maintained by the
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476 kernel with respect to calendar time. */
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477 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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479 /* Calculate the reload value required to wait xExpectedIdleTime
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480 tick periods. -1 is used because this code will execute part way
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481 through one of the tick periods. */
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482 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
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483 if( ulReloadValue > ulStoppedTimerCompensation )
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485 ulReloadValue -= ulStoppedTimerCompensation;
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488 /* Enter a critical section but don't use the taskENTER_CRITICAL()
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489 method as that will mask interrupts that should exit sleep mode. */
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492 /* If a context switch is pending or a task is waiting for the scheduler
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493 to be unsuspended then abandon the low power entry. */
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494 if( eTaskConfirmSleepModeStatus() == eAbortSleep )
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496 /* Restart SysTick. */
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497 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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499 /* Re-enable interrupts - see comments above __disable_irq() call
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505 /* Set the new reload value. */
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506 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
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508 /* Clear the SysTick count flag and set the count value back to
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510 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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512 /* Restart SysTick. */
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513 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
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515 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
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516 set its parameter to 0 to indicate that its implementation contains
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517 its own wait for interrupt or wait for event instruction, and so wfi
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518 should not be executed again. However, the original expected idle
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519 time variable must remain unmodified, so a copy is taken. */
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520 xModifiableIdleTime = xExpectedIdleTime;
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521 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
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522 if( xModifiableIdleTime > 0 )
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524 __dsb( portSY_FULL_READ_WRITE );
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526 __isb( portSY_FULL_READ_WRITE );
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528 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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530 /* Stop SysTick. Again, the time the SysTick is stopped for is
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531 accounted for as best it can be, but using the tickless mode will
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532 inevitably result in some tiny drift of the time maintained by the
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533 kernel with respect to calendar time. */
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534 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
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536 /* Re-enable interrupts - see comments above __disable_irq() call
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540 if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
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542 /* The tick interrupt has already executed, and the SysTick
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543 count reloaded with ulReloadValue. Reset the
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544 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick
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546 portNVIC_SYSTICK_LOAD_REG = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
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548 /* The tick interrupt handler will already have pended the tick
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549 processing in the kernel. As the pending tick will be
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550 processed as soon as this function exits, the tick value
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551 maintained by the tick is stepped forward by one less than the
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552 time spent waiting. */
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553 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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557 /* Something other than the tick interrupt ended the sleep.
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558 Work out how long the sleep lasted rounded to complete tick
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559 periods (not the ulReload value which accounted for part
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561 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
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563 /* How many complete tick periods passed while the processor
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565 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
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567 /* The reload value is set to whatever fraction of a single tick
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569 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
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572 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
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573 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
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575 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
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576 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
\r
578 vTaskStepTick( ulCompleteTickPeriods );
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580 /* The counter must start by the time the reload value is reset. */
\r
581 configASSERT( portNVIC_SYSTICK_CURRENT_VALUE_REG );
\r
582 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
\r
586 #endif /* #if configUSE_TICKLESS_IDLE */
\r
588 /*-----------------------------------------------------------*/
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591 * Setup the SysTick timer to generate the tick interrupts at the required
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594 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0
\r
596 void vPortSetupTimerInterrupt( void )
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598 /* Calculate the constants required to configure the tick interrupt. */
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599 #if configUSE_TICKLESS_IDLE == 1
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601 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );
\r
602 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
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603 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
\r
605 #endif /* configUSE_TICKLESS_IDLE */
\r
607 /* Configure SysTick to interrupt at the requested rate. */
\r
608 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
\r
609 portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
\r
612 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */
\r
613 /*-----------------------------------------------------------*/
\r
615 __asm unsigned long ulPortSetInterruptMask( void )
\r
620 mov r1, #configMAX_SYSCALL_INTERRUPT_PRIORITY
\r
624 /*-----------------------------------------------------------*/
\r
626 __asm void vPortClearInterruptMask( unsigned long ulNewMask )
\r
633 /*-----------------------------------------------------------*/
\r
635 __asm unsigned long vPortGetIPSR( void )
\r
642 /*-----------------------------------------------------------*/
\r
644 #if( configASSERT_DEFINED == 1 )
\r
646 void vPortValidateInterruptPriority( void )
\r
648 unsigned long ulCurrentInterrupt;
\r
649 unsigned char ucCurrentPriority;
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651 /* Obtain the number of the currently executing interrupt. */
\r
652 ulCurrentInterrupt = vPortGetIPSR();
\r
654 /* Is the interrupt number a user defined interrupt? */
\r
655 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
\r
657 /* Look up the interrupt's priority. */
\r
658 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
\r
660 /* The following assertion will fail if a service routine (ISR) for
\r
661 an interrupt that has been assigned a priority above
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662 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
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663 function. ISR safe FreeRTOS API functions must *only* be called
\r
664 from interrupts that have been assigned a priority at or below
\r
665 configMAX_SYSCALL_INTERRUPT_PRIORITY.
\r
667 Numerically low interrupt priority numbers represent logically high
\r
668 interrupt priorities, therefore the priority of the interrupt must
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669 be set to a value equal to or numerically *higher* than
\r
670 configMAX_SYSCALL_INTERRUPT_PRIORITY.
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672 Interrupts that use the FreeRTOS API must not be left at their
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673 default priority of zero as that is the highest possible priority,
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674 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,
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675 and therefore also guaranteed to be invalid.
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677 FreeRTOS maintains separate thread and ISR API functions to ensure
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678 interrupt entry is as fast and simple as possible.
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680 The following links provide detailed information:
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681 http://www.freertos.org/RTOS-Cortex-M3-M4.html
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682 http://www.freertos.org/FAQHelp.html */
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683 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
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686 /* Priority grouping: The interrupt controller (NVIC) allows the bits
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687 that define each interrupt's priority to be split between bits that
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688 define the interrupt's pre-emption priority bits and bits that define
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689 the interrupt's sub-priority. For simplicity all bits must be defined
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690 to be pre-emption priority bits. The following assertion will fail if
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691 this is not the case (if some bits represent a sub-priority).
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693 If CMSIS libraries are being used then the correct setting can be
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694 achieved by calling NVIC_SetPriorityGrouping( 0 ); before starting the
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696 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) == 0 );
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699 #endif /* configASSERT_DEFINED */
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