2 * FreeRTOS Kernel V10.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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37 /*-----------------------------------------------------------
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38 * Port specific definitions.
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40 * The settings in this file configure FreeRTOS correctly for the
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41 * given hardware and compiler.
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43 * These settings should not be altered.
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44 *-----------------------------------------------------------
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47 /* Type definitions. */
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48 #define portCHAR char
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49 #define portFLOAT float
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50 #define portDOUBLE double
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51 #define portLONG long
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52 #define portSHORT short
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53 #define portSTACK_TYPE uint32_t
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54 #define portBASE_TYPE long
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56 typedef portSTACK_TYPE StackType_t;
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57 typedef long BaseType_t;
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58 typedef unsigned long UBaseType_t;
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60 #if( configUSE_16_BIT_TICKS == 1 )
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61 typedef uint16_t TickType_t;
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62 #define portMAX_DELAY ( TickType_t ) 0xffff
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64 typedef uint32_t TickType_t;
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65 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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67 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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68 not need to be guarded with a critical section. */
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69 #define portTICK_TYPE_IS_ATOMIC 1
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71 /*-----------------------------------------------------------*/
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73 /* MPU specific constants. */
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74 #define portUSING_MPU_WRAPPERS 1
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75 #define portPRIVILEGE_BIT ( 0x80000000UL )
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77 #define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )
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78 #define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )
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79 #define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )
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80 #define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )
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81 #define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )
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82 #define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )
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84 #define portUNPRIVILEGED_FLASH_REGION ( 0UL )
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85 #define portPRIVILEGED_FLASH_REGION ( 1UL )
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86 #define portPRIVILEGED_RAM_REGION ( 2UL )
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87 #define portGENERAL_PERIPHERALS_REGION ( 3UL )
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88 #define portSTACK_REGION ( 4UL )
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89 #define portFIRST_CONFIGURABLE_REGION ( 5UL )
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90 #define portLAST_CONFIGURABLE_REGION ( 7UL )
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91 #define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )
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92 #define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */
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94 void vPortSwitchToUserMode( void );
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95 #define portSWITCH_TO_USER_MODE() vPortSwitchToUserMode()
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97 typedef struct MPU_REGION_REGISTERS
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99 uint32_t ulRegionBaseAddress;
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100 uint32_t ulRegionAttribute;
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101 } xMPU_REGION_REGISTERS;
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103 /* Plus 1 to create space for the stack region. */
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104 typedef struct MPU_SETTINGS
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106 xMPU_REGION_REGISTERS xRegion[ portTOTAL_NUM_REGIONS ];
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109 /* Architecture specifics. */
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110 #define portSTACK_GROWTH ( -1 )
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111 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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112 #define portBYTE_ALIGNMENT 8
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114 /* Constants used with memory barrier intrinsics. */
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115 #define portSY_FULL_READ_WRITE ( 15 )
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117 /*-----------------------------------------------------------*/
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119 /* SVC numbers for various services. */
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120 #define portSVC_START_SCHEDULER 0
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121 #define portSVC_YIELD 1
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122 #define portSVC_RAISE_PRIVILEGE 2
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124 /* Scheduler utilities. */
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126 #define portYIELD() __asm{ SVC portSVC_YIELD }
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127 #define portYIELD_WITHIN_API() \
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129 /* Set a PendSV to request a context switch. */ \
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130 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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132 /* Barriers are normally not required but do ensure the code is completely \
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133 within the specified behaviour for the architecture. */ \
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134 __dsb( portSY_FULL_READ_WRITE ); \
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135 __isb( portSY_FULL_READ_WRITE ); \
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137 /*-----------------------------------------------------------*/
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139 #define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
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140 #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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141 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT
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142 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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143 /*-----------------------------------------------------------*/
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145 /* Critical section management. */
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146 extern void vPortEnterCritical( void );
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147 extern void vPortExitCritical( void );
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149 #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
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150 #define portENABLE_INTERRUPTS() vPortSetBASEPRI(0)
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151 #define portENTER_CRITICAL() vPortEnterCritical()
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152 #define portEXIT_CRITICAL() vPortExitCritical()
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153 #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
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154 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)
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156 /*-----------------------------------------------------------*/
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158 /* Architecture specific optimisations. */
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159 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
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160 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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163 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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165 /* Check the configuration. */
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166 #if( configMAX_PRIORITIES > 32 )
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167 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
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170 /* Store/clear the ready priorities in a bit map. */
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171 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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172 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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174 /*-----------------------------------------------------------*/
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176 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )
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178 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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179 /*-----------------------------------------------------------*/
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181 /* Task function macros as described on the FreeRTOS.org WEB site. These are
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182 not necessary for to use this port. They are defined so the common demo files
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183 (which build with all the ports) will build. */
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184 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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185 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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186 /*-----------------------------------------------------------*/
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188 #ifdef configASSERT
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189 void vPortValidateInterruptPriority( void );
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190 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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193 /* portNOP() is not required by this port. */
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196 #define portINLINE __inline
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198 #ifndef portFORCE_INLINE
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199 #define portFORCE_INLINE __forceinline
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202 /*-----------------------------------------------------------*/
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204 static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
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208 /* Barrier instructions are not used as this function is only used to
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209 lower the BASEPRI value. */
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210 msr basepri, ulBASEPRI
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213 /*-----------------------------------------------------------*/
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215 static portFORCE_INLINE void vPortRaiseBASEPRI( void )
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217 uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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221 /* Set BASEPRI to the max syscall priority to effect a critical
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223 msr basepri, ulNewBASEPRI
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228 /*-----------------------------------------------------------*/
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230 static portFORCE_INLINE void vPortClearBASEPRIFromISR( void )
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234 /* Set BASEPRI to 0 so no interrupts are masked. This function is only
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235 used to lower the mask in an interrupt, so memory barriers are not
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240 /*-----------------------------------------------------------*/
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242 static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
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244 uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
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248 /* Set BASEPRI to the max syscall priority to effect a critical
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250 mrs ulReturn, basepri
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251 msr basepri, ulNewBASEPRI
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258 /*-----------------------------------------------------------*/
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260 static portFORCE_INLINE BaseType_t xPortIsInsideInterrupt( void )
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262 uint32_t ulCurrentInterrupt;
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263 BaseType_t xReturn;
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265 /* Obtain the number of the currently executing interrupt. */
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268 mrs ulCurrentInterrupt, ipsr
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271 if( ulCurrentInterrupt == 0 )
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282 /*-----------------------------------------------------------*/
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284 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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285 portFORCE_INLINE static void vPortResetPrivilege( BaseType_t xRunningPrivileged )
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289 if( xRunningPrivileged != pdTRUE )
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299 /*-----------------------------------------------------------*/
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306 #endif /* PORTMACRO_H */
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