2 FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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4 FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
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5 http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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7 ***************************************************************************
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9 * FreeRTOS tutorial books are available in pdf and paperback. *
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10 * Complete, revised, and edited pdf reference manuals are also *
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13 * Purchasing FreeRTOS documentation will not only help you, by *
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14 * ensuring you get running as quickly as possible and with an *
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15 * in-depth knowledge of how to use FreeRTOS, it will also help *
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16 * the FreeRTOS project to continue with its mission of providing *
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17 * professional grade, cross platform, de facto standard solutions *
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18 * for microcontrollers - completely free of charge! *
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20 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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22 * Thank you for using FreeRTOS, and thank you for your support! *
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24 ***************************************************************************
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27 This file is part of the FreeRTOS distribution.
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29 FreeRTOS is free software; you can redistribute it and/or modify it under
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30 the terms of the GNU General Public License (version 2) as published by the
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31 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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33 >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
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34 distribute a combined work that includes FreeRTOS without being obliged to
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35 provide the source code for proprietary components outside of the FreeRTOS
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38 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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39 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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40 FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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41 details. You should have received a copy of the GNU General Public License
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42 and the FreeRTOS license exception along with FreeRTOS; if not it can be
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43 viewed here: http://www.freertos.org/a00114.html and also obtained by
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44 writing to Real Time Engineers Ltd., contact details for whom are available
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45 on the FreeRTOS WEB site.
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49 ***************************************************************************
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51 * Having a problem? Start by reading the FAQ "My application does *
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52 * not run, what could be wrong?" *
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54 * http://www.FreeRTOS.org/FAQHelp.html *
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56 ***************************************************************************
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59 http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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60 license and Real Time Engineers Ltd. contact details.
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62 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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63 including FreeRTOS+Trace - an indispensable productivity tool, and our new
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64 fully thread aware and reentrant UDP/IP stack.
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66 http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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67 Integrity Systems, who sell the code with commercial support,
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68 indemnification and middleware, under the OpenRTOS brand.
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70 http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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71 engineered and independently SIL3 certified version for use in safety and
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72 mission critical applications that require provable dependability.
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75 /*-----------------------------------------------------------
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76 * Implementation of functions defined in portable.h for the RX100 port.
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77 *----------------------------------------------------------*/
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79 /* Standard C includes. */
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82 /* Scheduler includes. */
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83 #include "FreeRTOS.h"
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86 /* Library includes. */
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89 /* Hardware specifics. */
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90 #include "iodefine.h"
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92 /*-----------------------------------------------------------*/
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94 /* Tasks should start with interrupts enabled and in Supervisor mode, therefore
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95 PSW is set with U and I set, and PM and IPL clear. */
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96 #define portINITIAL_PSW ( ( portSTACK_TYPE ) 0x00030000 )
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98 /* The peripheral clock is divided by this value before being supplying the
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100 #if ( configUSE_TICKLESS_IDLE == 0 )
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101 /* If tickless idle is not used then the divisor can be fixed. */
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102 #define portCLOCK_DIVISOR 8UL
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103 #elif ( configPERIPHERAL_CLOCK_HZ >= 12000000 )
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104 #define portCLOCK_DIVISOR 512UL
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105 #elif ( configPERIPHERAL_CLOCK_HZ >= 6000000 )
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106 #define portCLOCK_DIVISOR 128UL
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107 #elif ( configPERIPHERAL_CLOCK_HZ >= 1000000 )
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108 #define portCLOCK_DIVISOR 32UL
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110 #define portCLOCK_DIVISOR 8UL
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114 /* Keys required to lock and unlock access to certain system registers
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116 #define portUNLOCK_KEY 0xA50B
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117 #define portLOCK_KEY 0xA500
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119 /*-----------------------------------------------------------*/
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121 /* The following lines are to ensure vSoftwareInterruptEntry can be referenced,
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122 and therefore installed in the vector table, when the FreeRTOS code is built
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124 extern portBASE_TYPE vSoftwareInterruptEntry;
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125 const portBASE_TYPE * p_vSoftwareInterruptEntry = &vSoftwareInterruptEntry;
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127 /*-----------------------------------------------------------*/
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130 * Function to start the first task executing - written in asm code as direct
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131 * access to registers is required.
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133 static void prvStartFirstTask( void );
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136 * Software interrupt handler. Performs the actual context switch (saving and
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137 * restoring of registers). Written in asm code as direct register access is
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140 static void prvYieldHandler( void );
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143 * The entry point for the software interrupt handler. This is the function
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144 * that calls the inline asm function prvYieldHandler(). It is installed in
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145 * the vector table, but the code that installs it is in prvYieldHandler rather
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146 * than using a #pragma.
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148 void vSoftwareInterruptISR( void );
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151 * Sets up the periodic ISR used for the RTOS tick using the CMT.
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152 * The application writer can define configSETUP_TICK_INTERRUPT() (in
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153 * FreeRTOSConfig.h) such that their own tick interrupt configuration is used
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154 * in place of prvSetupTimerInterrupt().
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156 static void prvSetupTimerInterrupt( void );
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157 #ifndef configSETUP_TICK_INTERRUPT
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158 /* The user has not provided their own tick interrupt configuration so use
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159 the definition in this file (which uses the interval timer). */
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160 #define configSETUP_TICK_INTERRUPT() prvSetupTimerInterrupt()
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161 #endif /* configSETUP_TICK_INTERRUPT */
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164 * Called after the sleep mode registers have been configured, prvSleep()
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165 * executes the pre and post sleep macros, and actually calls the wait
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168 #if configUSE_TICKLESS_IDLE == 1
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169 static void prvSleep( portTickType xExpectedIdleTime );
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170 #endif /* configUSE_TICKLESS_IDLE */
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172 /*-----------------------------------------------------------*/
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174 /* These is accessed by the inline assembler functions. */
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175 extern void *pxCurrentTCB;
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176 extern void vTaskSwitchContext( void );
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178 /*-----------------------------------------------------------*/
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180 /* Calculate how many clock increments make up a single tick period. */
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181 static const unsigned long ulMatchValueForOneTick = ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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183 #if configUSE_TICKLESS_IDLE == 1
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185 /* Holds the maximum number of ticks that can be suppressed - which is
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186 basically how far into the future an interrupt can be generated. Set
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187 during initialisation. This is the maximum possible value that the
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188 compare match register can hold divided by ulMatchValueForOneTick. */
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189 static const portTickType xMaximumPossibleSuppressedTicks = USHRT_MAX / ( ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) / configTICK_RATE_HZ );
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191 /* Flag set from the tick interrupt to allow the sleep processing to know if
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192 sleep mode was exited because of a tick interrupt, or an interrupt
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193 generated by something else. */
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194 static volatile uint32_t ulTickFlag = pdFALSE;
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196 /* The CMT counter is stopped temporarily each time it is re-programmed.
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197 The following constant offsets the CMT counter match value by the number of
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198 CMT counts that would typically be missed while the counter was stopped to
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199 compensate for the lost time. The large difference between the divided CMT
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200 clock and the CPU clock means it is likely ulStoppedTimerCompensation will
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201 equal zero - and be optimised away. */
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202 static const unsigned long ulStoppedTimerCompensation = 100UL / ( configCPU_CLOCK_HZ / ( configPERIPHERAL_CLOCK_HZ / portCLOCK_DIVISOR ) );
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206 /*-----------------------------------------------------------*/
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209 * See header file for description.
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211 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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213 /* Offset to end up on 8 byte boundary. */
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216 /* R0 is not included as it is the stack pointer. */
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217 *pxTopOfStack = 0x00;
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219 *pxTopOfStack = 0x00;
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221 *pxTopOfStack = portINITIAL_PSW;
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223 *pxTopOfStack = ( portSTACK_TYPE ) pxCode;
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225 /* When debugging it can be useful if every register is set to a known
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226 value. Otherwise code space can be saved by just setting the registers
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227 that need to be set. */
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228 #ifdef USE_FULL_REGISTER_INITIALISATION
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231 *pxTopOfStack = 0x12345678; /* r15. */
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233 *pxTopOfStack = 0xaaaabbbb;
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235 *pxTopOfStack = 0xdddddddd;
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237 *pxTopOfStack = 0xcccccccc;
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239 *pxTopOfStack = 0xbbbbbbbb;
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241 *pxTopOfStack = 0xaaaaaaaa;
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243 *pxTopOfStack = 0x99999999;
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245 *pxTopOfStack = 0x88888888;
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247 *pxTopOfStack = 0x77777777;
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249 *pxTopOfStack = 0x66666666;
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251 *pxTopOfStack = 0x55555555;
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253 *pxTopOfStack = 0x44444444;
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255 *pxTopOfStack = 0x33333333;
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257 *pxTopOfStack = 0x22222222;
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262 /* Leave space for the registers that will get popped from the stack
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263 when the task first starts executing. */
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264 pxTopOfStack -= 15;
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268 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R1 */
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270 *pxTopOfStack = 0x12345678; /* Accumulator. */
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272 *pxTopOfStack = 0x87654321; /* Accumulator. */
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274 return pxTopOfStack;
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276 /*-----------------------------------------------------------*/
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278 portBASE_TYPE xPortStartScheduler( void )
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280 /* Use pxCurrentTCB just so it does not get optimised away. */
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281 if( pxCurrentTCB != NULL )
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283 /* Call an application function to set up the timer that will generate
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284 the tick interrupt. This way the application can decide which
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285 peripheral to use. If tickless mode is used then the default
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286 implementation defined in this file (which uses CMT0) should not be
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288 configSETUP_TICK_INTERRUPT();
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290 /* Enable the software interrupt. */
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291 _IEN( _ICU_SWINT ) = 1;
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293 /* Ensure the software interrupt is clear. */
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294 _IR( _ICU_SWINT ) = 0;
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296 /* Ensure the software interrupt is set to the kernel priority. */
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297 _IPR( _ICU_SWINT ) = configKERNEL_INTERRUPT_PRIORITY;
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299 /* Start the first task. */
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300 prvStartFirstTask();
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303 /* Execution should not reach here as the tasks are now running!
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304 prvSetupTimerInterrupt() is called here to prevent the compiler outputting
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305 a warning about a statically declared function not being referenced in the
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306 case that the application writer has provided their own tick interrupt
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307 configuration routine (and defined configSETUP_TICK_INTERRUPT() such that
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308 their own routine will be called in place of prvSetupTimerInterrupt()). */
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309 prvSetupTimerInterrupt();
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311 /* Just to make sure the function is not optimised away. */
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312 ( void ) vSoftwareInterruptISR();
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314 /* Should not get here. */
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317 /*-----------------------------------------------------------*/
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319 #pragma inline_asm prvStartFirstTask
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320 static void prvStartFirstTask( void )
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322 /* When starting the scheduler there is nothing that needs moving to the
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323 interrupt stack because the function is not called from an interrupt.
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324 Just ensure the current stack is the user stack. */
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327 /* Obtain the location of the stack associated with which ever task
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328 pxCurrentTCB is currently pointing to. */
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329 MOV.L #_pxCurrentTCB, R15
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333 /* Restore the registers from the stack of the task pointed to by
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336 MVTACLO R15 /* Accumulator low 32 bits. */
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338 MVTACHI R15 /* Accumulator high 32 bits. */
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339 POPM R1-R15 /* R1 to R15 - R0 is not included as it is the SP. */
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340 RTE /* This pops the remaining registers. */
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344 /*-----------------------------------------------------------*/
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346 #pragma interrupt ( prvTickISR( vect = configTICK_VECTOR, enable ) )
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347 void prvTickISR( void )
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349 /* Increment the tick, and perform any processing the new tick value
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351 set_ipl( configMAX_SYSCALL_INTERRUPT_PRIORITY );
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353 vTaskIncrementTick();
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355 set_ipl( configKERNEL_INTERRUPT_PRIORITY );
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357 /* Only select a new task if the preemptive scheduler is being used. */
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358 #if( configUSE_PREEMPTION == 1 )
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364 #if configUSE_TICKLESS_IDLE == 1
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366 /* The CPU woke because of a tick. */
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367 ulTickFlag = pdTRUE;
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369 /* If this is the first tick since exiting tickless mode then the CMT
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370 compare match value needs resetting. */
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371 CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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375 /*-----------------------------------------------------------*/
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377 void vSoftwareInterruptISR( void )
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381 /*-----------------------------------------------------------*/
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383 #pragma inline_asm prvYieldHandler
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384 static void prvYieldHandler( void )
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386 /* Re-enable interrupts. */
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389 /* Move the data that was automatically pushed onto the interrupt stack
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390 when the interrupt occurred from the interrupt stack to the user stack.
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392 R15 is saved before it is clobbered. */
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395 /* Read the user stack pointer. */
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398 /* Move the address down to the data being moved. */
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402 /* Copy the data across. */
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403 MOV.L [ R0 ], [ R15 ] ; R15
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404 MOV.L 4[ R0 ], 4[ R15 ] ; PC
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405 MOV.L 8[ R0 ], 8[ R15 ] ; PSW
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407 /* Move the interrupt stack pointer to its new correct position. */
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410 /* All the rest of the registers are saved directly to the user stack. */
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413 /* Save the rest of the general registers (R15 has been saved already). */
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416 /* Save the accumulator. */
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419 MVFACMI R15 ; Middle order word.
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420 SHLL #16, R15 ; Shifted left as it is restored to the low order word.
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423 /* Save the stack pointer to the TCB. */
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424 MOV.L #_pxCurrentTCB, R15
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428 /* Ensure the interrupt mask is set to the syscall priority while the
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429 kernel structures are being accessed. */
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430 MVTIPL #configMAX_SYSCALL_INTERRUPT_PRIORITY
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432 /* Select the next task to run. */
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433 BSR.A _vTaskSwitchContext
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435 /* Reset the interrupt mask as no more data structure access is
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437 MVTIPL #configKERNEL_INTERRUPT_PRIORITY
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439 /* Load the stack pointer of the task that is now selected as the Running
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440 state task from its TCB. */
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441 MOV.L #_pxCurrentTCB,R15
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445 /* Restore the context of the new task. The PSW (Program Status Word) and
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446 PC will be popped by the RTE instruction. */
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456 /*-----------------------------------------------------------*/
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458 void vPortEndScheduler( void )
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460 /* Not implemented as there is nothing to return to. */
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462 /* The following line is just to prevent the symbol getting optimised away. */
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463 ( void ) vTaskSwitchContext();
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465 /*-----------------------------------------------------------*/
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467 static void prvSetupTimerInterrupt( void )
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470 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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476 SYSTEM.PRCR.WORD = portLOCK_KEY;
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478 /* Interrupt on compare match. */
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479 CMT0.CMCR.BIT.CMIE = 1;
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481 /* Set the compare match value. */
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482 CMT0.CMCOR = ( unsigned short ) ulMatchValueForOneTick;
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484 /* Divide the PCLK. */
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485 #if portCLOCK_DIVISOR == 512
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487 CMT0.CMCR.BIT.CKS = 3;
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489 #elif portCLOCK_DIVISOR == 128
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491 CMT0.CMCR.BIT.CKS = 2;
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493 #elif portCLOCK_DIVISOR == 32
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495 CMT0.CMCR.BIT.CKS = 1;
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497 #elif portCLOCK_DIVISOR == 8
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499 CMT0.CMCR.BIT.CKS = 0;
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503 #error Invalid portCLOCK_DIVISOR setting
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508 /* Enable the interrupt... */
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509 _IEN( _CMT0_CMI0 ) = 1;
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511 /* ...and set its priority to the application defined kernel priority. */
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512 _IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
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514 /* Start the timer. */
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515 CMT.CMSTR0.BIT.STR0 = 1;
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517 /*-----------------------------------------------------------*/
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519 #if configUSE_TICKLESS_IDLE == 1
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521 static void prvSleep( portTickType xExpectedIdleTime )
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523 /* Allow the application to define some pre-sleep processing. */
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524 configPRE_SLEEP_PROCESSING( xExpectedIdleTime );
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526 /* xExpectedIdleTime being set to 0 by configPRE_SLEEP_PROCESSING()
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527 means the application defined code has already executed the WAIT
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529 if( xExpectedIdleTime > 0 )
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534 /* Allow the application to define some post sleep processing. */
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535 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
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538 #endif /* configUSE_TICKLESS_IDLE */
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539 /*-----------------------------------------------------------*/
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541 #if configUSE_TICKLESS_IDLE == 1
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543 void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
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545 unsigned long ulMatchValue, ulCompleteTickPeriods, ulCurrentCount;
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546 eSleepModeStatus eSleepAction;
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548 /* THIS FUNCTION IS CALLED WITH THE SCHEDULER SUSPENDED. */
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550 /* Make sure the CMT reload value does not overflow the counter. */
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551 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
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553 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
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556 /* Calculate the reload value required to wait xExpectedIdleTime tick
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557 periods. -1 is used because this code will execute part way through
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558 one of the tick periods, and the fraction of a tick period is accounted
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560 ulMatchValue = ( ulMatchValueForOneTick * ( xExpectedIdleTime - 1UL ) );
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561 if( ulMatchValue > ulStoppedTimerCompensation )
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563 /* Compensate for the fact that the CMT is going to be stopped
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565 ulMatchValue -= ulStoppedTimerCompensation;
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568 /* Stop the CMT momentarily. The time the CMT is stopped for is
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569 accounted for as best it can be, but using the tickless mode will
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570 inevitably result in some tiny drift of the time maintained by the
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571 kernel with respect to calendar time. */
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572 CMT.CMSTR0.BIT.STR0 = 0;
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573 while( CMT.CMSTR0.BIT.STR0 == 1 )
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575 /* Nothing to do here. */
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578 /* Critical section using the global interrupt bit as the i bit is
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579 automatically reset by the WAIT instruction. */
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582 /* The tick flag is set to false before sleeping. If it is true when
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583 sleep mode is exited then sleep mode was probably exited because the
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584 tick was suppressed for the entire xExpectedIdleTime period. */
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585 ulTickFlag = pdFALSE;
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587 /* If a context switch is pending then abandon the low power entry as
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588 the context switch might have been pended by an external interrupt that
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589 requires processing. */
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590 eSleepAction = eTaskConfirmSleepModeStatus();
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591 if( eSleepAction == eAbortSleep )
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593 /* Restart tick. */
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594 CMT.CMSTR0.BIT.STR0 = 1;
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597 else if( eSleepAction == eNoTasksWaitingTimeout )
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599 /* Protection off. */
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600 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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602 /* Ready for software standby with all clocks stopped. */
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603 SYSTEM.SBYCR.BIT.SSBY = 1;
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605 /* Protection on. */
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606 SYSTEM.PRCR.WORD = portLOCK_KEY;
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608 /* Sleep until something happens. Calling prvSleep() will
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609 automatically reset the i bit in the PSW. */
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610 prvSleep( xExpectedIdleTime );
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612 /* Restart the CMT. */
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613 CMT.CMSTR0.BIT.STR0 = 1;
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617 /* Protection off. */
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618 SYSTEM.PRCR.WORD = portUNLOCK_KEY;
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620 /* Ready for deep sleep mode. */
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621 SYSTEM.MSTPCRC.BIT.DSLPE = 1;
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622 SYSTEM.MSTPCRA.BIT.MSTPA28 = 1;
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623 SYSTEM.SBYCR.BIT.SSBY = 0;
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625 /* Protection on. */
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626 SYSTEM.PRCR.WORD = portLOCK_KEY;
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628 /* Adjust the match value to take into account that the current
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629 time slice is already partially complete. */
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630 ulMatchValue -= ( unsigned long ) CMT0.CMCNT;
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631 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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633 /* Restart the CMT to count up to the new match value. */
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635 CMT.CMSTR0.BIT.STR0 = 1;
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637 /* Sleep until something happens. Calling prvSleep() will
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638 automatically reset the i bit in the PSW. */
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639 prvSleep( xExpectedIdleTime );
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641 /* Stop CMT. Again, the time the SysTick is stopped for is
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642 accounted for as best it can be, but using the tickless mode will
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643 inevitably result in some tiny drift of the time maintained by the
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644 kernel with respect to calendar time. */
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645 CMT.CMSTR0.BIT.STR0 = 0;
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646 while( CMT.CMSTR0.BIT.STR0 == 1 )
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648 /* Nothing to do here. */
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651 ulCurrentCount = ( unsigned long ) CMT0.CMCNT;
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653 if( ulTickFlag != pdFALSE )
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655 /* The tick interrupt has already executed, although because
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656 this function is called with the scheduler suspended the actual
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657 tick processing will not occur until after this function has
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658 exited. Reset the match value with whatever remains of this
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660 ulMatchValue = ulMatchValueForOneTick - ulCurrentCount;
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661 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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663 /* The tick interrupt handler will already have pended the tick
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664 processing in the kernel. As the pending tick will be
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665 processed as soon as this function exits, the tick value
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666 maintained by the tick is stepped forward by one less than the
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667 time spent sleeping. The actual stepping of the tick appears
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668 later in this function. */
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669 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
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673 /* Something other than the tick interrupt ended the sleep.
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674 How many complete tick periods passed while the processor was
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676 ulCompleteTickPeriods = ulCurrentCount / ulMatchValueForOneTick;
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678 /* The match value is set to whatever fraction of a single tick
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680 ulMatchValue = ulCurrentCount - ( ulCompleteTickPeriods * ulMatchValueForOneTick );
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681 CMT0.CMCOR = ( unsigned short ) ulMatchValue;
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684 /* Restart the CMT so it runs up to the match value. The match value
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685 will get set to the value required to generate exactly one tick period
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686 the next time the CMT interrupt executes. */
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688 CMT.CMSTR0.BIT.STR0 = 1;
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690 /* Wind the tick forward by the number of tick periods that the CPU
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691 remained in a low power state. */
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692 vTaskStepTick( ulCompleteTickPeriods );
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696 #endif /* configUSE_TICKLESS_IDLE */
\r