git.sur5r.net Git - freertos/blob - FreeRTOS-Plus/Demo/FreeRTOS_Plus_UDP_and_CLI_LPC1830_GCC/ThirdParty/CMSISv2p10_LPC18xx_DriverLib/src/lpc18xx_uart.c

   1 /**********************************************************************\r
   2 * $Id$          lpc18xx_uart.c          2011-06-02\r
   3 *//**\r
   4 * @file         lpc18xx_uart.c\r
   5 * @brief        Contains all functions support for UART firmware library on LPC18xx\r
   6 * @version      1.0\r
   7 * @date         02. June. 2011\r
   8 * @author       NXP MCU SW Application Team\r
   9 *\r
  10 * Copyright(C) 2011, NXP Semiconductor\r
  11 * All rights reserved.\r
  12 *\r
  13 ***********************************************************************\r
  14 * Software that is described herein is for illustrative purposes only\r
  15 * which provides customers with programming information regarding the\r
  16 * products. This software is supplied "AS IS" without any warranties.\r
  17 * NXP Semiconductors assumes no responsibility or liability for the\r
  18 * use of the software, conveys no license or title under any patent,\r
  19 * copyright, or mask work right to the product. NXP Semiconductors\r
  20 * reserves the right to make changes in the software without\r
  21 * notification. NXP Semiconductors also make no representation or\r
  22 * warranty that such application will be suitable for the specified\r
  23 * use without further testing or modification.\r
  24 **********************************************************************/\r
  25 \r
  26 /* Peripheral group ----------------------------------------------------------- */\r
  27 /** @addtogroup UART\r
  28  * @{\r
  29  */\r
  30 \r
  31 /* Includes ------------------------------------------------------------------- */\r
  32 #include "lpc18xx_uart.h"\r
  33 #include "lpc18xx_cgu.h"\r
  34 \r
  35 /* If this source file built with example, the LPC18xx FW library configuration\r
  36  * file in each example directory ("lpc18xx_libcfg.h") must be included,\r
  37  * otherwise the default FW library configuration file must be included instead\r
  38  */\r
  39 #ifdef __BUILD_WITH_EXAMPLE__\r
  40 #include "lpc18xx_libcfg.h"\r
  41 #else\r
  42 #include "lpc18xx_libcfg_default.h"\r
  43 #endif /* __BUILD_WITH_EXAMPLE__ */\r
  44 \r
  45 \r
  46 #ifdef _UART\r
  47 \r
  48 /* Private Functions ---------------------------------------------------------- */\r
  49 \r
  50 static Status uart_set_divisors(LPC_USARTn_Type *UARTx, uint32_t baudrate);\r
  51 \r
  52 \r
  53 /*********************************************************************//**\r
  54  * @brief               Determines best dividers to get a target clock rate\r
  55  * @param[in]   UARTx   Pointer to selected UART peripheral, should be:\r
  56  *                                      - LPC_UART0     :UART0 peripheral\r
  57  *                                      - LPC_UART1     :UART1 peripheral\r
  58  *                                      - LPC_UART2     :UART2 peripheral\r
  59  *                                      - LPC_UART3     :UART3 peripheral\r
  60  * @param[in]   baudrate Desired UART baud rate.\r
  61  * @return              Error status, could be:\r
  62  *                                      - SUCCESS\r
  63  *                                      - ERROR\r
  64  **********************************************************************/\r
  65 static Status uart_set_divisors(LPC_USARTn_Type *UARTx, uint32_t baudrate)\r
  66 {\r
  67         Status errorStatus = ERROR;\r
  68 \r
  69         uint32_t uClk;\r
  70         uint32_t d, m, bestd, bestm, tmp;\r
  71         uint64_t best_divisor, divisor;\r
  72         uint32_t current_error, best_error;\r
  73         uint32_t recalcbaud;\r
  74 \r
  75         /* get UART block clock */\r
  76         //to be defined uClk = CGU_GetCLK(CGU_CLKTYPE_PER);\r
  77 #ifdef _UART0\r
  78         if(UARTx == LPC_USART0)\r
  79         {\r
  80                 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART0);\r
  81         }\r
  82 #endif\r
  83 \r
  84 #ifdef _UART1\r
  85         if(((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
  86         {\r
  87                 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART1);\r
  88         }\r
  89 #endif\r
  90 \r
  91 #ifdef _UART2\r
  92         if(UARTx == LPC_USART2)\r
  93         {\r
  94                 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART2);\r
  95         }\r
  96 #endif\r
  97 \r
  98 #ifdef _UART3\r
  99         if(UARTx == LPC_USART3)\r
 100         {\r
 101                 uClk = CGU_GetPCLKFrequency(CGU_PERIPHERAL_UART3);\r
 102         }\r
 103 #endif\r
 104 \r
 105         /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers\r
 106         * The formula is :\r
 107         * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)\r
 108         * It involves floating point calculations. That's the reason the formulae are adjusted with\r
 109         * Multiply and divide method.*/\r
 110         /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:\r
 111         * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */\r
 112         best_error = 0xFFFFFFFF; /* Worst case */\r
 113         bestd = 0;\r
 114         bestm = 0;\r
 115         best_divisor = 0;\r
 116         for (m = 1 ; m <= 15 ;m++)\r
 117         {\r
 118                 for (d = 0 ; d < m ; d++)\r
 119                 {\r
 120                   divisor = ((uint64_t)uClk<<28)*m/(baudrate*(m+d));\r
 121                   current_error = divisor & 0xFFFFFFFF;\r
 122 \r
 123                   tmp = divisor>>32;\r
 124 \r
 125                   /* Adjust error */\r
 126                   if(current_error > ((uint32_t)1<<31)){\r
 127                         current_error = -current_error;\r
 128                         tmp++;\r
 129                         }\r
 130 \r
 131                   if(tmp<1 || tmp>65536) /* Out of range */\r
 132                   continue;\r
 133 \r
 134                   if( current_error < best_error){\r
 135                         best_error = current_error;\r
 136                         best_divisor = tmp;\r
 137                         bestd = d;\r
 138                         bestm = m;\r
 139                         if(best_error == 0) break;\r
 140                         }\r
 141                 } /* end of inner for loop */\r
 142 \r
 143                 if (best_error == 0)\r
 144                   break;\r
 145         } /* end of outer for loop  */\r
 146 \r
 147         if(best_divisor == 0) return ERROR; /* can not find best match */\r
 148 \r
 149         recalcbaud = (uClk>>4) * bestm/(best_divisor * (bestm + bestd));\r
 150 \r
 151         /* reuse best_error to evaluate baud error*/\r
 152         if(baudrate>recalcbaud) best_error = baudrate - recalcbaud;\r
 153         else best_error = recalcbaud -baudrate;\r
 154 \r
 155         best_error = best_error * 100 / baudrate;\r
 156 \r
 157         if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)\r
 158         {\r
 159                 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 160                 {\r
 161                         ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_DLAB_EN;\r
 162                         ((LPC_UART1_Type *)UARTx)->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);\r
 163                         ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);\r
 164                         /* Then reset DLAB bit */\r
 165                         ((LPC_UART1_Type *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;\r
 166                         ((LPC_UART1_Type *)UARTx)->FDR = (UART_FDR_MULVAL(bestm) \\r
 167                                         | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;\r
 168                 }\r
 169                 else\r
 170                 {\r
 171                         UARTx->LCR |= UART_LCR_DLAB_EN;\r
 172                         UARTx->/*DLIER.*/DLM = UART_LOAD_DLM(best_divisor);\r
 173                         UARTx->/*RBTHDLR.*/DLL = UART_LOAD_DLL(best_divisor);\r
 174                         /* Then reset DLAB bit */\r
 175                         UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;\r
 176                         UARTx->FDR = (UART_FDR_MULVAL(bestm) \\r
 177                                         | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;\r
 178                 }\r
 179                 errorStatus = SUCCESS;\r
 180         }\r
 181 \r
 182         return errorStatus;\r
 183 }\r
 184 \r
 185 /* End of Private Functions ---------------------------------------------------- */\r
 186 \r
 187 \r
 188 /* Public Functions ----------------------------------------------------------- */\r
 189 /** @addtogroup UART_Public_Functions\r
 190  * @{\r
 191  */\r
 192 /* UART Init/DeInit functions -------------------------------------------------*/\r
 193 /********************************************************************//**\r
 194  * @brief               Initializes the UARTx peripheral according to the specified\r
 195  *               parameters in the UART_ConfigStruct.\r
 196  * @param[in]   UARTx   UART peripheral selected, should be:\r
 197  *                                      - LPC_UART0     :UART0 peripheral\r
 198  *                                      - LPC_UART1     :UART1 peripheral\r
 199  *                                      - LPC_UART2     :UART2 peripheral\r
 200  *                                      - LPC_UART3     :UART3 peripheral\r
 201  * @param[in]   UART_ConfigStruct Pointer to a UART_CFG_Type structure\r
 202  *              that contains the configuration information for the\r
 203  *              specified UART peripheral.\r
 204  * @return              None\r
 205  *********************************************************************/\r
 206 void UART_Init(LPC_USARTn_Type *UARTx, UART_CFG_Type *UART_ConfigStruct)\r
 207 {\r
 208         uint32_t tmp;\r
 209 \r
 210         // For debug mode\r
 211         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 212         CHECK_PARAM(PARAM_UART_DATABIT(UART_ConfigStruct->Databits));\r
 213         CHECK_PARAM(PARAM_UART_STOPBIT(UART_ConfigStruct->Stopbits));\r
 214         CHECK_PARAM(PARAM_UART_PARITY(UART_ConfigStruct->Parity));\r
 215 \r
 216 #ifdef _UART0\r
 217         if(UARTx == LPC_USART0)\r
 218         {\r
 219                 /* Set up peripheral clock for UART0 module */\r
 220                 //LPC_CGU->BASE_UART0_CLK = (SRC_PL160M_0<<24) | (1<<11);       // Use PLL1 and auto block\r
 221                 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART0);\r
 222         }\r
 223 #endif\r
 224 \r
 225 #ifdef _UART1\r
 226         if(((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 227         {\r
 228                 /* Set up peripheral clock for UART1 module */\r
 229                 //LPC_CGU->BASE_UART1_CLK = (SRC_PL160M_0<<24) | (1<<11);       // Use PLL1 and auto block\r
 230                 CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_UART1);\r
 231         }\r
 232 #endif\r
 233 \r
 234 #ifdef _UART2\r
 235         if(UARTx == LPC_USART2)\r
 236         {\r
 237                 /* Set up peripheral clock for UART2 module */\r
 238                 //LPC_CGU->BASE_UART2_CLK = (SRC_PL160M_0<<24) | (1<<11);       // Use PLL1 and auto block\r
 239                 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART2);\r
 240         }\r
 241 #endif\r
 242 \r
 243 #ifdef _UART3\r
 244         if(UARTx == LPC_USART3)\r
 245         {\r
 246                 /* Set up peripheral clock for UART3 module */\r
 247                 //LPC_CGU->BASE_UART3_CLK = (SRC_PL160M_0<<24) | (1<<11);       // Use PLL1 and auto block\r
 248                 CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_BASE_UART3);\r
 249         }\r
 250 #endif\r
 251 \r
 252         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 253         {\r
 254                 /* FIFOs are empty */\r
 255                 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN \\r
 256                                 | UART_FCR_RX_RS | UART_FCR_TX_RS);\r
 257                 // Disable FIFO\r
 258                 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = 0;\r
 259 \r
 260                 // Dummy reading\r
 261                 while (((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_RDR)\r
 262                 {\r
 263                         tmp = ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/RBR;\r
 264                 }\r
 265 \r
 266                 ((LPC_UART1_Type *)UARTx)->TER = UART1_TER_TXEN;\r
 267                 // Wait for current transmit complete\r
 268                 while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_THRE));\r
 269                 // Disable Tx\r
 270                 ((LPC_UART1_Type *)UARTx)->TER = 0;\r
 271 \r
 272                 // Disable interrupt\r
 273                 ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER = 0;\r
 274                 // Set LCR to default state\r
 275                 ((LPC_UART1_Type *)UARTx)->LCR = 0;\r
 276                 // Set ACR to default state\r
 277                 ((LPC_UART1_Type *)UARTx)->ACR = 0;\r
 278                 // Set Modem Control to default state\r
 279                 ((LPC_UART1_Type *)UARTx)->MCR = 0;\r
 280                 // Set RS485 control to default state\r
 281                 ((LPC_UART1_Type *)UARTx)->RS485CTRL = 0;\r
 282                 // Set RS485 delay timer to default state\r
 283                 ((LPC_UART1_Type *)UARTx)->RS485DLY = 0;\r
 284                 // Set RS485 addr match to default state\r
 285                 ((LPC_UART1_Type *)UARTx)->RS485ADRMATCH = 0;\r
 286                 //Dummy Reading to Clear Status\r
 287                 tmp = ((LPC_UART1_Type *)UARTx)->MSR;\r
 288                 tmp = ((LPC_UART1_Type *)UARTx)->LSR;\r
 289         }\r
 290         else\r
 291         {\r
 292                 /* FIFOs are empty */\r
 293                 UARTx->/*IIFCR.*/FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);\r
 294                 // Disable FIFO\r
 295                 UARTx->/*IIFCR.*/FCR = 0;\r
 296 \r
 297                 // Dummy reading\r
 298                 while (UARTx->LSR & UART_LSR_RDR)\r
 299                 {\r
 300                         tmp = UARTx->/*RBTHDLR.*/RBR;\r
 301                 }\r
 302 \r
 303                 UARTx->TER = UART0_2_3_TER_TXEN;\r
 304                 // Wait for current transmit complete\r
 305                 while (!(UARTx->LSR & UART_LSR_THRE));\r
 306                 // Disable Tx\r
 307                 UARTx->TER = 0;\r
 308 \r
 309                 // Disable interrupt\r
 310                 UARTx->/*DLIER.*/IER = 0;\r
 311                 // Set LCR to default state\r
 312                 UARTx->LCR = 0;\r
 313                 // Set ACR to default state\r
 314                 UARTx->ACR = 0;\r
 315                 // set HDEN to default state\r
 316                 UARTx->HDEN = 0;\r
 317                 // set SCICTRL to default state\r
 318                 UARTx->SCICTRL = 0;\r
 319                 // set SYNCCTRL to default state\r
 320                 UARTx->SYNCCTRL =0;\r
 321                 // Set RS485 control to default state\r
 322                 UARTx->RS485CTRL = 0;\r
 323                 // Set RS485 delay timer to default state\r
 324                 UARTx->RS485DLY = 0;\r
 325                 // Set RS485 addr match to default state\r
 326                 UARTx->RS485ADRMATCH = 0;\r
 327                 // Dummy reading\r
 328                 tmp = UARTx->LSR;\r
 329         }\r
 330 \r
 331         if (UARTx == LPC_USART3)\r
 332         {\r
 333                 // Set IrDA to default state\r
 334                 UARTx->ICR = 0;\r
 335         }\r
 336 \r
 337         // Set Line Control register ----------------------------\r
 338 \r
 339         uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));\r
 340 \r
 341         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 342         {\r
 343                 tmp = (((LPC_UART1_Type *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \\r
 344                                 & UART_LCR_BITMASK;\r
 345         }\r
 346         else\r
 347         {\r
 348                 tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;\r
 349         }\r
 350 \r
 351         switch (UART_ConfigStruct->Databits){\r
 352         case UART_DATABIT_5:\r
 353                 tmp |= UART_LCR_WLEN5;\r
 354                 break;\r
 355         case UART_DATABIT_6:\r
 356                 tmp |= UART_LCR_WLEN6;\r
 357                 break;\r
 358         case UART_DATABIT_7:\r
 359                 tmp |= UART_LCR_WLEN7;\r
 360                 break;\r
 361         case UART_DATABIT_8:\r
 362         default:\r
 363                 tmp |= UART_LCR_WLEN8;\r
 364                 break;\r
 365         }\r
 366 \r
 367         if (UART_ConfigStruct->Parity == UART_PARITY_NONE)\r
 368         {\r
 369                 // Do nothing...\r
 370         }\r
 371         else\r
 372         {\r
 373                 tmp |= UART_LCR_PARITY_EN;\r
 374                 switch (UART_ConfigStruct->Parity)\r
 375                 {\r
 376                 case UART_PARITY_ODD:\r
 377                         tmp |= UART_LCR_PARITY_ODD;\r
 378                         break;\r
 379 \r
 380                 case UART_PARITY_EVEN:\r
 381                         tmp |= UART_LCR_PARITY_EVEN;\r
 382                         break;\r
 383 \r
 384                 case UART_PARITY_SP_1:\r
 385                         tmp |= UART_LCR_PARITY_F_1;\r
 386                         break;\r
 387 \r
 388                 case UART_PARITY_SP_0:\r
 389                         tmp |= UART_LCR_PARITY_F_0;\r
 390                         break;\r
 391                 default:\r
 392                         break;\r
 393                 }\r
 394         }\r
 395 \r
 396         switch (UART_ConfigStruct->Stopbits){\r
 397         case UART_STOPBIT_2:\r
 398                 tmp |= UART_LCR_STOPBIT_SEL;\r
 399                 break;\r
 400         case UART_STOPBIT_1:\r
 401         default:\r
 402                 // Do no thing\r
 403                 break;\r
 404         }\r
 405 \r
 406 \r
 407         // Write back to LCR, configure FIFO and Disable Tx\r
 408         if (((LPC_UART1_Type *)UARTx) ==  LPC_UART1)\r
 409         {\r
 410                 ((LPC_UART1_Type *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);\r
 411         }\r
 412         else\r
 413         {\r
 414                 UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);\r
 415         }\r
 416 }\r
 417 \r
 418 /*********************************************************************//**\r
 419  * @brief               De-initializes the UARTx peripheral registers to their\r
 420  *              default reset values.\r
 421  * @param[in]   UARTx   UART peripheral selected, should be:\r
 422  *                                      - LPC_UART0     :UART0 peripheral\r
 423  *                                      - LPC_UART1     :UART1 peripheral\r
 424  *                                      - LPC_UART2     :UART2 peripheral\r
 425  *                                      - LPC_UART3     :UART3 peripheral\r
 426  * @return              None\r
 427  **********************************************************************/\r
 428 void UART_DeInit(LPC_USARTn_Type* UARTx)\r
 429 {\r
 430         // For debug mode\r
 431         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 432 \r
 433         UART_TxCmd(UARTx, DISABLE);\r
 434 \r
 435 #ifdef _UART0\r
 436         if (UARTx == LPC_USART0)\r
 437         {\r
 438                 /* Set up peripheral clock for UART0 module */\r
 439                 //LPC_CGU->BASE_UART0_CLK = (SRC_PL160M_1<<24) | (1<<11);       // base SRC_PL160M_1 is not configured, so no clk out\r
 440         }\r
 441 #endif\r
 442 \r
 443 #ifdef _UART1\r
 444         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 445         {\r
 446                 /* Set up peripheral clock for UART1 module */\r
 447                 //LPC_CGU->BASE_UART1_CLK = (SRC_PL160M_1<<24) | (1<<11);       // base SRC_PL160M_1 is not configured, so no clk out\r
 448         }\r
 449 #endif\r
 450 \r
 451 #ifdef _UART2\r
 452         if (UARTx == LPC_USART2)\r
 453         {\r
 454                 /* Set up peripheral clock for UART2 module */\r
 455                 //LPC_CGU->BASE_UART2_CLK = (SRC_PL160M_1<<24) | (1<<11);       // base SRC_PL160M_1 is not configured, so no clk out\r
 456         }\r
 457 #endif\r
 458 \r
 459 #ifdef _UART3\r
 460         if (UARTx == LPC_USART3)\r
 461         {\r
 462                 /* Set up peripheral clock for UART3 module */\r
 463                 //LPC_CGU->BASE_UART3_CLK = (SRC_PL160M_1<<24) | (1<<11);       // base SRC_PL160M_1 is not configured, so no clk out\r
 464         }\r
 465 #endif\r
 466 }\r
 467 \r
 468 /*****************************************************************************//**\r
 469  * @brief               Fills each UART_InitStruct member with its default value:\r
 470  *                                      - 9600 bps\r
 471  *                                      - 8-bit data\r
 472  *                                      - 1 Stopbit\r
 473  *                                      - None Parity\r
 474  * @param[in]   UART_InitStruct Pointer to a UART_CFG_Type structure which will\r
 475  *                              be initialized.\r
 476  * @return              None\r
 477  *******************************************************************************/\r
 478 void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)\r
 479 {\r
 480         UART_InitStruct->Baud_rate = 9600;\r
 481         UART_InitStruct->Databits = UART_DATABIT_8;\r
 482         UART_InitStruct->Parity = UART_PARITY_NONE;\r
 483         UART_InitStruct->Stopbits = UART_STOPBIT_1;\r
 484 }\r
 485 \r
 486 /* UART Send/Recieve functions -------------------------------------------------*/\r
 487 /*********************************************************************//**\r
 488  * @brief               Transmit a single data through UART peripheral\r
 489  * @param[in]   UARTx   UART peripheral selected, should be:\r
 490  *                                      - LPC_UART0     :UART0 peripheral\r
 491  *                                      - LPC_UART1     :UART1 peripheral\r
 492  *                                      - LPC_UART2     :UART2 peripheral\r
 493  *                                      - LPC_UART3     :UART3 peripheral\r
 494  * @param[in]   Data    Data to transmit (must be 8-bit long)\r
 495  * @return              None\r
 496  **********************************************************************/\r
 497 void UART_SendByte(LPC_USARTn_Type* UARTx, uint8_t Data)\r
 498 {\r
 499         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 500 \r
 501         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 502         {\r
 503                 ((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;\r
 504         }\r
 505         else\r
 506         {\r
 507                 UARTx->/*RBTHDLR.*/THR = Data & UART_THR_MASKBIT;\r
 508         }\r
 509 \r
 510 }\r
 511 \r
 512 \r
 513 /*********************************************************************//**\r
 514  * @brief               Receive a single data from UART peripheral\r
 515  * @param[in]   UARTx   UART peripheral selected, should be:\r
 516  *                                      - LPC_UART0     :UART0 peripheral\r
 517  *                                      - LPC_UART1     :UART1 peripheral\r
 518  *                                      - LPC_UART2     :UART2 peripheral\r
 519  *                                      - LPC_UART3     :UART3 peripheral\r
 520  * @return              Data received\r
 521  **********************************************************************/\r
 522 uint8_t UART_ReceiveByte(LPC_USARTn_Type* UARTx)\r
 523 {\r
 524         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 525 \r
 526         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 527         {\r
 528                 return (((LPC_UART1_Type *)UARTx)->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);\r
 529         }\r
 530         else\r
 531         {\r
 532                 return (UARTx->/*RBTHDLR.*/RBR & UART_RBR_MASKBIT);\r
 533         }\r
 534 }\r
 535 \r
 536 /*********************************************************************//**\r
 537  * @brief               Send a block of data via UART peripheral\r
 538  * @param[in]   UARTx   Selected UART peripheral used to send data, should be:\r
 539  *                                      - LPC_UART0     :UART0 peripheral\r
 540  *                                      - LPC_UART1     :UART1 peripheral\r
 541  *                                      - LPC_UART2     :UART2 peripheral\r
 542  *                                      - LPC_UART3     :UART3 peripheral\r
 543  * @param[in]   txbuf   Pointer to Transmit buffer\r
 544  * @param[in]   buflen  Length of Transmit buffer\r
 545  * @param[in]   flag    Flag used in  UART transfer, should be\r
 546  *                                      - NONE_BLOCKING\r
 547  *                                      - BLOCKING\r
 548  * @return              Number of bytes sent.\r
 549  *\r
 550  * Note: when using UART in BLOCKING mode, a time-out condition is used\r
 551  * via defined symbol UART_BLOCKING_TIMEOUT.\r
 552  **********************************************************************/\r
 553 uint32_t UART_Send(LPC_USARTn_Type *UARTx, uint8_t *txbuf,\r
 554                 uint32_t buflen, TRANSFER_BLOCK_Type flag)\r
 555 {\r
 556         uint32_t bToSend, bSent, timeOut, fifo_cnt;\r
 557         uint8_t *pChar = txbuf;\r
 558 \r
 559         bToSend = buflen;\r
 560 \r
 561         // blocking mode\r
 562         if (flag == BLOCKING) {\r
 563                 bSent = 0;\r
 564                 while (bToSend){\r
 565                         timeOut = UART_BLOCKING_TIMEOUT;\r
 566                         // Wait for THR empty with timeout\r
 567                         while (!(UARTx->LSR & UART_LSR_THRE)) {\r
 568                                 if (timeOut == 0) break;\r
 569                                 timeOut--;\r
 570                         }\r
 571                         // Time out!\r
 572                         if(timeOut == 0) break;\r
 573                         fifo_cnt = UART_TX_FIFO_SIZE;\r
 574                         while (fifo_cnt && bToSend){\r
 575                                 UART_SendByte(UARTx, (*pChar++));\r
 576                                 fifo_cnt--;\r
 577                                 bToSend--;\r
 578                                 bSent++;\r
 579                         }\r
 580                 }\r
 581         }\r
 582         // None blocking mode\r
 583         else {\r
 584                 bSent = 0;\r
 585                 while (bToSend) {\r
 586                         if (!(UARTx->LSR & UART_LSR_THRE)){\r
 587                                 break;\r
 588                         }\r
 589                         fifo_cnt = UART_TX_FIFO_SIZE;\r
 590                         while (fifo_cnt && bToSend) {\r
 591                                 UART_SendByte(UARTx, (*pChar++));\r
 592                                 bToSend--;\r
 593                                 fifo_cnt--;\r
 594                                 bSent++;\r
 595                         }\r
 596                 }\r
 597         }\r
 598         return bSent;\r
 599 }\r
 600 \r
 601 /*********************************************************************//**\r
 602  * @brief               Receive a block of data via UART peripheral\r
 603  * @param[in]   UARTx   Selected UART peripheral used to send data,\r
 604  *                              should be:\r
 605  *                                      - LPC_UART0     :UART0 peripheral\r
 606  *                                      - LPC_UART1     :UART1 peripheral\r
 607  *                                      - LPC_UART2     :UART2 peripheral\r
 608  *                                      - LPC_UART3     :UART3 peripheral\r
 609  * @param[out]  rxbuf   Pointer to Received buffer\r
 610  * @param[in]   buflen  Length of Received buffer\r
 611  * @param[in]   flag    Flag mode, should be:\r
 612  *                                      - NONE_BLOCKING\r
 613  *                                      - BLOCKING\r
 614  * @return              Number of bytes received\r
 615  *\r
 616  * Note: when using UART in BLOCKING mode, a time-out condition is used\r
 617  * via defined symbol UART_BLOCKING_TIMEOUT.\r
 618  **********************************************************************/\r
 619 uint32_t UART_Receive(LPC_USARTn_Type *UARTx, uint8_t *rxbuf, \\r
 620                 uint32_t buflen, TRANSFER_BLOCK_Type flag)\r
 621 {\r
 622         uint32_t bToRecv, bRecv, timeOut;\r
 623         uint8_t *pChar = rxbuf;\r
 624 \r
 625         bToRecv = buflen;\r
 626 \r
 627         // Blocking mode\r
 628         if (flag == BLOCKING) {\r
 629                 bRecv = 0;\r
 630                 while (bToRecv){\r
 631                         timeOut = UART_BLOCKING_TIMEOUT;\r
 632                         while (!(UARTx->LSR & UART_LSR_RDR)){\r
 633                                 if (timeOut == 0) break;\r
 634                                 timeOut--;\r
 635                         }\r
 636                         // Time out!\r
 637                         if(timeOut == 0) break;\r
 638                         // Get data from the buffer\r
 639                         (*pChar++) = UART_ReceiveByte(UARTx);\r
 640                         bToRecv--;\r
 641                         bRecv++;\r
 642                 }\r
 643         }\r
 644         // None blocking mode\r
 645         else {\r
 646                 bRecv = 0;\r
 647                 while (bToRecv) {\r
 648                         if (!(UARTx->LSR & UART_LSR_RDR)) {\r
 649                                 break;\r
 650                         } else {\r
 651                                 (*pChar++) = UART_ReceiveByte(UARTx);\r
 652                                 bRecv++;\r
 653                                 bToRecv--;\r
 654                         }\r
 655                 }\r
 656         }\r
 657         return bRecv;\r
 658 }\r
 659 \r
 660 /*********************************************************************//**\r
 661  * @brief               Force BREAK character on UART line, output pin UARTx TXD is\r
 662                                 forced to logic 0.\r
 663  * @param[in]   UARTx   UART peripheral selected, should be:\r
 664  *                                      - LPC_UART0     :UART0 peripheral\r
 665  *                                      - LPC_UART1     :UART1 peripheral\r
 666  *                                      - LPC_UART2     :UART2 peripheral\r
 667  *                                      - LPC_UART3     :UART3 peripheral\r
 668  * @return              None\r
 669  **********************************************************************/\r
 670 void UART_ForceBreak(LPC_USARTn_Type* UARTx)\r
 671 {\r
 672         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 673 \r
 674         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 675         {\r
 676                 ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_BREAK_EN;\r
 677         }\r
 678         else\r
 679         {\r
 680                 UARTx->LCR |= UART_LCR_BREAK_EN;\r
 681         }\r
 682 }\r
 683 \r
 684 \r
 685 /********************************************************************//**\r
 686  * @brief               Enable or disable specified UART interrupt.\r
 687  * @param[in]   UARTx   UART peripheral selected, should be\r
 688  *                                      - LPC_UART0     :UART0 peripheral\r
 689  *                                      - LPC_UART1     :UART1 peripheral\r
 690  *                                      - LPC_UART2     :UART2 peripheral\r
 691  *                                      - LPC_UART3     :UART3 peripheral\r
 692  * @param[in]   UARTIntCfg      Specifies the interrupt flag,\r
 693  *                              should be one of the following:\r
 694  *                                      - UART_INTCFG_RBR       :RBR Interrupt enable\r
 695  *                                      - UART_INTCFG_THRE      :THR Interrupt enable\r
 696  *                                      - UART_INTCFG_RLS       :RX line status interrupt enable\r
 697  *                                      - UART1_INTCFG_MS       :Modem status interrupt enable (UART1 only)\r
 698  *                                      - UART1_INTCFG_CTS      :CTS1 signal transition interrupt enable (UART1 only)\r
 699  *                                      - UART_INTCFG_ABEO      :Enables the end of auto-baud interrupt\r
 700  *                                      - UART_INTCFG_ABTO      :Enables the auto-baud time-out interrupt\r
 701  * @param[in]   NewState New state of specified UART interrupt type,\r
 702  *                              should be:\r
 703  *                                      - ENALBE        :Enable this UART interrupt type.\r
 704  *                                      - DISALBE       :Disable this UART interrupt type.\r
 705  * @return              None\r
 706  *********************************************************************/\r
 707 void UART_IntConfig(LPC_USARTn_Type *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)\r
 708 {\r
 709         uint32_t tmp;\r
 710 \r
 711         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 712         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 713 \r
 714         switch(UARTIntCfg){\r
 715                 case UART_INTCFG_RBR:\r
 716                         tmp = UART_IER_RBRINT_EN;\r
 717                         break;\r
 718                 case UART_INTCFG_THRE:\r
 719                         tmp = UART_IER_THREINT_EN;\r
 720                         break;\r
 721                 case UART_INTCFG_RLS:\r
 722                         tmp = UART_IER_RLSINT_EN;\r
 723                         break;\r
 724                 case UART1_INTCFG_MS:\r
 725                         tmp = UART1_IER_MSINT_EN;\r
 726                         break;\r
 727                 case UART1_INTCFG_CTS:\r
 728                         tmp = UART1_IER_CTSINT_EN;\r
 729                         break;\r
 730                 case UART_INTCFG_ABEO:\r
 731                         tmp = UART_IER_ABEOINT_EN;\r
 732                         break;\r
 733                 case UART_INTCFG_ABTO:\r
 734                         tmp = UART_IER_ABTOINT_EN;\r
 735                         break;\r
 736         }\r
 737 \r
 738         if ((LPC_UART1_Type *) UARTx == LPC_UART1)\r
 739         {\r
 740                 CHECK_PARAM((PARAM_UART_INTCFG(UARTIntCfg)) || (PARAM_UART1_INTCFG(UARTIntCfg)));\r
 741         }\r
 742         else\r
 743         {\r
 744                 CHECK_PARAM(PARAM_UART_INTCFG(UARTIntCfg));\r
 745         }\r
 746 \r
 747         if (NewState == ENABLE)\r
 748         {\r
 749                 if ((LPC_UART1_Type *) UARTx == LPC_UART1)\r
 750                 {\r
 751                         ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER |= tmp;\r
 752                 }\r
 753                 else\r
 754                 {\r
 755                         UARTx->/*DLIER.*/IER |= tmp;\r
 756                 }\r
 757         }\r
 758         else\r
 759         {\r
 760                 if ((LPC_UART1_Type *) UARTx == LPC_UART1)\r
 761                 {\r
 762                         ((LPC_UART1_Type *)UARTx)->/*DLIER.*/IER &= (~tmp) & UART1_IER_BITMASK;\r
 763                 }\r
 764                 else\r
 765                 {\r
 766                         UARTx->/*DLIER.*/IER &= (~tmp) & UART_IER_BITMASK;\r
 767                 }\r
 768         }\r
 769 }\r
 770 \r
 771 \r
 772 /********************************************************************//**\r
 773  * @brief               Get current value of Line Status register in UART peripheral.\r
 774  * @param[in]   UARTx   UART peripheral selected, should be:\r
 775  *                                      - LPC_UART0     :UART0 peripheral\r
 776  *                                      - LPC_UART1     :UART1 peripheral\r
 777  *                                      - LPC_UART2     :UART2 peripheral\r
 778  *                                      - LPC_UART3     :UART3 peripheral\r
 779  * @return              Current value of Line Status register in UART peripheral.\r
 780  * Note:        The return value of this function must be ANDed with each member in\r
 781  *                      UART_LS_Type enumeration to determine current flag status\r
 782  *                      corresponding to each Line status type. Because some flags in\r
 783  *                      Line Status register will be cleared after reading, the next reading\r
 784  *                      Line Status register could not be correct. So this function used to\r
 785  *                      read Line status register in one time only, then the return value\r
 786  *                      used to check all flags.\r
 787  *********************************************************************/\r
 788 uint8_t UART_GetLineStatus(LPC_USARTn_Type* UARTx)\r
 789 {\r
 790         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 791 \r
 792         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 793         {\r
 794                 return ((((LPC_UART1_Type *)LPC_UART1)->LSR) & UART_LSR_BITMASK);\r
 795         }\r
 796         else\r
 797         {\r
 798                 return ((UARTx->LSR) & UART_LSR_BITMASK);\r
 799         }\r
 800 }\r
 801 \r
 802 /*********************************************************************//**\r
 803  * @brief               Check whether if UART is busy or not\r
 804  * @param[in]   UARTx   UART peripheral selected, should be:\r
 805  *                                      - LPC_UART0     :UART0 peripheral\r
 806  *                                      - LPC_UART1     :UART1 peripheral\r
 807  *                                      - LPC_UART2     :UART2 peripheral\r
 808  *                                      - LPC_UART3     :UART3 peripheral\r
 809  * @return              RESET if UART is not busy, otherwise return SET.\r
 810  **********************************************************************/\r
 811 FlagStatus UART_CheckBusy(LPC_USARTn_Type *UARTx)\r
 812 {\r
 813         if (UARTx->LSR & UART_LSR_TEMT){\r
 814                 return RESET;\r
 815         } else {\r
 816                 return SET;\r
 817         }\r
 818 }\r
 819 \r
 820 \r
 821 /*********************************************************************//**\r
 822  * @brief               Configure FIFO function on selected UART peripheral\r
 823  * @param[in]   UARTx   UART peripheral selected, should be:\r
 824  *                                      - LPC_UART0     :UART0 peripheral\r
 825  *                                      - LPC_UART1     :UART1 peripheral\r
 826  *                                      - LPC_UART2     :UART2 peripheral\r
 827  *                                      - LPC_UART3     :UART3 peripheral\r
 828  * @param[in]   FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that\r
 829  *                                              contains specified information about FIFO configuration\r
 830  * @return              none\r
 831  **********************************************************************/\r
 832 void UART_FIFOConfig(LPC_USARTn_Type *UARTx, UART_FIFO_CFG_Type *FIFOCfg)\r
 833 {\r
 834         uint8_t tmp = 0;\r
 835 \r
 836         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 837         CHECK_PARAM(PARAM_UART_FIFO_LEVEL(FIFOCfg->FIFO_Level));\r
 838         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_DMAMode));\r
 839         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetRxBuf));\r
 840         CHECK_PARAM(PARAM_FUNCTIONALSTATE(FIFOCfg->FIFO_ResetTxBuf));\r
 841 \r
 842         tmp |= UART_FCR_FIFO_EN;\r
 843         switch (FIFOCfg->FIFO_Level){\r
 844         case UART_FIFO_TRGLEV0:\r
 845                 tmp |= UART_FCR_TRG_LEV0;\r
 846                 break;\r
 847         case UART_FIFO_TRGLEV1:\r
 848                 tmp |= UART_FCR_TRG_LEV1;\r
 849                 break;\r
 850         case UART_FIFO_TRGLEV2:\r
 851                 tmp |= UART_FCR_TRG_LEV2;\r
 852                 break;\r
 853         case UART_FIFO_TRGLEV3:\r
 854         default:\r
 855                 tmp |= UART_FCR_TRG_LEV3;\r
 856                 break;\r
 857         }\r
 858 \r
 859         if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)\r
 860         {\r
 861                 tmp |= UART_FCR_TX_RS;\r
 862         }\r
 863         if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)\r
 864         {\r
 865                 tmp |= UART_FCR_RX_RS;\r
 866         }\r
 867         if (FIFOCfg->FIFO_DMAMode == ENABLE)\r
 868         {\r
 869                 tmp |= UART_FCR_DMAMODE_SEL;\r
 870         }\r
 871 \r
 872 \r
 873         //write to FIFO control register\r
 874         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 875         {\r
 876                 ((LPC_UART1_Type *)UARTx)->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;\r
 877         }\r
 878         else\r
 879         {\r
 880                 UARTx->/*IIFCR.*/FCR = tmp & UART_FCR_BITMASK;\r
 881         }\r
 882 }\r
 883 \r
 884 /*****************************************************************************//**\r
 885  * @brief               Fills each UART_FIFOInitStruct member with its default value:\r
 886  *                                      - FIFO_DMAMode = DISABLE\r
 887  *                                      - FIFO_Level = UART_FIFO_TRGLEV0\r
 888  *                                      - FIFO_ResetRxBuf = ENABLE\r
 889  *                                      - FIFO_ResetTxBuf = ENABLE\r
 890  *                                      - FIFO_State = ENABLE\r
 891  *\r
 892  * @param[in]   UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure\r
 893  *                    which will be initialized.\r
 894  * @return              None\r
 895  *******************************************************************************/\r
 896 void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)\r
 897 {\r
 898         UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;\r
 899         UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;\r
 900         UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;\r
 901         UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;\r
 902 }\r
 903 \r
 904 \r
 905 /*********************************************************************//**\r
 906  * @brief               Start/Stop Auto Baudrate activity\r
 907  * @param[in]   UARTx   UART peripheral selected, should be\r
 908  *                                      - LPC_UART0     :UART0 peripheral\r
 909  *                                      - LPC_UART1     :UART1 peripheral\r
 910  *                                      - LPC_UART2     :UART2 peripheral\r
 911  *                                      - LPC_UART3     :UART3 peripheral\r
 912  * @param[in]   ABConfigStruct  A pointer to UART_AB_CFG_Type structure that\r
 913  *                              contains specified information about UART auto baudrate configuration\r
 914  * @param[in]   NewState New State of Auto baudrate activity, should be:\r
 915  *                                      - ENABLE        :Start this activity\r
 916  *                                      - DISABLE       :Stop this activity\r
 917  * Note:                Auto-baudrate mode enable bit will be cleared once this mode\r
 918  *                              completed.\r
 919  * @return              none\r
 920  **********************************************************************/\r
 921 void UART_ABCmd(LPC_USARTn_Type *UARTx, UART_AB_CFG_Type *ABConfigStruct, \\r
 922                                 FunctionalState NewState)\r
 923 {\r
 924         uint32_t tmp;\r
 925 \r
 926         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 927         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 928 \r
 929         tmp = 0;\r
 930         if (NewState == ENABLE) {\r
 931                 if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1){\r
 932                         tmp |= UART_ACR_MODE;\r
 933                 }\r
 934                 if (ABConfigStruct->AutoRestart == ENABLE){\r
 935                         tmp |= UART_ACR_AUTO_RESTART;\r
 936                 }\r
 937         }\r
 938 \r
 939         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 940         {\r
 941                 if (NewState == ENABLE)\r
 942                 {\r
 943                         // Clear DLL and DLM value\r
 944                         ((LPC_UART1_Type *)UARTx)->LCR |= UART_LCR_DLAB_EN;\r
 945                         ((LPC_UART1_Type *)UARTx)->DLL = 0;\r
 946                         ((LPC_UART1_Type *)UARTx)->DLM = 0;\r
 947                         ((LPC_UART1_Type *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;\r
 948                         // FDR value must be reset to default value\r
 949                         ((LPC_UART1_Type *)UARTx)->FDR = 0x10;\r
 950                         ((LPC_UART1_Type *)UARTx)->ACR = UART_ACR_START | tmp;\r
 951                 }\r
 952                 else\r
 953                 {\r
 954                         ((LPC_UART1_Type *)UARTx)->ACR = 0;\r
 955                 }\r
 956         }\r
 957         else\r
 958         {\r
 959                 if (NewState == ENABLE)\r
 960                 {\r
 961                         // Clear DLL and DLM value\r
 962                         UARTx->LCR |= UART_LCR_DLAB_EN;\r
 963                         UARTx->DLL = 0;\r
 964                         UARTx->DLM = 0;\r
 965                         UARTx->LCR &= ~UART_LCR_DLAB_EN;\r
 966                         // FDR value must be reset to default value\r
 967                         UARTx->FDR = 0x10;\r
 968                         UARTx->ACR = UART_ACR_START | tmp;\r
 969                 }\r
 970                 else\r
 971                 {\r
 972                         UARTx->ACR = 0;\r
 973                 }\r
 974         }\r
 975 }\r
 976 \r
 977 \r
 978 /*********************************************************************//**\r
 979  * @brief               Enable/Disable transmission on UART TxD pin\r
 980  * @param[in]   UARTx   UART peripheral selected, should be:\r
 981  *                                      - LPC_UART0     :UART0 peripheral\r
 982  *                                      - LPC_UART1     :UART1 peripheral\r
 983  *                                      - LPC_UART2     :UART2 peripheral\r
 984  *                                      - LPC_UART3     :UART3 peripheral\r
 985  * @param[in]   NewState New State of Tx transmission function, should be:\r
 986  *                                      - ENABLE        :Enable this function\r
 987                                         - DISABLE       :Disable this function\r
 988  * @return none\r
 989  **********************************************************************/\r
 990 void UART_TxCmd(LPC_USARTn_Type *UARTx, FunctionalState NewState)\r
 991 {\r
 992         CHECK_PARAM(PARAM_UARTx(UARTx));\r
 993         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
 994 \r
 995         if (NewState == ENABLE)\r
 996         {\r
 997                 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
 998                 {\r
 999                         ((LPC_UART1_Type *)UARTx)->TER |= UART1_TER_TXEN;\r
1000                 }\r
1001                 else\r
1002                 {\r
1003                         UARTx->TER |= UART0_2_3_TER_TXEN;\r
1004                 }\r
1005         }\r
1006         else\r
1007         {\r
1008                 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1009                 {\r
1010                         ((LPC_UART1_Type *)UARTx)->TER &= (~UART1_TER_TXEN) & UART1_TER_BITMASK;\r
1011                 }\r
1012                 else\r
1013                 {\r
1014                         UARTx->TER &= (~UART0_2_3_TER_TXEN) & UART0_2_3_TER_BITMASK;\r
1015                 }\r
1016         }\r
1017 }\r
1018 \r
1019 /* UART IrDA functions ---------------------------------------------------*/\r
1020 \r
1021 #ifdef _UART3\r
1022 \r
1023 /*********************************************************************//**\r
1024  * @brief               Enable or disable inverting serial input function of IrDA\r
1025  *                              on UART peripheral.\r
1026  * @param[in]   UARTx UART peripheral selected, should be LPC_UART3 (only)\r
1027  * @param[in]   NewState New state of inverting serial input, should be:\r
1028  *                                      - ENABLE        :Enable this function.\r
1029  *                                      - DISABLE       :Disable this function.\r
1030  * @return none\r
1031  **********************************************************************/\r
1032 void UART_IrDAInvtInputCmd(LPC_USARTn_Type* UARTx, FunctionalState NewState)\r
1033 {\r
1034         CHECK_PARAM(PARAM_UART_IrDA(UARTx));\r
1035         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
1036 \r
1037         if (NewState == ENABLE)\r
1038         {\r
1039                 UARTx->ICR |= UART_ICR_IRDAINV;\r
1040         }\r
1041         else if (NewState == DISABLE)\r
1042         {\r
1043                 UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;\r
1044         }\r
1045 }\r
1046 \r
1047 \r
1048 /*********************************************************************//**\r
1049  * @brief               Enable or disable IrDA function on UART peripheral.\r
1050  * @param[in]   UARTx UART peripheral selected, should be LPC_UART3 (only)\r
1051  * @param[in]   NewState New state of IrDA function, should be:\r
1052  *                                      - ENABLE        :Enable this function.\r
1053  *                                      - DISABLE       :Disable this function.\r
1054  * @return none\r
1055  **********************************************************************/\r
1056 void UART_IrDACmd(LPC_USARTn_Type* UARTx, FunctionalState NewState)\r
1057 {\r
1058         CHECK_PARAM(PARAM_UART_IrDA(UARTx));\r
1059         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
1060 \r
1061         if (NewState == ENABLE)\r
1062         {\r
1063                 UARTx->ICR |= UART_ICR_IRDAEN;\r
1064         }\r
1065         else\r
1066         {\r
1067                 UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;\r
1068         }\r
1069 }\r
1070 \r
1071 \r
1072 /*********************************************************************//**\r
1073  * @brief               Configure Pulse divider for IrDA function on UART peripheral.\r
1074  * @param[in]   UARTx UART peripheral selected, should be LPC_UART3 (only)\r
1075  * @param[in]   PulseDiv Pulse Divider value from Peripheral clock,\r
1076  *                              should be one of the following:\r
1077  *                                      - UART_IrDA_PULSEDIV2   :Pulse width = 2 * Tpclk\r
1078  *                                      - UART_IrDA_PULSEDIV4   :Pulse width = 4 * Tpclk\r
1079  *                                      - UART_IrDA_PULSEDIV8   :Pulse width = 8 * Tpclk\r
1080  *                                      - UART_IrDA_PULSEDIV16  :Pulse width = 16 * Tpclk\r
1081  *                                      - UART_IrDA_PULSEDIV32  :Pulse width = 32 * Tpclk\r
1082  *                                      - UART_IrDA_PULSEDIV64  :Pulse width = 64 * Tpclk\r
1083  *                                      - UART_IrDA_PULSEDIV128 :Pulse width = 128 * Tpclk\r
1084  *                                      - UART_IrDA_PULSEDIV256 :Pulse width = 256 * Tpclk\r
1085  * @return              None\r
1086  **********************************************************************/\r
1087 void UART_IrDAPulseDivConfig(LPC_USARTn_Type *UARTx, UART_IrDA_PULSE_Type PulseDiv)\r
1088 {\r
1089         uint32_t tmp, tmp1;\r
1090         CHECK_PARAM(PARAM_UART_IrDA(UARTx));\r
1091         CHECK_PARAM(PARAM_UART_IrDA_PULSEDIV(PulseDiv));\r
1092 \r
1093         tmp1 = UART_ICR_PULSEDIV(PulseDiv);\r
1094         tmp = UARTx->ICR & (~UART_ICR_PULSEDIV(7));\r
1095         tmp |= tmp1 | UART_ICR_FIXPULSE_EN;\r
1096         UARTx->ICR = tmp & UART_ICR_BITMASK;\r
1097 }\r
1098 \r
1099 #endif\r
1100 \r
1101 \r
1102 /* UART1 FullModem function ---------------------------------------------*/\r
1103 \r
1104 #ifdef _UART1\r
1105 \r
1106 /*********************************************************************//**\r
1107  * @brief               Force pin DTR/RTS corresponding to given state (Full modem mode)\r
1108  * @param[in]   UARTx   LPC_UART1 (only)\r
1109  * @param[in]   Pin     Pin that NewState will be applied to, should be:\r
1110  *                                      - UART1_MODEM_PIN_DTR   :DTR pin.\r
1111  *                                      - UART1_MODEM_PIN_RTS   :RTS pin.\r
1112  * @param[in]   NewState New State of DTR/RTS pin, should be:\r
1113  *                                      - INACTIVE      :Force the pin to inactive signal.\r
1114                                         - ACTIVE        :Force the pin to active signal.\r
1115  * @return none\r
1116  **********************************************************************/\r
1117 void UART_FullModemForcePinState(LPC_UART1_Type *UARTx, UART_MODEM_PIN_Type Pin, \\r
1118                                                         UART1_SignalState NewState)\r
1119 {\r
1120         uint8_t tmp = 0;\r
1121 \r
1122         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));\r
1123         CHECK_PARAM(PARAM_UART1_MODEM_PIN(Pin));\r
1124         CHECK_PARAM(PARAM_UART1_SIGNALSTATE(NewState));\r
1125 \r
1126         switch (Pin){\r
1127         case UART1_MODEM_PIN_DTR:\r
1128                 tmp = UART1_MCR_DTR_CTRL;\r
1129                 break;\r
1130         case UART1_MODEM_PIN_RTS:\r
1131                 tmp = UART1_MCR_RTS_CTRL;\r
1132                 break;\r
1133         default:\r
1134                 break;\r
1135         }\r
1136 \r
1137         if (NewState == ACTIVE){\r
1138                 UARTx->MCR |= tmp;\r
1139         } else {\r
1140                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;\r
1141         }\r
1142 }\r
1143 \r
1144 \r
1145 /*********************************************************************//**\r
1146  * @brief               Configure Full Modem mode for UART peripheral\r
1147  * @param[in]   UARTx   LPC_UART1 (only)\r
1148  * @param[in]   Mode Full Modem mode, should be:\r
1149  *                                      - UART1_MODEM_MODE_LOOPBACK     :Loop back mode.\r
1150  *                                      - UART1_MODEM_MODE_AUTO_RTS     :Auto-RTS mode.\r
1151  *                                      - UART1_MODEM_MODE_AUTO_CTS     :Auto-CTS mode.\r
1152  * @param[in]   NewState New State of this mode, should be:\r
1153  *                                      - ENABLE        :Enable this mode.\r
1154                                         - DISABLE       :Disable this mode.\r
1155  * @return none\r
1156  **********************************************************************/\r
1157 void UART_FullModemConfigMode(LPC_UART1_Type *UARTx, UART_MODEM_MODE_Type Mode, \\r
1158                                                         FunctionalState NewState)\r
1159 {\r
1160         uint8_t tmp;\r
1161 \r
1162         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));\r
1163         CHECK_PARAM(PARAM_UART1_MODEM_MODE(Mode));\r
1164         CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));\r
1165 \r
1166         switch(Mode){\r
1167         case UART1_MODEM_MODE_LOOPBACK:\r
1168                 tmp = UART1_MCR_LOOPB_EN;\r
1169                 break;\r
1170         case UART1_MODEM_MODE_AUTO_RTS:\r
1171                 tmp = UART1_MCR_AUTO_RTS_EN;\r
1172                 break;\r
1173         case UART1_MODEM_MODE_AUTO_CTS:\r
1174                 tmp = UART1_MCR_AUTO_CTS_EN;\r
1175                 break;\r
1176         default:\r
1177                 break;\r
1178         }\r
1179 \r
1180         if (NewState == ENABLE)\r
1181         {\r
1182                 UARTx->MCR |= tmp;\r
1183         }\r
1184         else\r
1185         {\r
1186                 UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;\r
1187         }\r
1188 }\r
1189 \r
1190 \r
1191 /*********************************************************************//**\r
1192  * @brief               Get current status of modem status register\r
1193  * @param[in]   UARTx   LPC_UART1 (only)\r
1194  * @return              Current value of modem status register\r
1195  * Note:        The return value of this function must be ANDed with each member\r
1196  *                      UART_MODEM_STAT_type enumeration to determine current flag status\r
1197  *                      corresponding to each modem flag status. Because some flags in\r
1198  *                      modem status register will be cleared after reading, the next reading\r
1199  *                      modem register could not be correct. So this function used to\r
1200  *                      read modem status register in one time only, then the return value\r
1201  *                      used to check all flags.\r
1202  **********************************************************************/\r
1203 uint8_t UART_FullModemGetStatus(LPC_UART1_Type *UARTx)\r
1204 {\r
1205         CHECK_PARAM(PARAM_UART1_MODEM(UARTx));\r
1206         return ((UARTx->MSR) & UART1_MSR_BITMASK);\r
1207 }\r
1208 \r
1209 #endif /* _UART1 */\r
1210 /* UART RS485 functions --------------------------------------------------------------*/\r
1211 \r
1212 /*********************************************************************//**\r
1213 * @brief                Configure UART peripheral in RS485 mode according to the specified\r
1214  *               parameters in the RS485ConfigStruct.\r
1215  * @param[in]   UARTx   UART peripheral selected, should be:\r
1216  *                                      - LPC_UART0     :UART0 peripheral\r
1217  *                                      - LPC_UART1     :UART1 peripheral\r
1218  *                                      - LPC_UART2     :UART2 peripheral\r
1219  *                                      - LPC_UART3     :UART3 peripheral\r
1220  * @param[in]   RS485ConfigStruct Pointer to a UART_RS485_CTRLCFG_Type structure\r
1221  *              that contains the configuration information for specified UART\r
1222  *              in RS485 mode.\r
1223  * @return              None\r
1224  **********************************************************************/\r
1225 void UART_RS485Config(LPC_USARTn_Type *UARTx, UART_RS485_CTRLCFG_Type *RS485ConfigStruct)\r
1226 {\r
1227         uint32_t tmp;\r
1228 \r
1229         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoAddrDetect_State));\r
1230         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->AutoDirCtrl_State));\r
1231         CHECK_PARAM(PARAM_UART_RS485_CFG_DELAYVALUE(RS485ConfigStruct->DelayValue));\r
1232         CHECK_PARAM(PARAM_SETSTATE(RS485ConfigStruct->DirCtrlPol_Level));\r
1233         CHECK_PARAM(PARAM_UART_RS485_DIRCTRL_PIN(RS485ConfigStruct->DirCtrlPin));\r
1234         CHECK_PARAM(PARAM_UART_RS485_CFG_MATCHADDRVALUE(RS485ConfigStruct->MatchAddrValue));\r
1235         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->NormalMultiDropMode_State));\r
1236         CHECK_PARAM(PARAM_FUNCTIONALSTATE(RS485ConfigStruct->Rx_State));\r
1237 \r
1238         tmp = 0;\r
1239         // If Auto Direction Control is enabled -  This function is used in Master mode\r
1240         if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)\r
1241         {\r
1242                 tmp |= UART_RS485CTRL_DCTRL_EN;\r
1243 \r
1244                 // Set polar\r
1245                 if (RS485ConfigStruct->DirCtrlPol_Level == SET)\r
1246                 {\r
1247                         tmp |= UART_RS485CTRL_OINV_1;\r
1248                 }\r
1249 \r
1250                 // Set pin according to\r
1251                 if (RS485ConfigStruct->DirCtrlPin == UART_RS485_DIRCTRL_DTR)\r
1252                 {\r
1253                         tmp |= UART_RS485CTRL_SEL_DTR;\r
1254                 }\r
1255 \r
1256                 // Fill delay time\r
1257                 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1258                 {\r
1259                         ((LPC_UART1_Type *)UARTx)->RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK;\r
1260                 }\r
1261                 else\r
1262                 {\r
1263                         UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART_RS485DLY_BITMASK;\r
1264                 }\r
1265         }\r
1266 \r
1267         // MultiDrop mode is enable\r
1268         if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)\r
1269         {\r
1270                 tmp |= UART_RS485CTRL_NMM_EN;\r
1271         }\r
1272 \r
1273         // Auto Address Detect function\r
1274         if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)\r
1275         {\r
1276                 tmp |= UART_RS485CTRL_AADEN;\r
1277                 // Fill Match Address\r
1278                 if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1279                 {\r
1280                         ((LPC_UART1_Type *)UARTx)->RS485ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK;\r
1281                 }\r
1282                 else\r
1283                 {\r
1284                         UARTx->RS485ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART_RS485ADRMATCH_BITMASK;\r
1285                 }\r
1286         }\r
1287 \r
1288 \r
1289         // Receiver is disable\r
1290         if (RS485ConfigStruct->Rx_State == DISABLE)\r
1291         {\r
1292                 tmp |= UART_RS485CTRL_RX_DIS;\r
1293         }\r
1294 \r
1295         // write back to RS485 control register\r
1296         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1297         {\r
1298                 ((LPC_UART1_Type *)UARTx)->RS485CTRL = tmp & UART_RS485CTRL_BITMASK;\r
1299         }\r
1300         else\r
1301         {\r
1302                 UARTx->RS485CTRL = tmp & UART_RS485CTRL_BITMASK;\r
1303         }\r
1304 \r
1305         // Enable Parity function and leave parity in stick '0' parity as default\r
1306         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1307         {\r
1308                 ((LPC_UART1_Type *)UARTx)->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);\r
1309         }\r
1310         else\r
1311         {\r
1312                 UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);\r
1313         }\r
1314 }\r
1315 \r
1316 /*********************************************************************//**\r
1317  * @brief               Enable/Disable receiver in RS485 module in UART\r
1318  * @param[in]   UARTx   UART peripheral selected, should be:\r
1319  *                                      - LPC_UART0     :UART0 peripheral\r
1320  *                                      - LPC_UART1     :UART1 peripheral\r
1321  *                                      - LPC_UART2     :UART2 peripheral\r
1322  *                                      - LPC_UART3     :UART3 peripheral\r
1323  * @param[in]   NewState        New State of command, should be:\r
1324  *                                      - ENABLE        :Enable this function.\r
1325  *                                      - DISABLE       :Disable this function.\r
1326  * @return              None\r
1327  **********************************************************************/\r
1328 void UART_RS485ReceiverCmd(LPC_USARTn_Type *UARTx, FunctionalState NewState)\r
1329 {\r
1330         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1331         {\r
1332                 if (NewState == ENABLE){\r
1333                         ((LPC_UART1_Type *)UARTx)->RS485CTRL &= ~UART_RS485CTRL_RX_DIS;\r
1334                 } else {\r
1335                         ((LPC_UART1_Type *)UARTx)->RS485CTRL |= UART_RS485CTRL_RX_DIS;\r
1336                 }\r
1337         }\r
1338         else\r
1339         {\r
1340                 if (NewState == ENABLE){\r
1341                         UARTx->RS485CTRL &= ~UART_RS485CTRL_RX_DIS;\r
1342                 } else {\r
1343                         UARTx->RS485CTRL |= UART_RS485CTRL_RX_DIS;\r
1344                 }\r
1345         }\r
1346 }\r
1347 \r
1348 /*********************************************************************//**\r
1349  * @brief               Send data on RS485 bus with specified parity stick value (9-bit mode).\r
1350  * @param[in]   UARTx   UART peripheral selected, should be:\r
1351  *                                      - LPC_UART0     :UART0 peripheral\r
1352  *                                      - LPC_UART1     :UART1 peripheral\r
1353  *                                      - LPC_UART2     :UART2 peripheral\r
1354  *                                      - LPC_UART3     :UART3 peripheral\r
1355  * @param[in]   pDatFrm         Pointer to data frame.\r
1356  * @param[in]   size            Size of data.\r
1357  * @param[in]   ParityStick     Parity Stick value, should be 0 or 1.\r
1358  * @return              None\r
1359  **********************************************************************/\r
1360 uint32_t UART_RS485Send(LPC_USARTn_Type *UARTx, uint8_t *pDatFrm, \\r
1361                                         uint32_t size, uint8_t ParityStick)\r
1362 {\r
1363         uint8_t tmp, save;\r
1364         uint32_t cnt;\r
1365         if (((LPC_UART1_Type *)UARTx) == LPC_UART1)\r
1366         {\r
1367                 if (ParityStick){\r
1368                         save = tmp = ((LPC_UART1_Type *)UARTx)->LCR & UART_LCR_BITMASK;\r
1369                         tmp &= ~(UART_LCR_PARITY_EVEN);\r
1370                         ((LPC_UART1_Type *)UARTx)->LCR = tmp;\r
1371                         cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);\r
1372                         while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_TEMT));\r
1373                         ((LPC_UART1_Type *)UARTx)->LCR = save;\r
1374                 } else {\r
1375                         cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);\r
1376                         while (!(((LPC_UART1_Type *)UARTx)->LSR & UART_LSR_TEMT));\r
1377                 }\r
1378         }\r
1379         else\r
1380         {\r
1381                 if (ParityStick){\r
1382                         save = tmp = UARTx->LCR & UART_LCR_BITMASK;\r
1383                         tmp &= ~(UART_LCR_PARITY_EVEN);\r
1384                         UARTx->LCR = tmp;\r
1385                         cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);\r
1386                         while (!(UARTx->LSR & UART_LSR_TEMT));\r
1387                         UARTx->LCR = save;\r
1388                 } else {\r
1389                         cnt = UART_Send((LPC_USARTn_Type *)UARTx, pDatFrm, size, BLOCKING);\r
1390                         while (!(UARTx->LSR & UART_LSR_TEMT));\r
1391                 }\r
1392         }\r
1393         return cnt;\r
1394 }\r
1395 \r
1396 /*********************************************************************//**\r
1397  * @brief               Send Slave address frames on RS485 bus.\r
1398  * @param[in]   UARTx   UART peripheral selected, should be:\r
1399  *                                      - LPC_UART0     :UART0 peripheral\r
1400  *                                      - LPC_UART1     :UART1 peripheral\r
1401  *                                      - LPC_UART2     :UART2 peripheral\r
1402  *                                      - LPC_UART3     :UART3 peripheral\r
1403  * @param[in]   SlvAddr Slave Address.\r
1404  * @return              None\r
1405  **********************************************************************/\r
1406 void UART_RS485SendSlvAddr(LPC_USARTn_Type *UARTx, uint8_t SlvAddr)\r
1407 {\r
1408         UART_RS485Send(UARTx, &SlvAddr, 1, 1);\r
1409 }\r
1410 \r
1411 /*********************************************************************//**\r
1412  * @brief               Send Data frames on RS485 bus.\r
1413  * @param[in]   UARTx   UART peripheral selected, should be:\r
1414  *                                      - LPC_UART0     :UART0 peripheral\r
1415  *                                      - LPC_UART1     :UART1 peripheral\r
1416  *                                      - LPC_UART2     :UART2 peripheral\r
1417  *                                      - LPC_UART3     :UART3 peripheral\r
1418  * @param[in]   pData Pointer to data to be sent.\r
1419  * @param[in]   size Size of data frame to be sent.\r
1420  * @return              None\r
1421  **********************************************************************/\r
1422 uint32_t UART_RS485SendData(LPC_USARTn_Type *UARTx, uint8_t *pData, uint32_t size)\r
1423 {\r
1424         return (UART_RS485Send(UARTx, pData, size, 0));\r
1425 }\r
1426 \r
1427 \r
1428 #endif /* _UART */\r
1429 \r
1430 /**\r
1431  * @}\r
1432  */\r
1433 \r
1434 /**\r
1435  * @}\r
1436  */\r
1437 /* --------------------------------- End Of File ------------------------------ */\r
1438 \r