2 * FreeRTOS+TCP V2.0.0
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3 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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5 * Permission is hereby granted, free of charge, to any person obtaining a copy of
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6 * this software and associated documentation files (the "Software"), to deal in
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7 * the Software without restriction, including without limitation the rights to
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8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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9 * the Software, and to permit persons to whom the Software is furnished to do so,
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10 * subject to the following conditions:
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12 * The above copyright notice and this permission notice shall be included in all
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13 * copies or substantial portions of the Software. If you wish to use our Amazon
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14 * FreeRTOS name, please do so in a fair use way that does not cause confusion.
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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18 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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19 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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23 * http://www.FreeRTOS.org
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24 * http://aws.amazon.com/freertos
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26 * 1 tab == 4 spaces!
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29 /* Standard includes. */
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34 /* FreeRTOS includes. */
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35 #include "FreeRTOS.h"
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40 /* FreeRTOS+TCP includes. */
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41 #include "FreeRTOS_IP.h"
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42 #include "FreeRTOS_Sockets.h"
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43 #include "FreeRTOS_IP_Private.h"
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44 #include "NetworkBufferManagement.h"
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45 #include "NetworkInterface.h"
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47 /* LPCOpen includes. */
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49 #include "lpc_phy.h"
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51 /* The size of the stack allocated to the task that handles Rx packets. */
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52 #define nwRX_TASK_STACK_SIZE 140
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54 #ifndef PHY_LS_HIGH_CHECK_TIME_MS
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55 /* Check if the LinkSStatus in the PHY is still high after 15 seconds of not
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56 receiving packets. */
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57 #define PHY_LS_HIGH_CHECK_TIME_MS 15000
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60 #ifndef PHY_LS_LOW_CHECK_TIME_MS
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61 /* Check if the LinkSStatus in the PHY is still low every second. */
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62 #define PHY_LS_LOW_CHECK_TIME_MS 1000
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65 #ifndef configUSE_RMII
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66 #define configUSE_RMII 1
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69 #ifndef configNUM_RX_DESCRIPTORS
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70 #error please define configNUM_RX_DESCRIPTORS in your FreeRTOSIPConfig.h
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73 #ifndef configNUM_TX_DESCRIPTORS
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74 #error please define configNUM_TX_DESCRIPTORS in your FreeRTOSIPConfig.h
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77 #ifndef NETWORK_IRQHandler
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78 #error NETWORK_IRQHandler must be defined to the name of the function that is installed in the interrupt vector table to handle Ethernet interrupts.
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81 #if !defined( MAC_FF_HMC )
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82 /* Hash for multicast. */
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83 #define MAC_FF_HMC ( 1UL << 2UL )
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86 #ifndef iptraceEMAC_TASK_STARTING
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87 #define iptraceEMAC_TASK_STARTING() do { } while( 0 )
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90 /* Define the bits of .STATUS that indicate a reception error. */
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91 #define nwRX_STATUS_ERROR_BITS \
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92 ( RDES_CE /* CRC Error */ | \
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93 RDES_RE /* Receive Error */ | \
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94 RDES_DE /* Descriptor Error */ | \
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95 RDES_RWT /* Receive Watchdog Timeout */ | \
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96 RDES_LC /* Late Collision */ | \
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97 RDES_OE /* Overflow Error */ | \
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98 RDES_SAF /* Source Address Filter Fail */ | \
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99 RDES_AFM /* Destination Address Filter Fail */ | \
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100 RDES_LE /* Length Error */ )
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102 /* Define the EMAC status bits that should trigger an interrupt. */
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103 #define nwDMA_INTERRUPT_MASK \
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104 ( DMA_IE_TIE /* Transmit interrupt enable */ | \
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105 DMA_IE_TSE /* Transmit stopped enable */ | \
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106 DMA_IE_OVE /* Overflow interrupt enable */ | \
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107 DMA_IE_RIE /* Receive interrupt enable */ | \
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108 DMA_IE_NIE /* Normal interrupt summary enable */ | \
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109 DMA_IE_AIE /* Abnormal interrupt summary enable */ | \
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110 DMA_IE_RUE /* Receive buffer unavailable enable */ | \
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111 DMA_IE_UNE /* Underflow interrupt enable. */ | \
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112 DMA_IE_TJE /* Transmit jabber timeout enable */ | \
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113 DMA_IE_RSE /* Received stopped enable */ | \
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114 DMA_IE_RWE /* Receive watchdog timeout enable */ | \
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115 DMA_IE_FBE )/* Fatal bus error enable */
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117 /* Interrupt events to process. Currently only the RX/TX events are processed
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118 although code for other events is included to allow for possible future
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120 #define EMAC_IF_RX_EVENT 1UL
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121 #define EMAC_IF_TX_EVENT 2UL
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122 #define EMAC_IF_ERR_EVENT 4UL
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123 #define EMAC_IF_ALL_EVENT ( EMAC_IF_RX_EVENT | EMAC_IF_TX_EVENT | EMAC_IF_ERR_EVENT )
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125 /* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1, then the Ethernet
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126 driver will filter incoming packets and only pass the stack those packets it
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127 considers need processing. */
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128 #if( ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES == 0 )
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129 #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eProcessBuffer
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131 #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eConsiderFrameForProcessing( ( pucEthernetBuffer ) )
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134 #if( ipconfigZERO_COPY_RX_DRIVER == 0 ) || ( ipconfigZERO_COPY_TX_DRIVER == 0 )
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135 #warning It is adviced to enable both macros
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138 #ifndef configPLACE_IN_SECTION_RAM
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139 #define configPLACE_IN_SECTION_RAM
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141 #define configPLACE_IN_SECTION_RAM __attribute__ ((section(".ramfunc")))
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145 /*-----------------------------------------------------------*/
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148 * Delay function passed into the library. The implementation uses FreeRTOS
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149 * calls so the scheduler must be started before the driver can be used.
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151 static void prvDelay( uint32_t ulMilliSeconds );
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154 * Initialises the Tx and Rx descriptors respectively.
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156 static void prvSetupTxDescriptors( void );
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157 static void prvSetupRxDescriptors( void );
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160 * A task that processes received frames.
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162 static void prvEMACHandlerTask( void *pvParameters );
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165 * Sets up the MAC with the results of an auto-negotiation.
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167 static BaseType_t prvSetLinkSpeed( void );
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170 * Generates a CRC for a MAC address that is then used to generate a hash index.
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172 static uint32_t prvGenerateCRC32( const uint8_t *ucAddress );
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175 * Generates a hash index when setting a filter to permit a MAC address.
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177 static uint32_t prvGetHashIndex( const uint8_t *ucAddress );
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180 * Update the hash table to allow a MAC address.
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182 static void prvAddMACAddress( const uint8_t* ucMacAddress );
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185 * Sometimes the DMA will report received data as being longer than the actual
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186 * received from length. This function checks the reported length and corrects
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189 static void prvRemoveTrailingBytes( NetworkBufferDescriptor_t *pxDescriptor );
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191 /*-----------------------------------------------------------*/
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193 /* Bit map of outstanding ETH interrupt events for processing. Currently only
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194 the Rx and Tx interrupt is handled, although code is included for other events
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195 to enable future expansion. */
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196 static volatile uint32_t ulISREvents;
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198 /* A copy of PHY register 1: 'PHY_REG_01_BMSR' */
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199 static uint32_t ulPHYLinkStatus = 0;
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201 /* Tx descriptors and index. */
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202 static ENET_ENHTXDESC_T xDMATxDescriptors[ configNUM_TX_DESCRIPTORS ];
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204 /* ulNextFreeTxDescriptor is declared volatile, because it is accessed from
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205 to different tasks. */
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206 static volatile uint32_t ulNextFreeTxDescriptor;
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207 static uint32_t ulTxDescriptorToClear;
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209 /* Rx descriptors and index. */
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210 static ENET_ENHRXDESC_T xDMARxDescriptors[ configNUM_RX_DESCRIPTORS ];
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211 static uint32_t ulNextRxDescriptorToProcess;
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213 /* Must be defined externally - the demo applications define this in main.c. */
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214 extern uint8_t ucMACAddress[ 6 ];
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216 /* The handle of the task that processes Rx packets. The handle is required so
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217 the task can be notified when new packets arrive. */
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218 static TaskHandle_t xRxHanderTask = NULL;
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220 #if( ipconfigUSE_LLMNR == 1 )
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221 static const uint8_t xLLMNR_MACAddress[] = { '\x01', '\x00', '\x5E', '\x00', '\x00', '\xFC' };
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222 #endif /* ipconfigUSE_LLMNR == 1 */
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224 /* xTXDescriptorSemaphore is a counting semaphore with
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225 a maximum count of ETH_TXBUFNB, which is the number of
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226 DMA TX descriptors. */
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227 static SemaphoreHandle_t xTXDescriptorSemaphore = NULL;
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229 /*-----------------------------------------------------------*/
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232 BaseType_t xNetworkInterfaceInitialise( void )
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234 BaseType_t xReturn = pdPASS;
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235 static BaseType_t xHasInitialised = pdFALSE;
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237 if( xHasInitialised == pdFALSE )
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239 xHasInitialised = pdTRUE;
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241 /* The interrupt will be turned on when a link is established. */
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242 NVIC_DisableIRQ( ETHERNET_IRQn );
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244 /* Disable receive and transmit DMA processes. */
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245 LPC_ETHERNET->DMA_OP_MODE &= ~( DMA_OM_ST | DMA_OM_SR );
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247 /* Disable packet reception. */
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248 LPC_ETHERNET->MAC_CONFIG &= ~( MAC_CFG_RE | MAC_CFG_TE );
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250 /* Call the LPCOpen function to initialise the hardware. */
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251 Chip_ENET_Init( LPC_ETHERNET );
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253 /* Save MAC address. */
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254 Chip_ENET_SetADDR( LPC_ETHERNET, ucMACAddress );
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256 /* Clear all MAC address hash entries. */
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257 LPC_ETHERNET->MAC_HASHTABLE_HIGH = 0;
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258 LPC_ETHERNET->MAC_HASHTABLE_LOW = 0;
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260 #if( ipconfigUSE_LLMNR == 1 )
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262 prvAddMACAddress( xLLMNR_MACAddress );
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264 #endif /* ipconfigUSE_LLMNR == 1 */
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266 /* Promiscuous flag (PR) and Receive All flag (RA) set to zero. The
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267 registers MAC_HASHTABLE_[LOW|HIGH] will be loaded to allow certain
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268 multi-cast addresses. */
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269 LPC_ETHERNET->MAC_FRAME_FILTER = MAC_FF_HMC;
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271 #if( configUSE_RMII == 1 )
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273 if( lpc_phy_init( pdTRUE, prvDelay ) != SUCCESS )
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280 #warning This path has not been tested.
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281 if( lpc_phy_init( pdFALSE, prvDelay ) != SUCCESS )
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288 if( xReturn == pdPASS )
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290 if( xTXDescriptorSemaphore == NULL )
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292 /* Create a counting semaphore, with a value of 'configNUM_TX_DESCRIPTORS'
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293 and a maximum of 'configNUM_TX_DESCRIPTORS'. */
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294 xTXDescriptorSemaphore = xSemaphoreCreateCounting( ( UBaseType_t ) configNUM_TX_DESCRIPTORS, ( UBaseType_t ) configNUM_TX_DESCRIPTORS );
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295 configASSERT( xTXDescriptorSemaphore );
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298 /* Enable MAC interrupts. */
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299 LPC_ETHERNET->DMA_INT_EN = nwDMA_INTERRUPT_MASK;
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301 /* Auto-negotiate was already started. Wait for it to complete. */
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302 xReturn = prvSetLinkSpeed();
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304 if( xReturn == pdPASS )
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306 /* Initialise the descriptors. */
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307 prvSetupTxDescriptors();
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308 prvSetupRxDescriptors();
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310 /* Clear all interrupts. */
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311 LPC_ETHERNET->DMA_STAT = DMA_ST_ALL;
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313 /* Enable receive and transmit DMA processes. */
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314 LPC_ETHERNET->DMA_OP_MODE |= DMA_OM_ST | DMA_OM_SR;
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316 /* Set Receiver / Transmitter Enable. */
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317 LPC_ETHERNET->MAC_CONFIG |= MAC_CFG_RE | MAC_CFG_TE;
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319 /* Start receive polling. */
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320 LPC_ETHERNET->DMA_REC_POLL_DEMAND = 1;
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322 /* Enable interrupts in the NVIC. */
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323 NVIC_SetPriority( ETHERNET_IRQn, configMAC_INTERRUPT_PRIORITY );
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324 NVIC_EnableIRQ( ETHERNET_IRQn );
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326 /* Guard against the task being created more than once and the
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327 descriptors being initialised more than once. */
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328 if( xRxHanderTask == NULL )
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330 xReturn = xTaskCreate( prvEMACHandlerTask, "EMAC", nwRX_TASK_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, &xRxHanderTask );
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331 configASSERT( xReturn );
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336 /* Once prvEMACHandlerTask() has started, the variable
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337 'ulPHYLinkStatus' will be updated by that task.
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338 The IP-task will keep on calling this function untill
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339 it finally returns pdPASS.
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340 Only then can the DHCP-procedure start (if configured). */
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341 if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != 0 )
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352 /*-----------------------------------------------------------*/
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354 #define niBUFFER_1_PACKET_SIZE 1536
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356 static __attribute__ ((section("._ramAHB32"))) uint8_t ucNetworkPackets[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS * niBUFFER_1_PACKET_SIZE ] __attribute__ ( ( aligned( 32 ) ) );
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358 void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] )
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361 uint8_t *ucRAMBuffer = ucNetworkPackets;
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364 for( ul = 0; ul < ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS; ul++ )
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366 pxNetworkBuffers[ ul ].pucEthernetBuffer = ucRAMBuffer + ipBUFFER_PADDING;
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367 *( ( unsigned * ) ucRAMBuffer ) = ( unsigned ) ( &( pxNetworkBuffers[ ul ] ) );
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368 ucRAMBuffer += niBUFFER_1_PACKET_SIZE;
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371 /*-----------------------------------------------------------*/
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373 configPLACE_IN_SECTION_RAM
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374 static void vClearTXBuffers()
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376 uint32_t ulLastDescriptor = ulNextFreeTxDescriptor;
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377 size_t uxCount = ( ( size_t ) configNUM_TX_DESCRIPTORS ) - uxSemaphoreGetCount( xTXDescriptorSemaphore );
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378 #if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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379 NetworkBufferDescriptor_t *pxNetworkBuffer;
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380 uint8_t *ucPayLoad;
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383 /* This function is called after a TX-completion interrupt.
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384 It will release each Network Buffer used in xNetworkInterfaceOutput().
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385 'uxCount' represents the number of descriptors given to DMA for transmission.
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386 After sending a packet, the DMA will clear the 'TDES_OWN' bit. */
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387 while( ( uxCount > ( size_t ) 0u ) && ( ( xDMATxDescriptors[ ulTxDescriptorToClear ].CTRLSTAT & TDES_OWN ) == 0 ) )
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389 if( ( ulTxDescriptorToClear == ulLastDescriptor ) && ( uxCount != ( size_t ) configNUM_TX_DESCRIPTORS ) )
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395 #if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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397 ucPayLoad = ( uint8_t * )xDMATxDescriptors[ ulTxDescriptorToClear ].B1ADD;
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398 if( ucPayLoad != NULL )
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400 /* B1ADD points to a pucEthernetBuffer of a Network Buffer descriptor. */
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401 pxNetworkBuffer = pxPacketBuffer_to_NetworkBuffer( ucPayLoad );
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403 configASSERT( pxNetworkBuffer != NULL );
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405 vReleaseNetworkBufferAndDescriptor( pxNetworkBuffer ) ;
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406 xDMATxDescriptors[ ulTxDescriptorToClear ].B1ADD = ( uint32_t )0u;
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409 #endif /* ipconfigZERO_COPY_TX_DRIVER */
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411 /* Move onto the next descriptor, wrapping if necessary. */
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412 ulTxDescriptorToClear++;
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413 if( ulTxDescriptorToClear >= configNUM_TX_DESCRIPTORS )
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415 ulTxDescriptorToClear = 0;
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419 /* Tell the counting semaphore that one more TX descriptor is available. */
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420 xSemaphoreGive( xTXDescriptorSemaphore );
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424 /*-----------------------------------------------------------*/
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426 configPLACE_IN_SECTION_RAM
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427 BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, BaseType_t bReleaseAfterSend )
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429 BaseType_t xReturn = pdFAIL;
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430 const TickType_t xBlockTimeTicks = pdMS_TO_TICKS( 50 );
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432 /* Attempt to obtain access to a Tx descriptor. */
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435 if( xTXDescriptorSemaphore == NULL )
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439 if( xSemaphoreTake( xTXDescriptorSemaphore, xBlockTimeTicks ) != pdPASS )
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441 /* Time-out waiting for a free TX descriptor. */
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445 /* If the descriptor is still owned by the DMA it can't be used. */
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446 if( ( xDMATxDescriptors[ ulNextFreeTxDescriptor ].CTRLSTAT & TDES_OWN ) != 0 )
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448 /* The semaphore was taken, the TX DMA-descriptor is still not available.
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449 Actually that should not occur, the 'TDES_OWN' was already confirmed low in vClearTXBuffers(). */
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450 xSemaphoreGive( xTXDescriptorSemaphore );
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454 #if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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456 /* bReleaseAfterSend should always be set when using the zero
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458 configASSERT( bReleaseAfterSend != pdFALSE );
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460 /* The DMA's descriptor to point directly to the data in the
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461 network buffer descriptor. The data is not copied. */
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462 xDMATxDescriptors[ ulNextFreeTxDescriptor ].B1ADD = ( uint32_t ) pxDescriptor->pucEthernetBuffer;
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464 /* The DMA descriptor will 'own' this Network Buffer,
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465 until it has been sent. So don't release it now. */
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466 bReleaseAfterSend = pdFALSE;
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470 /* The data is copied from the network buffer descriptor into
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471 the DMA's descriptor. */
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472 memcpy( ( void * ) xDMATxDescriptors[ ulNextFreeTxDescriptor ].B1ADD, ( void * ) pxDescriptor->pucEthernetBuffer, pxDescriptor->xDataLength );
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476 xDMATxDescriptors[ ulNextFreeTxDescriptor ].BSIZE = ( uint32_t ) TDES_ENH_BS1( pxDescriptor->xDataLength );
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478 /* This descriptor is given back to the DMA. */
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479 xDMATxDescriptors[ ulNextFreeTxDescriptor ].CTRLSTAT |= TDES_OWN;
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481 /* Ensure the DMA is polling Tx descriptors. */
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482 LPC_ETHERNET->DMA_TRANS_POLL_DEMAND = 1;
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484 iptraceNETWORK_INTERFACE_TRANSMIT();
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486 /* Move onto the next descriptor, wrapping if necessary. */
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487 ulNextFreeTxDescriptor++;
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488 if( ulNextFreeTxDescriptor >= configNUM_TX_DESCRIPTORS )
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490 ulNextFreeTxDescriptor = 0;
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493 /* The Tx has been initiated. */
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498 /* The buffer has been sent so can be released. */
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499 if( bReleaseAfterSend != pdFALSE )
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501 vReleaseNetworkBufferAndDescriptor( pxDescriptor );
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506 /*-----------------------------------------------------------*/
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508 static void prvDelay( uint32_t ulMilliSeconds )
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510 /* Ensure the scheduler was started before attempting to use the scheduler to
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512 configASSERT( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING );
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514 vTaskDelay( pdMS_TO_TICKS( ulMilliSeconds ) );
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516 /*-----------------------------------------------------------*/
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518 static void prvSetupTxDescriptors( void )
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522 /* Start with Tx descriptors clear. */
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523 memset( ( void * ) xDMATxDescriptors, 0, sizeof( xDMATxDescriptors ) );
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525 /* Index to the next Tx descriptor to use. */
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526 ulNextFreeTxDescriptor = 0ul;
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528 /* Index to the next Tx descriptor to clear ( after transmission ). */
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529 ulTxDescriptorToClear = 0ul;
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531 for( x = 0; x < configNUM_TX_DESCRIPTORS; x++ )
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533 #if( ipconfigZERO_COPY_TX_DRIVER != 0 )
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535 /* Nothing to do, B1ADD will be set when data is ready to transmit.
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536 Currently the memset above will have set it to NULL. */
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540 /* Allocate a buffer to the Tx descriptor. This is the most basic
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541 way of creating a driver as the data is then copied into the
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543 xDMATxDescriptors[ x ].B1ADD = ( uint32_t ) pvPortMalloc( ipTOTAL_ETHERNET_FRAME_SIZE );
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545 /* Use an assert to check the allocation as +TCP applications will
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546 often not use a malloc() failed hook as the TCP stack will recover
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547 from allocation failures. */
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548 configASSERT( xDMATxDescriptors[ x ].B1ADD );
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552 /* Buffers hold an entire frame so all buffers are both the start and
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554 /* TDES_ENH_TCH Second Address Chained. */
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555 /* TDES_ENH_CIC(n) Checksum Insertion Control, tried but it does not work for the LPC18xx... */
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556 /* TDES_ENH_FS First Segment. */
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557 /* TDES_ENH_LS Last Segment. */
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558 /* TDES_ENH_IC Interrupt on Completion. */
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559 xDMATxDescriptors[ x ].CTRLSTAT = TDES_ENH_TCH | TDES_ENH_CIC( 3 ) | TDES_ENH_FS | TDES_ENH_LS | TDES_ENH_IC;
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560 xDMATxDescriptors[ x ].B2ADD = ( uint32_t ) &xDMATxDescriptors[ x + 1 ];
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563 xDMATxDescriptors[ configNUM_TX_DESCRIPTORS - 1 ].CTRLSTAT |= TDES_ENH_TER;
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564 xDMATxDescriptors[ configNUM_TX_DESCRIPTORS - 1 ].B2ADD = ( uint32_t ) &xDMATxDescriptors[ 0 ];
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566 /* Point the DMA to the base of the descriptor list. */
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567 LPC_ETHERNET->DMA_TRANS_DES_ADDR = ( uint32_t ) xDMATxDescriptors;
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569 /*-----------------------------------------------------------*/
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571 static void prvSetupRxDescriptors( void )
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574 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
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575 NetworkBufferDescriptor_t *pxNetworkBuffer;
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578 /* Index to the next Rx descriptor to use. */
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579 ulNextRxDescriptorToProcess = 0;
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581 /* Clear RX descriptor list. */
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582 memset( ( void * ) xDMARxDescriptors, 0, sizeof( xDMARxDescriptors ) );
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584 for( x = 0; x < configNUM_RX_DESCRIPTORS; x++ )
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586 /* Allocate a buffer of the largest possible frame size as it is not
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587 known what size received frames will be. */
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589 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
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591 pxNetworkBuffer = pxGetNetworkBufferWithDescriptor( ipTOTAL_ETHERNET_FRAME_SIZE, 0 );
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593 /* During start-up there should be enough Network Buffers available,
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594 so it is safe to use configASSERT().
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595 In case this assert fails, please check: configNUM_RX_DESCRIPTORS,
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596 ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS, and in case BufferAllocation_2.c
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597 is included, check the amount of available heap. */
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598 configASSERT( pxNetworkBuffer != NULL );
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600 /* Pass the actual buffer to DMA. */
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601 xDMARxDescriptors[ x ].B1ADD = ( uint32_t ) pxNetworkBuffer->pucEthernetBuffer;
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605 /* All DMA descriptors are populated with permanent memory blocks.
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606 Their contents will be copy to Network Buffers. */
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607 xDMARxDescriptors[ x ].B1ADD = ( uint32_t ) pvPortMalloc( ipTOTAL_ETHERNET_FRAME_SIZE );
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609 #endif /* ipconfigZERO_COPY_RX_DRIVER */
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611 /* Use an assert to check the allocation as +TCP applications will often
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612 not use a malloc failed hook as the TCP stack will recover from
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613 allocation failures. */
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614 configASSERT( xDMARxDescriptors[ x ].B1ADD );
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616 xDMARxDescriptors[ x ].B2ADD = ( uint32_t ) &( xDMARxDescriptors[ x + 1 ] );
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617 xDMARxDescriptors[ x ].CTRL = ( uint32_t ) RDES_ENH_BS1( ipTOTAL_ETHERNET_FRAME_SIZE ) | RDES_ENH_RCH;
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619 /* The descriptor is available for use by the DMA. */
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620 xDMARxDescriptors[ x ].STATUS = RDES_OWN;
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623 /* RDES_ENH_RER Receive End of Ring. */
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624 xDMARxDescriptors[ ( configNUM_RX_DESCRIPTORS - 1 ) ].CTRL |= RDES_ENH_RER;
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625 xDMARxDescriptors[ configNUM_RX_DESCRIPTORS - 1 ].B2ADD = ( uint32_t ) &( xDMARxDescriptors[ 0 ] );
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627 /* Point the DMA to the base of the descriptor list. */
\r
628 LPC_ETHERNET->DMA_REC_DES_ADDR = ( uint32_t ) xDMARxDescriptors;
\r
630 /*-----------------------------------------------------------*/
\r
631 configPLACE_IN_SECTION_RAM
\r
632 static void prvRemoveTrailingBytes( NetworkBufferDescriptor_t *pxDescriptor )
\r
634 size_t xExpectedLength;
\r
635 IPPacket_t *pxIPPacket;
\r
637 pxIPPacket = ( IPPacket_t * ) pxDescriptor->pucEthernetBuffer;
\r
638 /* Look at the actual length of the packet, translate it to a host-endial notation. */
\r
639 xExpectedLength = sizeof( EthernetHeader_t ) + ( size_t ) FreeRTOS_htons( pxIPPacket->xIPHeader.usLength );
\r
641 if( xExpectedLength == ( pxDescriptor->xDataLength + 4 ) )
\r
643 pxDescriptor->xDataLength -= 4;
\r
647 if( pxDescriptor->xDataLength > xExpectedLength )
\r
649 pxDescriptor->xDataLength = ( size_t ) xExpectedLength;
\r
653 /*-----------------------------------------------------------*/
\r
654 configPLACE_IN_SECTION_RAM
\r
655 BaseType_t xGetPhyLinkStatus( void )
\r
657 BaseType_t xReturn;
\r
659 if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) == 0 )
\r
670 /*-----------------------------------------------------------*/
\r
672 configPLACE_IN_SECTION_RAM
\r
673 static BaseType_t prvNetworkInterfaceInput()
\r
675 BaseType_t xResult = pdFALSE;
\r
677 eFrameProcessingResult_t eResult;
\r
678 const TickType_t xDescriptorWaitTime = pdMS_TO_TICKS( 250 );
\r
679 const UBaseType_t uxMinimumBuffersRemaining = 3UL;
\r
681 NetworkBufferDescriptor_t *pxDescriptor;
\r
682 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
\r
683 NetworkBufferDescriptor_t *pxNewDescriptor;
\r
684 #endif /* ipconfigZERO_COPY_RX_DRIVER */
\r
685 IPStackEvent_t xRxEvent = { eNetworkRxEvent, NULL };
\r
687 /* Process each descriptor that is not still in use by the DMA. */
\r
688 ulStatus = xDMARxDescriptors[ ulNextRxDescriptorToProcess ].STATUS;
\r
689 if( ( ulStatus & RDES_OWN ) == 0 )
\r
691 /* Check packet for errors */
\r
692 if( ( ulStatus & nwRX_STATUS_ERROR_BITS ) != 0 )
\r
694 /* There is some reception error. */
\r
695 /* Clear error bits. */
\r
696 ulStatus &= ~( ( uint32_t )nwRX_STATUS_ERROR_BITS );
\r
702 eResult = ipCONSIDER_FRAME_FOR_PROCESSING( ( const uint8_t * const ) ( xDMARxDescriptors[ ulNextRxDescriptorToProcess ].B1ADD ) );
\r
703 if( eResult == eProcessBuffer )
\r
705 if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) == 0 )
\r
707 ulPHYLinkStatus |= PHY_LINK_CONNECTED;
\r
708 FreeRTOS_printf( ( "prvEMACHandlerTask: PHY LS now %d (message received)\n", ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != 0 ) );
\r
711 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
\r
712 if( uxGetNumberOfFreeNetworkBuffers() > uxMinimumBuffersRemaining )
\r
714 pxNewDescriptor = pxGetNetworkBufferWithDescriptor( ipTOTAL_ETHERNET_FRAME_SIZE, xDescriptorWaitTime );
\r
718 /* Too risky to allocate a new Network Buffer. */
\r
719 pxNewDescriptor = NULL;
\r
721 if( pxNewDescriptor != NULL )
\r
723 if( uxGetNumberOfFreeNetworkBuffers() > uxMinimumBuffersRemaining )
\r
724 #endif /* ipconfigZERO_COPY_RX_DRIVER */
\r
726 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
\r
727 const uint8_t *pucBuffer;
\r
730 /* Get the actual length. */
\r
731 usLength = RDES_FLMSK( ulStatus );
\r
733 #if( ipconfigZERO_COPY_RX_DRIVER != 0 )
\r
735 /* Replace the character buffer 'B1ADD'. */
\r
736 pucBuffer = ( const uint8_t * const ) ( xDMARxDescriptors[ ulNextRxDescriptorToProcess ].B1ADD );
\r
737 xDMARxDescriptors[ ulNextRxDescriptorToProcess ].B1ADD = ( uint32_t ) pxNewDescriptor->pucEthernetBuffer;
\r
739 /* 'B1ADD' contained the address of a 'pucEthernetBuffer' that
\r
740 belongs to a Network Buffer. Find the original Network Buffer. */
\r
741 pxDescriptor = pxPacketBuffer_to_NetworkBuffer( pucBuffer );
\r
742 /* This zero-copy driver makes sure that every 'xDMARxDescriptors' contains
\r
743 a reference to a Network Buffer at any time.
\r
744 In case it runs out of Network Buffers, a DMA buffer won't be replaced,
\r
745 and the received messages is dropped. */
\r
746 configASSERT( pxDescriptor != NULL );
\r
750 /* Create a buffer of exactly the required length. */
\r
751 pxDescriptor = pxGetNetworkBufferWithDescriptor( usLength, xDescriptorWaitTime );
\r
753 #endif /* ipconfigZERO_COPY_RX_DRIVER */
\r
755 if( pxDescriptor != NULL )
\r
757 pxDescriptor->xDataLength = ( size_t ) usLength;
\r
758 #if( ipconfigZERO_COPY_RX_DRIVER == 0 )
\r
760 /* Copy the data into the allocated buffer. */
\r
761 memcpy( ( void * ) pxDescriptor->pucEthernetBuffer, ( void * ) xDMARxDescriptors[ ulNextRxDescriptorToProcess ].B1ADD, usLength );
\r
763 #endif /* ipconfigZERO_COPY_RX_DRIVER */
\r
764 /* It is possible that more data was copied than
\r
765 actually makes up the frame. If this is the case
\r
766 adjust the length to remove any trailing bytes. */
\r
767 prvRemoveTrailingBytes( pxDescriptor );
\r
769 /* Pass the data to the TCP/IP task for processing. */
\r
770 xRxEvent.pvData = ( void * ) pxDescriptor;
\r
771 if( xSendEventStructToIPTask( &xRxEvent, xDescriptorWaitTime ) == pdFALSE )
\r
773 /* Could not send the descriptor into the TCP/IP
\r
774 stack, it must be released. */
\r
775 vReleaseNetworkBufferAndDescriptor( pxDescriptor );
\r
779 iptraceNETWORK_INTERFACE_RECEIVE();
\r
784 /* Got here because received data was sent to the IP task or the
\r
785 data contained an error and was discarded. Give the descriptor
\r
786 back to the DMA. */
\r
787 xDMARxDescriptors[ ulNextRxDescriptorToProcess ].STATUS = ulStatus | RDES_OWN;
\r
789 /* Move onto the next descriptor. */
\r
790 ulNextRxDescriptorToProcess++;
\r
791 if( ulNextRxDescriptorToProcess >= configNUM_RX_DESCRIPTORS )
\r
793 ulNextRxDescriptorToProcess = 0;
\r
796 ulStatus = xDMARxDescriptors[ ulNextRxDescriptorToProcess ].STATUS;
\r
797 } /* if( ( ulStatus & nwRX_STATUS_ERROR_BITS ) != 0 ) */
\r
798 } /* if( ( ulStatus & RDES_OWN ) == 0 ) */
\r
800 /* Restart receive polling. */
\r
801 LPC_ETHERNET->DMA_REC_POLL_DEMAND = 1;
\r
805 /*-----------------------------------------------------------*/
\r
807 configPLACE_IN_SECTION_RAM
\r
808 void NETWORK_IRQHandler( void )
\r
810 BaseType_t xHigherPriorityTaskWoken = pdFALSE;
\r
811 uint32_t ulDMAStatus;
\r
812 const uint32_t ulRxInterruptMask =
\r
813 DMA_ST_RI | /* Receive interrupt */
\r
814 DMA_ST_RU; /* Receive buffer unavailable */
\r
815 const uint32_t ulTxInterruptMask =
\r
816 DMA_ST_TI | /* Transmit interrupt */
\r
817 DMA_ST_TPS; /* Transmit process stopped */
\r
819 configASSERT( xRxHanderTask );
\r
821 /* Get pending interrupts. */
\r
822 ulDMAStatus = LPC_ETHERNET->DMA_STAT;
\r
824 /* RX group interrupt(s). */
\r
825 if( ( ulDMAStatus & ulRxInterruptMask ) != 0x00 )
\r
827 /* Remember that an RX event has happened. */
\r
828 ulISREvents |= EMAC_IF_RX_EVENT;
\r
829 vTaskNotifyGiveFromISR( xRxHanderTask, &xHigherPriorityTaskWoken );
\r
832 /* TX group interrupt(s). */
\r
833 if( ( ulDMAStatus & ulTxInterruptMask ) != 0x00 )
\r
835 /* Remember that a TX event has happened. */
\r
836 ulISREvents |= EMAC_IF_TX_EVENT;
\r
837 vTaskNotifyGiveFromISR( xRxHanderTask, &xHigherPriorityTaskWoken );
\r
840 /* Test for 'Abnormal interrupt summary'. */
\r
841 if( ( ulDMAStatus & DMA_ST_AIE ) != 0x00 )
\r
843 /* The trace macro must be written such that it can be called from
\r
845 iptraceETHERNET_RX_EVENT_LOST();
\r
848 /* Clear pending interrupts */
\r
849 LPC_ETHERNET->DMA_STAT = ulDMAStatus;
\r
851 /* Context switch needed? */
\r
852 portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
\r
854 /*-----------------------------------------------------------*/
\r
856 static BaseType_t prvSetLinkSpeed( void )
\r
858 BaseType_t xReturn = pdFAIL;
\r
859 TickType_t xTimeOnEntering;
\r
860 uint32_t ulPhyStatus;
\r
861 const TickType_t xAutoNegotiateDelay = pdMS_TO_TICKS( 5000UL );
\r
863 /* Ensure polling does not starve lower priority tasks by temporarily
\r
864 setting the priority of this task to that of the idle task. */
\r
865 vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
\r
867 xTimeOnEntering = xTaskGetTickCount();
\r
870 ulPhyStatus = lpcPHYStsPoll();
\r
871 if( ( ulPhyStatus & PHY_LINK_CONNECTED ) != 0x00 )
\r
873 /* Set interface speed and duplex. */
\r
874 if( ( ulPhyStatus & PHY_LINK_SPEED100 ) != 0x00 )
\r
876 Chip_ENET_SetSpeed( LPC_ETHERNET, 1 );
\r
880 Chip_ENET_SetSpeed( LPC_ETHERNET, 0 );
\r
883 if( ( ulPhyStatus & PHY_LINK_FULLDUPLX ) != 0x00 )
\r
885 Chip_ENET_SetDuplex( LPC_ETHERNET, pdTRUE );
\r
889 Chip_ENET_SetDuplex( LPC_ETHERNET, pdFALSE );
\r
895 } while( ( xTaskGetTickCount() - xTimeOnEntering ) < xAutoNegotiateDelay );
\r
897 /* Reset the priority of this task back to its original value. */
\r
898 vTaskPrioritySet( NULL, ipconfigIP_TASK_PRIORITY );
\r
902 /*-----------------------------------------------------------*/
\r
904 static uint32_t prvGenerateCRC32( const uint8_t *ucAddress )
\r
907 const uint32_t Polynomial = 0xEDB88320;
\r
908 uint32_t crc = ~0ul;
\r
909 const uint8_t *pucCurrent = ( const uint8_t * ) ucAddress;
\r
910 const uint8_t *pucLast = pucCurrent + 6;
\r
912 /* Calculate normal CRC32 */
\r
913 while( pucCurrent < pucLast )
\r
915 crc ^= *( pucCurrent++ );
\r
916 for( j = 0; j < 8; j++ )
\r
918 if( ( crc & 1 ) != 0 )
\r
920 crc = (crc >> 1) ^ Polynomial;
\r
930 /*-----------------------------------------------------------*/
\r
932 static uint32_t prvGetHashIndex( const uint8_t *ucAddress )
\r
934 uint32_t ulCrc = prvGenerateCRC32( ucAddress );
\r
935 uint32_t ulIndex = 0ul;
\r
936 BaseType_t xCount = 6;
\r
938 /* Take the lowest 6 bits of the CRC32 and reverse them */
\r
942 ulIndex |= ( ulCrc & 1 );
\r
946 /* This is the has value of 'ucAddress' */
\r
949 /*-----------------------------------------------------------*/
\r
951 static void prvAddMACAddress( const uint8_t* ucMacAddress )
\r
955 xIndex = prvGetHashIndex( ucMacAddress );
\r
958 LPC_ETHERNET->MAC_HASHTABLE_HIGH |= ( 1u << ( xIndex - 32 ) );
\r
962 LPC_ETHERNET->MAC_HASHTABLE_LOW |= ( 1u << xIndex );
\r
965 /*-----------------------------------------------------------*/
\r
967 configPLACE_IN_SECTION_RAM
\r
968 static void prvEMACHandlerTask( void *pvParameters )
\r
970 TimeOut_t xPhyTime;
\r
971 TickType_t xPhyRemTime;
\r
972 UBaseType_t uxLastMinBufferCount = 0;
\r
973 UBaseType_t uxCurrentCount;
\r
974 BaseType_t xResult = 0;
\r
976 const TickType_t xBlockTime = pdMS_TO_TICKS( 5000ul );
\r
978 /* Remove compiler warning about unused parameter. */
\r
979 ( void ) pvParameters;
\r
981 /* A possibility to set some additional task properties. */
\r
982 iptraceEMAC_TASK_STARTING();
\r
984 vTaskSetTimeOutState( &xPhyTime );
\r
985 xPhyRemTime = pdMS_TO_TICKS( PHY_LS_LOW_CHECK_TIME_MS );
\r
989 uxCurrentCount = uxGetMinimumFreeNetworkBuffers();
\r
990 if( uxLastMinBufferCount != uxCurrentCount )
\r
992 /* The logging produced below may be helpful
\r
993 while tuning +TCP: see how many buffers are in use. */
\r
994 uxLastMinBufferCount = uxCurrentCount;
\r
995 FreeRTOS_printf( ( "Network buffers: %lu lowest %lu\n",
\r
996 uxGetNumberOfFreeNetworkBuffers(), uxCurrentCount ) );
\r
999 #if( ipconfigCHECK_IP_QUEUE_SPACE != 0 )
\r
1001 static UBaseType_t uxLastMinQueueSpace = 0;
\r
1003 uxCurrentCount = uxGetMinimumIPQueueSpace();
\r
1004 if( uxLastMinQueueSpace != uxCurrentCount )
\r
1006 /* The logging produced below may be helpful
\r
1007 while tuning +TCP: see how many buffers are in use. */
\r
1008 uxLastMinQueueSpace = uxCurrentCount;
\r
1009 FreeRTOS_printf( ( "Queue space: lowest %lu\n", uxCurrentCount ) );
\r
1012 #endif /* ipconfigCHECK_IP_QUEUE_SPACE */
\r
1014 ulTaskNotifyTake( pdTRUE, xBlockTime );
\r
1016 xResult = ( BaseType_t ) 0;
\r
1018 if( ( ulISREvents & EMAC_IF_TX_EVENT ) != 0 )
\r
1020 /* Code to release TX buffers if zero-copy is used. */
\r
1021 ulISREvents &= ~EMAC_IF_TX_EVENT;
\r
1023 /* Check if DMA packets have been delivered. */
\r
1024 vClearTXBuffers();
\r
1028 if( ( ulISREvents & EMAC_IF_RX_EVENT ) != 0 )
\r
1030 ulISREvents &= ~EMAC_IF_RX_EVENT;
\r
1032 xResult = prvNetworkInterfaceInput();
\r
1035 while( prvNetworkInterfaceInput() > 0 )
\r
1043 /* A packet was received. No need to check for the PHY status now,
\r
1044 but set a timer to check it later on. */
\r
1045 vTaskSetTimeOutState( &xPhyTime );
\r
1046 xPhyRemTime = pdMS_TO_TICKS( PHY_LS_HIGH_CHECK_TIME_MS );
\r
1049 else if( xTaskCheckForTimeOut( &xPhyTime, &xPhyRemTime ) != pdFALSE )
\r
1051 ulStatus = lpcPHYStsPoll();
\r
1053 if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != ( ulStatus & PHY_LINK_CONNECTED ) )
\r
1055 ulPHYLinkStatus = ulStatus;
\r
1056 FreeRTOS_printf( ( "prvEMACHandlerTask: PHY LS now %d (polled PHY)\n", ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != 0 ) );
\r
1059 vTaskSetTimeOutState( &xPhyTime );
\r
1060 if( ( ulPHYLinkStatus & PHY_LINK_CONNECTED ) != 0 )
\r
1062 xPhyRemTime = pdMS_TO_TICKS( PHY_LS_HIGH_CHECK_TIME_MS );
\r
1066 xPhyRemTime = pdMS_TO_TICKS( PHY_LS_LOW_CHECK_TIME_MS );
\r
1071 /*-----------------------------------------------------------*/
\r