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1 /*\r
2         FreeRTOS.org V5.0.2 - Copyright (C) 2003-2008 Richard Barry.\r
3 \r
4         This file is part of the FreeRTOS.org distribution.\r
5 \r
6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
7         it under the terms of the GNU General Public License as published by\r
8         the Free Software Foundation; either version 2 of the License, or\r
9         (at your option) any later version.\r
10 \r
11         FreeRTOS.org is distributed in the hope that it will be useful,\r
12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14         GNU General Public License for more details.\r
15 \r
16         You should have received a copy of the GNU General Public License\r
17         along with FreeRTOS.org; if not, write to the Free Software\r
18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19 \r
20         A special exception to the GPL can be applied should you wish to distribute\r
21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
22         the source code for any proprietary components.  See the licensing section \r
23         of http://www.FreeRTOS.org for full details of how and when the exception\r
24         can be applied.\r
25 \r
26     ***************************************************************************\r
27     ***************************************************************************\r
28     *                                                                         *\r
29     * SAVE TIME AND MONEY!  We can port FreeRTOS.org to your own hardware,    *\r
30     * and even write all or part of your application on your behalf.          *\r
31     * See http://www.OpenRTOS.com for details of the services we provide to   *\r
32     * expedite your project.                                                  *\r
33     *                                                                         *\r
34     ***************************************************************************\r
35     ***************************************************************************\r
36 \r
37         Please ensure to read the configuration and relevant port sections of the\r
38         online documentation.\r
39 \r
40         http://www.FreeRTOS.org - Documentation, latest information, license and \r
41         contact details.\r
42 \r
43         http://www.SafeRTOS.com - A version that is certified for use in safety \r
44         critical systems.\r
45 \r
46         http://www.OpenRTOS.com - Commercial support, development, porting, \r
47         licensing and training services.\r
48 */\r
49 \r
50 \r
51 #ifndef PORTMACRO_H\r
52 #define PORTMACRO_H\r
53 \r
54 /*-----------------------------------------------------------\r
55  * Port specific definitions.  \r
56  *\r
57  * The settings in this file configure FreeRTOS correctly for the\r
58  * given hardware and compiler.\r
59  *\r
60  * These settings should not be altered.\r
61  *-----------------------------------------------------------\r
62  */\r
63 \r
64 /* Type definitions. */\r
65 #define portCHAR                char\r
66 #define portFLOAT               float\r
67 #define portDOUBLE              double\r
68 #define portLONG                long\r
69 #define portSHORT               short\r
70 #define portSTACK_TYPE  unsigned portCHAR\r
71 #define portBASE_TYPE   char\r
72 \r
73 #if( configUSE_16_BIT_TICKS == 1 )\r
74         typedef unsigned portSHORT portTickType;\r
75         #define portMAX_DELAY ( portTickType ) 0xffff\r
76 #else\r
77         typedef unsigned portLONG portTickType;\r
78         #define portMAX_DELAY ( portTickType ) 0xffffffff\r
79 #endif\r
80 /*-----------------------------------------------------------*/\r
81 \r
82 /* Hardware specifics. */\r
83 #define portBYTE_ALIGNMENT                      1\r
84 #define portSTACK_GROWTH                        ( -1 )\r
85 #define portTICK_RATE_MS                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
86 #define portYIELD()                                     __asm( "swi" );\r
87 #define portNOP()                                       __asm( "nop" );\r
88 /*-----------------------------------------------------------*/\r
89 \r
90 /* Critical section handling. */\r
91 #define portENABLE_INTERRUPTS()                         __asm( "cli" )  \r
92 #define portDISABLE_INTERRUPTS()                        __asm( "sei" )\r
93 \r
94 /*\r
95  * Disable interrupts before incrementing the count of critical section nesting.\r
96  * The nesting count is maintained so we know when interrupts should be\r
97  * re-enabled.  Once interrupts are disabled the nesting count can be accessed\r
98  * directly.  Each task maintains its own nesting count.\r
99  */\r
100 #define portENTER_CRITICAL()                                                                    \\r
101 {                                                                                                                               \\r
102         extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
103                                                                                                                                 \\r
104         portDISABLE_INTERRUPTS();                                                                       \\r
105         uxCriticalNesting++;                                                                            \\r
106 }\r
107 \r
108 /*\r
109  * Interrupts are disabled so we can access the nesting count directly.  If the\r
110  * nesting is found to be 0 (no nesting) then we are leaving the critical \r
111  * section and interrupts can be re-enabled.\r
112  */\r
113 #define  portEXIT_CRITICAL()                                                                    \\r
114 {                                                                                                                               \\r
115         extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
116                                                                                                                                 \\r
117         uxCriticalNesting--;                                                                            \\r
118         if( uxCriticalNesting == 0 )                                                            \\r
119         {                                                                                                                       \\r
120                 portENABLE_INTERRUPTS();                                                                \\r
121         }                                                                                                                       \\r
122 }\r
123 /*-----------------------------------------------------------*/\r
124 \r
125 /* Task utilities. */\r
126 \r
127 /* \r
128  * These macros are very simple as the processor automatically saves and \r
129  * restores its registers as interrupts are entered and exited.  In\r
130  * addition to the (automatically stacked) registers we also stack the \r
131  * critical nesting count.  Each task maintains its own critical nesting\r
132  * count as it is legitimate for a task to yield from within a critical\r
133  * section.  If the banked memory model is being used then the PPAGE\r
134  * register is also stored as part of the tasks context.\r
135  */\r
136 \r
137 #ifdef BANKED_MODEL\r
138         /* \r
139          * Load the stack pointer for the task, then pull the critical nesting\r
140          * count and PPAGE register from the stack.  The remains of the \r
141          * context are restored by the RTI instruction.\r
142          */\r
143         #define portRESTORE_CONTEXT()                                                                   \\r
144         {                                                                                                                               \\r
145                 extern volatile void * pxCurrentTCB;                                            \\r
146                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
147                                                                                                                                         \\r
148                 __asm( "ldx pxCurrentTCB" );                                                            \\r
149                 __asm( "lds 0, x" );                                                                            \\r
150                 __asm( "pula" );                                                                                        \\r
151                 __asm( "staa uxCriticalNesting" );                                                      \\r
152                 __asm( "pula" );                                                                                        \\r
153                 __asm( "staa 0x30" ); /* 0x30 = PPAGE */                                        \\r
154         }\r
155 \r
156         /* \r
157          * By the time this macro is called the processor has already stacked the\r
158          * registers.  Simply stack the nesting count and PPAGE value, then save \r
159          * the task stack pointer.\r
160          */\r
161         #define portSAVE_CONTEXT()                                                                              \\r
162         {                                                                                                                               \\r
163                 extern volatile void * pxCurrentTCB;                                            \\r
164                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
165                                                                                                                                         \\r
166                 __asm( "ldaa 0x30" );  /* 0x30 = PPAGE */                                       \\r
167                 __asm( "psha" );                                                                                        \\r
168                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
169                 __asm( "psha" );                                                                                        \\r
170                 __asm( "ldx pxCurrentTCB" );                                                            \\r
171                 __asm( "sts 0, x" );                                                                            \\r
172         }\r
173 #else\r
174 \r
175         /* \r
176          * These macros are as per the BANKED versions above, but without saving\r
177          * and restoring the PPAGE register.\r
178          */\r
179 \r
180         #define portRESTORE_CONTEXT()                                                                   \\r
181         {                                                                                                                               \\r
182                 extern volatile void * pxCurrentTCB;                                            \\r
183                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
184                                                                                                                                         \\r
185                 __asm( "ldx pxCurrentTCB" );                                                            \\r
186                 __asm( "lds 0, x" );                                                                            \\r
187                 __asm( "pula" );                                                                                        \\r
188                 __asm( "staa uxCriticalNesting" );                                                      \\r
189         }\r
190 \r
191         #define portSAVE_CONTEXT()                                                                              \\r
192         {                                                                                                                               \\r
193                 extern volatile void * pxCurrentTCB;                                            \\r
194                 extern volatile unsigned portBASE_TYPE uxCriticalNesting;       \\r
195                                                                                                                                         \\r
196                 __asm( "ldaa uxCriticalNesting" );                                                      \\r
197                 __asm( "psha" );                                                                                        \\r
198                 __asm( "ldx pxCurrentTCB" );                                                            \\r
199                 __asm( "sts 0, x" );                                                                            \\r
200         }\r
201 #endif\r
202 \r
203 /*\r
204  * Utility macro to call macros above in correct order in order to perform a\r
205  * task switch from within a standard ISR.  This macro can only be used if\r
206  * the ISR does not use any local (stack) variables.  If the ISR uses stack\r
207  * variables portYIELD() should be used in it's place.\r
208  */\r
209 #define portTASK_SWITCH_FROM_ISR()                                                              \\r
210         portSAVE_CONTEXT();                                                                                     \\r
211         vTaskSwitchContext();                                                                           \\r
212         portRESTORE_CONTEXT();\r
213 \r
214 \r
215 /* Task function macros as described on the FreeRTOS.org WEB site. */\r
216 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
217 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
218 \r
219 #endif /* PORTMACRO_H */\r
220 \r