2 FreeRTOS V4.0.1 - Copyright (C) 2003-2006 Richard Barry.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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30 ***************************************************************************
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34 /*-----------------------------------------------------------
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35 * Implementation of functions defined in portable.h for the ARM7 port.
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37 * Components that can be compiled to either ARM or THUMB mode are
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38 * contained in this file. The ISR routines, which can only be compiled
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39 * to ARM mode are contained in portISR.c.
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40 *----------------------------------------------------------*/
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45 + ulCriticalNesting is now saved as part of the task context, as is
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46 therefore added to the initial task stack during pxPortInitialiseStack.
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50 + Bug fix - The prescale value for the timer setup is now written to T0_PR
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51 instead of T0_PC. This bug would have had no effect unless a prescale
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52 value was actually used.
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56 /* Standard includes. */
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59 /* Scheduler includes. */
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60 #include "FreeRTOS.h"
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63 /* Constants required to setup the task context. */
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64 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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65 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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66 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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67 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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69 /* Constants required to setup the tick ISR. */
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70 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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71 #define portPRESCALE_VALUE 0x00
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72 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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73 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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75 /* Constants required to setup the VIC for the tick ISR. */
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76 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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77 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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78 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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80 /*-----------------------------------------------------------*/
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82 /* Setup the timer to generate the tick interrupts. */
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83 static void prvSetupTimerInterrupt( void );
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86 * The scheduler can only be started from ARM mode, so
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87 * vPortISRStartFirstSTask() is defined in portISR.c.
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89 extern void vPortISRStartFirstTask( void );
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91 /*-----------------------------------------------------------*/
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94 * Initialise the stack of a task to look exactly as if a call to
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95 * portSAVE_CONTEXT had been called.
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97 * See header file for description.
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99 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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101 portSTACK_TYPE *pxOriginalTOS;
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103 pxOriginalTOS = pxTopOfStack;
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105 /* Setup the initial stack of the task. The stack is set exactly as
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106 expected by the portRESTORE_CONTEXT() macro. */
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108 /* First on the stack is the return address - which in this case is the
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109 start of the task. The offset is added to make the return address appear
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110 as it would within an IRQ ISR. */
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111 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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114 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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116 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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118 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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120 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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122 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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124 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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126 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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128 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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130 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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132 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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134 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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136 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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138 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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140 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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143 /* When the task starts is will expect to find the function parameter in
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145 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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148 /* The last thing onto the stack is the status register, which is set for
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149 system mode, with interrupts enabled. */
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150 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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152 #ifdef THUMB_INTERWORK
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154 /* We want the task to start in thumb mode. */
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155 *pxTopOfStack |= portTHUMB_MODE_BIT;
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161 /* Some optimisation levels use the stack differently to others. This
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162 means the interrupt flags cannot always be stored on the stack and will
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163 instead be stored in a variable, which is then saved as part of the
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165 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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167 return pxTopOfStack;
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169 /*-----------------------------------------------------------*/
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171 portBASE_TYPE xPortStartScheduler( void )
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173 /* Start the timer that generates the tick ISR. Interrupts are disabled
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175 prvSetupTimerInterrupt();
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177 /* Start the first task. */
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178 vPortISRStartFirstTask();
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180 /* Should not get here! */
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183 /*-----------------------------------------------------------*/
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185 void vPortEndScheduler( void )
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187 /* It is unlikely that the ARM port will require this function as there
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188 is nothing to return to. */
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190 /*-----------------------------------------------------------*/
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193 * Setup the timer 0 to generate the tick interrupts at the required frequency.
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195 static void prvSetupTimerInterrupt( void )
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197 unsigned portLONG ulCompareMatch;
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199 /* A 1ms tick does not require the use of the timer prescale. This is
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200 defaulted to zero but can be used if necessary. */
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201 T0_PR = portPRESCALE_VALUE;
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203 /* Calculate the match value required for our wanted tick rate. */
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204 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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206 /* Protect against divide by zero. Using an if() statement still results
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207 in a warning - hence the #if. */
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208 #if portPRESCALE_VALUE != 0
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210 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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213 T0_MR0 = ulCompareMatch;
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215 /* Generate tick with timer 0 compare match. */
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216 T0_MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH;
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218 /* Setup the VIC for the timer. */
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219 VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT );
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220 VICIntEnable |= portTIMER_VIC_CHANNEL_BIT;
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222 /* The ISR installed depends on whether the preemptive or cooperative
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223 scheduler is being used. */
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224 #if configUSE_PREEMPTION == 1
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226 extern void ( vPreemptiveTick )( void );
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227 VICVectAddr0 = ( portLONG ) vPreemptiveTick;
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231 extern void ( vNonPreemptiveTick )( void );
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232 VICVectAddr0 = ( portLONG ) vNonPreemptiveTick;
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236 VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE;
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238 /* Start the timer - interrupts are disabled when this function is called
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239 so it is okay to do this here. */
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240 T0_TCR = portENABLE_TIMER;
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242 /*-----------------------------------------------------------*/
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