2 FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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49 /*-----------------------------------------------------------
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50 * Implementation of functions defined in portable.h for the ARM7 port.
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52 * Components that can be compiled to either ARM or THUMB mode are
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53 * contained in this file. The ISR routines, which can only be compiled
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54 * to ARM mode are contained in portISR.c.
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55 *----------------------------------------------------------*/
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58 /* Standard includes. */
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61 /* Scheduler includes. */
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62 #include "FreeRTOS.h"
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65 /* Constants required to setup the task context. */
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66 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
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67 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
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68 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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69 #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 )
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71 /* Constants required to setup the tick ISR. */
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72 #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 )
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73 #define portPRESCALE_VALUE 0x00
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74 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 )
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75 #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 )
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77 /* Constants required to setup the VIC for the tick ISR. */
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78 #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 )
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79 #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 )
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80 #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 )
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82 /*-----------------------------------------------------------*/
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84 /* Setup the timer to generate the tick interrupts. */
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85 static void prvSetupTimerInterrupt( void );
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88 * The scheduler can only be started from ARM mode, so
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89 * vPortISRStartFirstSTask() is defined in portISR.c.
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91 extern void vPortISRStartFirstTask( void );
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93 /*-----------------------------------------------------------*/
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96 * Initialise the stack of a task to look exactly as if a call to
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97 * portSAVE_CONTEXT had been called.
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99 * See header file for description.
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101 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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103 portSTACK_TYPE *pxOriginalTOS;
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105 pxOriginalTOS = pxTopOfStack;
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107 /* Setup the initial stack of the task. The stack is set exactly as
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108 expected by the portRESTORE_CONTEXT() macro. */
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110 /* First on the stack is the return address - which in this case is the
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111 start of the task. The offset is added to make the return address appear
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112 as it would within an IRQ ISR. */
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113 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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116 *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */
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118 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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120 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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122 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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124 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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126 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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128 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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130 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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132 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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134 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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136 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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138 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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140 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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142 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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145 /* When the task starts is will expect to find the function parameter in
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147 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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150 /* The last thing onto the stack is the status register, which is set for
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151 system mode, with interrupts enabled. */
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152 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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154 #ifdef THUMB_INTERWORK
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156 /* We want the task to start in thumb mode. */
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157 *pxTopOfStack |= portTHUMB_MODE_BIT;
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163 /* Some optimisation levels use the stack differently to others. This
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164 means the interrupt flags cannot always be stored on the stack and will
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165 instead be stored in a variable, which is then saved as part of the
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167 *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
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169 return pxTopOfStack;
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171 /*-----------------------------------------------------------*/
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173 portBASE_TYPE xPortStartScheduler( void )
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175 /* Start the timer that generates the tick ISR. Interrupts are disabled
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177 prvSetupTimerInterrupt();
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179 /* Start the first task. */
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180 vPortISRStartFirstTask();
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182 /* Should not get here! */
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185 /*-----------------------------------------------------------*/
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187 void vPortEndScheduler( void )
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189 /* It is unlikely that the ARM port will require this function as there
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190 is nothing to return to. */
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192 /*-----------------------------------------------------------*/
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195 * Setup the timer 0 to generate the tick interrupts at the required frequency.
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197 static void prvSetupTimerInterrupt( void )
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199 unsigned portLONG ulCompareMatch;
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201 PCLKSEL0 = (PCLKSEL0 & (~(0x3<<2))) | (0x01 << 2);
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202 T0TCR = 2; /* Stop and reset the timer */
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203 T0CTCR = 0; /* Timer mode */
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205 /* A 1ms tick does not require the use of the timer prescale. This is
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206 defaulted to zero but can be used if necessary. */
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207 T0PR = portPRESCALE_VALUE;
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209 /* Calculate the match value required for our wanted tick rate. */
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210 ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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212 /* Protect against divide by zero. Using an if() statement still results
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213 in a warning - hence the #if. */
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214 #if portPRESCALE_VALUE != 0
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216 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
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219 T0MR1 = ulCompareMatch;
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221 /* Generate tick with timer 0 compare match. */
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222 T0MCR = (3 << 3); /* Reset timer on match and generate interrupt */
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224 /* Setup the VIC for the timer. */
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225 VICIntEnable = 0x00000010;
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227 /* The ISR installed depends on whether the preemptive or cooperative
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228 scheduler is being used. */
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229 #if configUSE_PREEMPTION == 1
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231 extern void ( vPreemptiveTick )( void );
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232 VICVectAddr4 = ( portLONG ) vPreemptiveTick;
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236 extern void ( vNonPreemptiveTick )( void );
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237 VICVectAddr4 = ( portLONG ) vNonPreemptiveTick;
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243 /* Start the timer - interrupts are disabled when this function is called
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244 so it is okay to do this here. */
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245 T0TCR = portENABLE_TIMER;
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247 /*-----------------------------------------------------------*/
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