2 FreeRTOS V7.1.1 - Copyright (C) 2012 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 ***************************************************************************
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46 * Having a problem? Start by reading the FAQ "My application does *
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47 * not run, what could be wrong? *
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49 * http://www.FreeRTOS.org/FAQHelp.html *
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51 ***************************************************************************
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54 http://www.FreeRTOS.org - Documentation, training, latest information,
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55 license and contact details.
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57 http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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58 including FreeRTOS+Trace - an indispensable productivity tool.
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60 Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell
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61 the code with commercial support, indemnification, and middleware, under
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62 the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also
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63 provide a safety engineered and independently SIL3 certified version under
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64 the SafeRTOS brand: http://www.SafeRTOS.com.
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67 /*-----------------------------------------------------------
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68 * Implementation of functions defined in portable.h for the ARM CM0 port.
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69 *----------------------------------------------------------*/
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71 /* Scheduler includes. */
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72 #include "FreeRTOS.h"
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75 /* Constants required to manipulate the NVIC. */
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76 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long *) 0xe000e010 )
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77 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long *) 0xe000e014 )
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78 #define portNVIC_INT_CTRL ( ( volatile unsigned long *) 0xe000ed04 )
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79 #define portNVIC_SYSPRI2 ( ( volatile unsigned long *) 0xe000ed20 )
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80 #define portNVIC_SYSTICK_CLK 0x00000004
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81 #define portNVIC_SYSTICK_INT 0x00000002
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82 #define portNVIC_SYSTICK_ENABLE 0x00000001
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83 #define portNVIC_PENDSVSET 0x10000000
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84 #define portMIN_INTERRUPT_PRIORITY ( 255UL )
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85 #define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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86 #define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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88 /* Constants required to set up the initial stack. */
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89 #define portINITIAL_XPSR ( 0x01000000 )
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91 /* Each task maintains its own interrupt status in the critical nesting
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93 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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96 * Setup the timer to generate the tick interrupts.
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98 static void prvSetupTimerInterrupt( void );
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101 * Exception handlers.
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103 void xPortPendSVHandler( void ) __attribute__ (( naked ));
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104 void xPortSysTickHandler( void );
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105 void vPortSVCHandler( void ) __attribute__ (( naked ));
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108 * Start first task is a separate function so it can be tested in isolation.
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110 static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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112 /*-----------------------------------------------------------*/
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115 * See header file for description.
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117 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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119 /* Simulate the stack frame as it would be created by a context switch
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121 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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122 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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124 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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125 pxTopOfStack -= 6; /* LR, R12, R3..R1 */
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126 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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127 pxTopOfStack -= 8; /* R11..R4. */
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129 return pxTopOfStack;
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131 /*-----------------------------------------------------------*/
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133 void vPortSVCHandler( void )
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136 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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137 " ldr r1, [r3] \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
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138 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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139 " add r0, r0, #16 \n" /* Move to the high registers. */
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140 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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146 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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148 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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149 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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150 " mov r1, r14 \n" /* OR R14 with 0x0d. */
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151 " movs r0, #0x0d \n"
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156 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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159 /*-----------------------------------------------------------*/
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161 void vPortStartFirstTask( void )
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164 " movs r0, #0x00 \n" /* Locate the top of stack. */
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166 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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167 " cpsie i \n" /* Globally enable interrupts. */
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168 " svc 0 \n" /* System call to start first task. */
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172 /*-----------------------------------------------------------*/
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175 * See header file for description.
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177 portBASE_TYPE xPortStartScheduler( void )
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179 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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180 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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181 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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183 /* Start the timer that generates the tick ISR. Interrupts are disabled
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185 prvSetupTimerInterrupt();
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187 /* Initialise the critical nesting count ready for the first task. */
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188 uxCriticalNesting = 0;
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190 /* Start the first task. */
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191 vPortStartFirstTask();
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193 /* Should not get here! */
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196 /*-----------------------------------------------------------*/
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198 void vPortEndScheduler( void )
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200 /* It is unlikely that the CM0 port will require this function as there
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201 is nothing to return to. */
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203 /*-----------------------------------------------------------*/
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205 void vPortYieldFromISR( void )
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207 /* Set a PendSV to request a context switch. */
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208 *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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210 /*-----------------------------------------------------------*/
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212 void vPortEnterCritical( void )
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214 portDISABLE_INTERRUPTS();
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215 uxCriticalNesting++;
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217 /*-----------------------------------------------------------*/
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219 void vPortExitCritical( void )
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221 uxCriticalNesting--;
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222 if( uxCriticalNesting == 0 )
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224 portENABLE_INTERRUPTS();
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227 /*-----------------------------------------------------------*/
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229 void xPortPendSVHandler( void )
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231 /* This is a naked function. */
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237 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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240 " sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
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241 " str r0, [r2] \n" /* Save the new top of stack. */
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242 " stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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243 " mov r4, r8 \n" /* Store the high registers. */
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247 " stmia r0!, {r4-r7} \n"
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249 " push {r3, r14} \n"
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251 " bl vTaskSwitchContext \n"
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253 " pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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256 " ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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257 " add r0, r0, #16 \n" /* Move to the high registers. */
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258 " ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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264 " msr psp, r0 \n" /* Remember the new top of stack for the task. */
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266 " sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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267 " ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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272 "pxCurrentTCBConst: .word pxCurrentTCB "
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275 /*-----------------------------------------------------------*/
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277 void xPortSysTickHandler( void )
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279 unsigned long ulDummy;
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281 /* If using preemption, also force a context switch. */
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282 #if configUSE_PREEMPTION == 1
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283 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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286 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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288 vTaskIncrementTick();
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290 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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292 /*-----------------------------------------------------------*/
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295 * Setup the systick timer to generate the tick interrupts at the required
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298 void prvSetupTimerInterrupt( void )
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300 /* Configure SysTick to interrupt at the requested rate. */
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301 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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302 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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304 /*-----------------------------------------------------------*/
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