git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
   3 \r
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  24 \r
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  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
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  37     License and the FreeRTOS license exception along with FreeRTOS; if not it \r
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  39     by writing to Richard Barry, contact details for whom are available on the\r
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  41 \r
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  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
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  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
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  52 */\r
  53 \r
  54 /*-----------------------------------------------------------\r
  55  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  56  *----------------------------------------------------------*/\r
  57 \r
  58 /* Scheduler includes. */\r
  59 #include "FreeRTOS.h"\r
  60 #include "task.h"\r
  61 \r
  62 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
  63 defined.  The value should also ensure backward compatibility.\r
  64 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
  65 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
  66         #define configKERNEL_INTERRUPT_PRIORITY 255\r
  67 #endif\r
  68 \r
  69 /* Constants required to manipulate the NVIC. */\r
  70 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned long *) 0xe000e010 )\r
  71 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned long *) 0xe000e014 )\r
  72 #define portNVIC_INT_CTRL                       ( ( volatile unsigned long *) 0xe000ed04 )\r
  73 #define portNVIC_SYSPRI2                        ( ( volatile unsigned long *) 0xe000ed20 )\r
  74 #define portNVIC_SYSTICK_CLK            0x00000004\r
  75 #define portNVIC_SYSTICK_INT            0x00000002\r
  76 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  77 #define portNVIC_PENDSVSET                      0x10000000\r
  78 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  79 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  80 \r
  81 /* Constants required to set up the initial stack. */\r
  82 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  83 \r
  84 /* The priority used by the kernel is assigned to a variable to make access\r
  85 from inline assembler easier. */\r
  86 const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  87 \r
  88 /* Each task maintains its own interrupt status in the critical nesting\r
  89 variable. */\r
  90 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  91 \r
  92 /*\r
  93  * Setup the timer to generate the tick interrupts.\r
  94  */\r
  95 static void prvSetupTimerInterrupt( void );\r
  96 \r
  97 /*\r
  98  * Exception handlers.\r
  99  */\r
 100 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 101 void xPortSysTickHandler( void );\r
 102 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 103 \r
 104 /*\r
 105  * Start first task is a separate function so it can be tested in isolation.\r
 106  */\r
 107 void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
 108 \r
 109 /*-----------------------------------------------------------*/\r
 110 \r
 111 /*\r
 112  * See header file for description.\r
 113  */\r
 114 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 115 {\r
 116         /* Simulate the stack frame as it would be created by a context switch\r
 117         interrupt. */\r
 118         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 119         pxTopOfStack--;\r
 120         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 121         pxTopOfStack--;\r
 122         *pxTopOfStack = 0;      /* LR */\r
 123         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 124         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 125         pxTopOfStack -= 8;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 126 \r
 127         return pxTopOfStack;\r
 128 }\r
 129 /*-----------------------------------------------------------*/\r
 130 \r
 131 void vPortSVCHandler( void )\r
 132 {\r
 133         __asm volatile (\r
 134                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 135                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 136                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 137                                         "       ldmia r0!, {r4-r11}                             \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
 138                                         "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 139                                         "       mov r0, #0                                              \n"\r
 140                                         "       msr     basepri, r0                                     \n"\r
 141                                         "       orr r14, #0xd                                   \n"\r
 142                                         "       bx r14                                                  \n"\r
 143                                         "                                                                       \n"\r
 144                                         "       .align 2                                                \n"\r
 145                                         "pxCurrentTCBConst2: .word pxCurrentTCB                         \n"\r
 146                                 );\r
 147 }\r
 148 /*-----------------------------------------------------------*/\r
 149 \r
 150 void vPortStartFirstTask( void )\r
 151 {\r
 152         __asm volatile(\r
 153                                         " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
 154                                         " ldr r0, [r0]                  \n"\r
 155                                         " ldr r0, [r0]                  \n"\r
 156                                         " msr msp, r0                   \n" /* Set the msp back to the start of the stack. */\r
 157                                         " svc 0                                 \n" /* System call to start first task. */\r
 158                                 );\r
 159 }\r
 160 /*-----------------------------------------------------------*/\r
 161 \r
 162 /*\r
 163  * See header file for description.\r
 164  */\r
 165 portBASE_TYPE xPortStartScheduler( void )\r
 166 {\r
 167         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 168         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 169         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 170 \r
 171         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 172         here already. */\r
 173         prvSetupTimerInterrupt();\r
 174 \r
 175         /* Initialise the critical nesting count ready for the first task. */\r
 176         uxCriticalNesting = 0;\r
 177 \r
 178         /* Start the first task. */\r
 179         vPortStartFirstTask();\r
 180 \r
 181         /* Should not get here! */\r
 182         return 0;\r
 183 }\r
 184 /*-----------------------------------------------------------*/\r
 185 \r
 186 void vPortEndScheduler( void )\r
 187 {\r
 188         /* It is unlikely that the CM3 port will require this function as there\r
 189         is nothing to return to.  */\r
 190 }\r
 191 /*-----------------------------------------------------------*/\r
 192 \r
 193 void vPortYieldFromISR( void )\r
 194 {\r
 195         /* Set a PendSV to request a context switch. */\r
 196         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 197 }\r
 198 /*-----------------------------------------------------------*/\r
 199 \r
 200 void vPortEnterCritical( void )\r
 201 {\r
 202         portDISABLE_INTERRUPTS();\r
 203         uxCriticalNesting++;\r
 204 }\r
 205 /*-----------------------------------------------------------*/\r
 206 \r
 207 void vPortExitCritical( void )\r
 208 {\r
 209         uxCriticalNesting--;\r
 210         if( uxCriticalNesting == 0 )\r
 211         {\r
 212                 portENABLE_INTERRUPTS();\r
 213         }\r
 214 }\r
 215 /*-----------------------------------------------------------*/\r
 216 \r
 217 void xPortPendSVHandler( void )\r
 218 {\r
 219         /* This is a naked function. */\r
 220 \r
 221         __asm volatile\r
 222         (\r
 223         "       mrs r0, psp                                                     \n"\r
 224         "                                                                               \n"\r
 225         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 226         "       ldr     r2, [r3]                                                \n"\r
 227         "                                                                               \n"\r
 228         "       stmdb r0!, {r4-r11}                                     \n" /* Save the remaining registers. */\r
 229         "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 230         "                                                                               \n"\r
 231         "       stmdb sp!, {r3, r14}                            \n"\r
 232         "       mov r0, %0                                                      \n"\r
 233         "       msr basepri, r0                                         \n"\r
 234         "       bl vTaskSwitchContext                           \n"\r
 235         "       mov r0, #0                                                      \n"\r
 236         "       msr basepri, r0                                         \n"\r
 237         "       ldmia sp!, {r3, r14}                            \n"\r
 238         "                                                                               \n"     /* Restore the context, including the critical nesting count. */\r
 239         "       ldr r1, [r3]                                            \n"\r
 240         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 241         "       ldmia r0!, {r4-r11}                                     \n" /* Pop the registers. */\r
 242         "       msr psp, r0                                                     \n"\r
 243         "       bx r14                                                          \n"\r
 244         "                                                                               \n"\r
 245         "       .align 2                                                        \n"\r
 246         "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 247         ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 248         );\r
 249 }\r
 250 /*-----------------------------------------------------------*/\r
 251 \r
 252 void xPortSysTickHandler( void )\r
 253 {\r
 254 unsigned long ulDummy;\r
 255 \r
 256         /* If using preemption, also force a context switch. */\r
 257         #if configUSE_PREEMPTION == 1\r
 258                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 259         #endif\r
 260 \r
 261         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 262         {\r
 263                 vTaskIncrementTick();\r
 264         }\r
 265         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 266 }\r
 267 /*-----------------------------------------------------------*/\r
 268 \r
 269 /*\r
 270  * Setup the systick timer to generate the tick interrupts at the required\r
 271  * frequency.\r
 272  */\r
 273 void prvSetupTimerInterrupt( void )\r
 274 {\r
 275         /* Configure SysTick to interrupt at the requested rate. */\r
 276         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 277         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 278 }\r
 279 /*-----------------------------------------------------------*/\r
 280 \r