git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2         FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27 \r
  28         Please ensure to read the configuration and relevant port sections of the \r
  29         online documentation.\r
  30 \r
  31         +++ http://www.FreeRTOS.org +++\r
  32         Documentation, latest information, license and contact details.  \r
  33 \r
  34         +++ http://www.SafeRTOS.com +++\r
  35         A version that is certified for use in safety critical systems.\r
  36 \r
  37         +++ http://www.OpenRTOS.com +++\r
  38         Commercial support, development, porting, licensing and training services.\r
  39 \r
  40         ***************************************************************************\r
  41 */\r
  42 \r
  43 /*\r
  44         Changes between V4.0.0 and V4.0.1\r
  45 \r
  46         + Reduced the code used to setup the initial stack frame.\r
  47         + The kernel no longer has to install or handle the fault interrupt.\r
  48         \r
  49         Change from V4.4.0:\r
  50 \r
  51         + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the\r
  52           interrupt priority used by the kernel.\r
  53 */\r
  54 \r
  55 \r
  56 /*-----------------------------------------------------------\r
  57  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  58  *----------------------------------------------------------*/\r
  59 \r
  60 /* Scheduler includes. */\r
  61 #include "FreeRTOS.h"\r
  62 #include "task.h"\r
  63 \r
  64 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is \r
  65 defined.  The value should also ensure backward compatibility.  \r
  66 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
  67 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
  68         #define configKERNEL_INTERRUPT_PRIORITY 255\r
  69 #endif\r
  70 \r
  71 /* Constants required to manipulate the NVIC. */\r
  72 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned portLONG *) 0xe000e010 )\r
  73 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned portLONG *) 0xe000e014 )\r
  74 #define portNVIC_INT_CTRL                       ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
  75 #define portNVIC_SYSPRI2                        ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
  76 #define portNVIC_SYSTICK_CLK            0x00000004\r
  77 #define portNVIC_SYSTICK_INT            0x00000002\r
  78 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  79 #define portNVIC_PENDSVSET                      0x10000000\r
  80 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  81 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  82 \r
  83 /* Constants required to set up the initial stack. */\r
  84 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  85 \r
  86 /* The priority used by the kernel is assigned to a variable to make access\r
  87 from inline assembler easier. */\r
  88 const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  89 \r
  90 /* Each task maintains its own interrupt status in the critical nesting\r
  91 variable. */\r
  92 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  93 \r
  94 /* \r
  95  * Setup the timer to generate the tick interrupts.\r
  96  */\r
  97 static void prvSetupTimerInterrupt( void );\r
  98 \r
  99 /*\r
 100  * Exception handlers.\r
 101  */\r
 102 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 103 void xPortSysTickHandler( void ) __attribute__ (( naked ));\r
 104 \r
 105 /*\r
 106  * Set the MSP/PSP to a known value.\r
 107  */\r
 108 void prvSetMSP( unsigned long ulValue ) __attribute__ (( naked ));\r
 109 void prvSetPSP( unsigned long ulValue ) __attribute__ (( naked )); \r
 110 \r
 111 /*-----------------------------------------------------------*/\r
 112 \r
 113 /* \r
 114  * See header file for description. \r
 115  */\r
 116 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 117 {\r
 118         /* Simulate the stack frame as it would be created by a context switch\r
 119         interrupt. */\r
 120         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 121         pxTopOfStack--;\r
 122         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 123         pxTopOfStack--;\r
 124         *pxTopOfStack = 0;      /* LR */\r
 125         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 126         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 127         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 128         *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */\r
 129 \r
 130         return pxTopOfStack;\r
 131 }\r
 132 /*-----------------------------------------------------------*/\r
 133 \r
 134 void prvSetPSP( unsigned long ulValue )\r
 135 {\r
 136         asm volatile( "msr psp, r0" );\r
 137         asm volatile( "bx lr" );\r
 138 }\r
 139 /*-----------------------------------------------------------*/\r
 140 \r
 141 void prvSetMSP( unsigned long ulValue )\r
 142 {\r
 143         asm volatile( "msr msp, r0" );\r
 144         asm volatile( "bx lr" );\r
 145 }\r
 146 /*-----------------------------------------------------------*/\r
 147 \r
 148 /* \r
 149  * See header file for description. \r
 150  */\r
 151 portBASE_TYPE xPortStartScheduler( void )\r
 152 {\r
 153         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 154         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 155         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 156 \r
 157         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 158         here already. */\r
 159         prvSetupTimerInterrupt();\r
 160         \r
 161         /* Start the first task. */\r
 162         prvSetPSP( 0 );\r
 163         prvSetMSP( *((unsigned portLONG *) 0 ) );\r
 164         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 165 \r
 166         /* Enable interrupts */\r
 167         portENABLE_INTERRUPTS();\r
 168 \r
 169         /* Should not get here! */\r
 170         return 0;\r
 171 }\r
 172 /*-----------------------------------------------------------*/\r
 173 \r
 174 void vPortEndScheduler( void )\r
 175 {\r
 176         /* It is unlikely that the CM3 port will require this function as there\r
 177         is nothing to return to.  */\r
 178 }\r
 179 /*-----------------------------------------------------------*/\r
 180 \r
 181 void vPortYieldFromISR( void )\r
 182 {\r
 183         /* Set a PendSV to request a context switch. */\r
 184         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 185 \r
 186         /* This function is also called in response to a Yield(), so we want\r
 187         the yield to occur immediately. */\r
 188         portENABLE_INTERRUPTS();\r
 189 }\r
 190 /*-----------------------------------------------------------*/\r
 191 \r
 192 void vPortEnterCritical( void )\r
 193 {\r
 194         portDISABLE_INTERRUPTS();\r
 195         uxCriticalNesting++;\r
 196 }\r
 197 /*-----------------------------------------------------------*/\r
 198 \r
 199 void vPortExitCritical( void )\r
 200 {\r
 201         uxCriticalNesting--;\r
 202         if( uxCriticalNesting == 0 )\r
 203         {\r
 204                 portENABLE_INTERRUPTS();\r
 205         }\r
 206 }\r
 207 /*-----------------------------------------------------------*/\r
 208 \r
 209 void xPortPendSVHandler( void )\r
 210 {\r
 211         /* Start first task if the stack has not yet been setup. */\r
 212         __asm volatile\r
 213         ( \r
 214         "       mrs r0, psp                                             \n"\r
 215         "       cbz r0, no_save                                 \n"\r
 216         "                                                                       \n"     /* Save the context into the TCB. */                                    \r
 217         "       stmdb r0!, {r4-r11}                             \n"\r
 218         "       sub r0, #0x04                                   \n"\r
 219         "       ldr r1, uxCriticalNestingConst  \n"\r
 220         "       ldr r2, pxCurrentTCBConst               \n"\r
 221         "       ldr r1, [r1]                                    \n"\r
 222         "       ldr r2, [r2]                                    \n"\r
 223         "       str r1, [r0]                                    \n"                     \r
 224         "       str r0, [r2]                                    \n"\r
 225         "                                                                       \n"\r
 226         "no_save:\n"    \r
 227         "       push {r14}                                              \n"\r
 228         "       bl vPortSwitchContext                   \n"\r
 229         "       pop {r14}                                               \n"\r
 230         "                                                                       \n"     /* Restore the context. */      \r
 231         "       ldr r1, pxCurrentTCBConst               \n"\r
 232         "       ldr r1, [r1]                                    \n"\r
 233         "       ldr r0, [r1]                                    \n"\r
 234         "       ldmia r0!, {r1, r4-r11}                 \n"\r
 235         "       ldr r2, uxCriticalNestingConst  \n"\r
 236         "       str r1, [r2]                                    \n"\r
 237         "       msr psp, r0                                             \n"\r
 238         "       orr r14, #0xd                                   \n"\r
 239         "                                                                       \n"     /* Exit with interrupts in the state required by the task. */   \r
 240         "       cbnz r1, sv_disable_interrupts  \n"\r
 241         "       bx r14                                                  \n"\r
 242         "                                                                       \n"\r
 243         "sv_disable_interrupts:                         \n"\r
 244         "       ldr r1, =ulKernelPriority               \n"\r
 245         "       ldr r1, [r1]                                    \n"\r
 246         "       msr     basepri, r1                                     \n"\r
 247         "       bx r14                                                  \n"\r
 248         "                                                                       \n"\r
 249         "       .align 2                                                \n"\r
 250         "pxCurrentTCBConst: .word pxCurrentTCB                          \n"\r
 251         "uxCriticalNestingConst: .word uxCriticalNesting        \n"\r
 252         );\r
 253 }\r
 254 /*-----------------------------------------------------------*/\r
 255 \r
 256 void xPortSysTickHandler( void )\r
 257 {\r
 258         extern void vTaskIncrementTick( void );\r
 259         extern void vPortYieldFromISR( void );\r
 260 \r
 261         /* Call the scheduler tick function. */\r
 262         __asm volatile\r
 263         ( \r
 264         "       push {r14}                                                      \n"\r
 265         "       bl vPortIncrementTick                           \n"\r
 266         "       pop {r14}" \r
 267         );\r
 268 \r
 269         /* If using preemption, also force a context switch. */\r
 270         #if configUSE_PREEMPTION == 1\r
 271         __asm volatile\r
 272         ( \r
 273         "       push {r14}                                                      \n"\r
 274         "       bl vPortYieldFromISR                            \n"\r
 275         "       pop {r14}" \r
 276         );\r
 277         #endif\r
 278 \r
 279         /* Exit with interrupts in the correct state. */\r
 280         __asm volatile\r
 281         (\r
 282         "    ldr r2, uxCriticalNestingConst2    \n" \r
 283         "    ldr r2, [r2]                                               \n"\r
 284         "    cbnz r2, tick_disable_interrupts   \n"\r
 285         "    bx r14" \r
 286         );\r
 287 \r
 288    __asm volatile\r
 289    (\r
 290         "tick_disable_interrupts:                               \n"\r
 291         "       ldr r1, =ulKernelPriority                       \n"\r
 292         "       ldr r1, [r1]                                            \n"\r
 293         "       msr     basepri, r1                                             \n"\r
 294         "    bx r14                                                             \n"\r
 295         "                                                                               \n"\r
 296         "       .align 2                                                        \n"\r
 297         "uxCriticalNestingConst2: .word uxCriticalNesting"\r
 298         );\r
 299 }\r
 300 /*-----------------------------------------------------------*/\r
 301 \r
 302 /*\r
 303  * Setup the systick timer to generate the tick interrupts at the required\r
 304  * frequency.\r
 305  */\r
 306 void prvSetupTimerInterrupt( void )\r
 307 {\r
 308         /* Configure SysTick to interrupt at the requested rate. */\r
 309         *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
 310         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 311 }\r
 312 /*-----------------------------------------------------------*/\r
 313 \r
 314 void vPortSwitchContext( void )\r
 315 {\r
 316         vPortSetInterruptMask();\r
 317         vTaskSwitchContext();\r
 318         vPortClearInterruptMask();\r
 319 }\r
 320 /*-----------------------------------------------------------*/\r
 321 \r
 322 void vPortIncrementTick( void )\r
 323 {\r
 324         vPortSetInterruptMask();\r
 325         vTaskIncrementTick();\r
 326         vPortClearInterruptMask();\r
 327 }\r
 328 \r
 329 /*-----------------------------------------------------------*/\r
 330 \r