git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2         FreeRTOS.org V4.6.1 - Copyright (C) 2003-2007 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27         See http://www.FreeRTOS.org for documentation, latest information, license \r
  28         and contact details.  Please ensure to read the configuration and relevant \r
  29         port sections of the online documentation.\r
  30 \r
  31         Also see http://www.SafeRTOS.com a version that has been certified for use\r
  32         in safety critical systems, plus commercial licensing, development and\r
  33         support options.\r
  34         ***************************************************************************\r
  35 */\r
  36 \r
  37 /*\r
  38         Changes between V4.0.0 and V4.0.1\r
  39 \r
  40         + Reduced the code used to setup the initial stack frame.\r
  41         + The kernel no longer has to install or handle the fault interrupt.\r
  42         \r
  43         Change from V4.4.0:\r
  44 \r
  45         + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the\r
  46           interrupt priority used by the kernel.\r
  47 */\r
  48 \r
  49 \r
  50 /*-----------------------------------------------------------\r
  51  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  52  *----------------------------------------------------------*/\r
  53 \r
  54 /* Scheduler includes. */\r
  55 #include "FreeRTOS.h"\r
  56 #include "task.h"\r
  57 \r
  58 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is \r
  59 defined.  The value should also ensure backward compatibility.  \r
  60 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
  61 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
  62         #define configKERNEL_INTERRUPT_PRIORITY 255\r
  63 #endif\r
  64 \r
  65 /* Constants required to manipulate the NVIC. */\r
  66 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned portLONG *) 0xe000e010 )\r
  67 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned portLONG *) 0xe000e014 )\r
  68 #define portNVIC_INT_CTRL                       ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
  69 #define portNVIC_SYSPRI2                        ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
  70 #define portNVIC_SYSTICK_CLK            0x00000004\r
  71 #define portNVIC_SYSTICK_INT            0x00000002\r
  72 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  73 #define portNVIC_PENDSVSET                      0x10000000\r
  74 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  75 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  76 \r
  77 /* Constants required to set up the initial stack. */\r
  78 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  79 \r
  80 /* The priority used by the kernel is assigned to a variable to make access\r
  81 from inline assembler easier. */\r
  82 const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  83 \r
  84 /* Each task maintains its own interrupt status in the critical nesting\r
  85 variable. */\r
  86 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  87 \r
  88 /* \r
  89  * Setup the timer to generate the tick interrupts.\r
  90  */\r
  91 static void prvSetupTimerInterrupt( void );\r
  92 \r
  93 /*\r
  94  * Exception handlers.\r
  95  */\r
  96 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
  97 void xPortSysTickHandler( void ) __attribute__ (( naked ));\r
  98 \r
  99 /*\r
 100  * Set the MSP/PSP to a known value.\r
 101  */\r
 102 void prvSetMSP( unsigned long ulValue ) __attribute__ (( naked ));\r
 103 void prvSetPSP( unsigned long ulValue ) __attribute__ (( naked )); \r
 104 \r
 105 /*-----------------------------------------------------------*/\r
 106 \r
 107 /* \r
 108  * See header file for description. \r
 109  */\r
 110 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 111 {\r
 112         /* Simulate the stack frame as it would be created by a context switch\r
 113         interrupt. */\r
 114         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 115         pxTopOfStack--;\r
 116         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 117         pxTopOfStack--;\r
 118         *pxTopOfStack = 0;      /* LR */\r
 119         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 120         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 121         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 122         *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */\r
 123 \r
 124         return pxTopOfStack;\r
 125 }\r
 126 /*-----------------------------------------------------------*/\r
 127 \r
 128 void prvSetPSP( unsigned long ulValue )\r
 129 {\r
 130         asm volatile( "msr psp, r0" );\r
 131         asm volatile( "bx lr" );\r
 132 }\r
 133 /*-----------------------------------------------------------*/\r
 134 \r
 135 void prvSetMSP( unsigned long ulValue )\r
 136 {\r
 137         asm volatile( "msr msp, r0" );\r
 138         asm volatile( "bx lr" );\r
 139 }\r
 140 /*-----------------------------------------------------------*/\r
 141 \r
 142 /* \r
 143  * See header file for description. \r
 144  */\r
 145 portBASE_TYPE xPortStartScheduler( void )\r
 146 {\r
 147         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 148         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 149         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 150 \r
 151         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 152         here already. */\r
 153         prvSetupTimerInterrupt();\r
 154         \r
 155         /* Start the first task. */\r
 156         prvSetPSP( 0 );\r
 157         prvSetMSP( *((unsigned portLONG *) 0 ) );\r
 158         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 159 \r
 160         /* Enable interrupts */\r
 161         portENABLE_INTERRUPTS();\r
 162 \r
 163         /* Should not get here! */\r
 164         return 0;\r
 165 }\r
 166 /*-----------------------------------------------------------*/\r
 167 \r
 168 void vPortEndScheduler( void )\r
 169 {\r
 170         /* It is unlikely that the CM3 port will require this function as there\r
 171         is nothing to return to.  */\r
 172 }\r
 173 /*-----------------------------------------------------------*/\r
 174 \r
 175 void vPortYieldFromISR( void )\r
 176 {\r
 177         /* Set a PendSV to request a context switch. */\r
 178         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 179 \r
 180         /* This function is also called in response to a Yield(), so we want\r
 181         the yield to occur immediately. */\r
 182         portENABLE_INTERRUPTS();\r
 183 }\r
 184 /*-----------------------------------------------------------*/\r
 185 \r
 186 void vPortEnterCritical( void )\r
 187 {\r
 188         portDISABLE_INTERRUPTS();\r
 189         uxCriticalNesting++;\r
 190 }\r
 191 /*-----------------------------------------------------------*/\r
 192 \r
 193 void vPortExitCritical( void )\r
 194 {\r
 195         uxCriticalNesting--;\r
 196         if( uxCriticalNesting == 0 )\r
 197         {\r
 198                 portENABLE_INTERRUPTS();\r
 199         }\r
 200 }\r
 201 /*-----------------------------------------------------------*/\r
 202 \r
 203 void xPortPendSVHandler( void )\r
 204 {\r
 205         /* Start first task if the stack has not yet been setup. */\r
 206         __asm volatile\r
 207         ( \r
 208         "       mrs r0, psp                                             \n"\r
 209         "       cbz r0, no_save                                 \n"\r
 210         "                                                                       \n"     /* Save the context into the TCB. */                                    \r
 211         "       stmdb r0!, {r4-r11}                             \n"\r
 212         "       sub r0, #0x04                                   \n"\r
 213         "       ldr r1, uxCriticalNestingConst  \n"\r
 214         "       ldr r2, pxCurrentTCBConst               \n"\r
 215         "       ldr r1, [r1]                                    \n"\r
 216         "       ldr r2, [r2]                                    \n"\r
 217         "       str r1, [r0]                                    \n"                     \r
 218         "       str r0, [r2]                                    \n"\r
 219         "                                                                       \n"\r
 220         "no_save:\n"    \r
 221         "       push {r14}                                              \n"\r
 222         "       bl vPortSwitchContext                   \n"\r
 223         "       pop {r14}                                               \n"\r
 224         "                                                                       \n"     /* Restore the context. */      \r
 225         "       ldr r1, pxCurrentTCBConst               \n"\r
 226         "       ldr r1, [r1]                                    \n"\r
 227         "       ldr r0, [r1]                                    \n"\r
 228         "       ldmia r0!, {r1, r4-r11}                 \n"\r
 229         "       ldr r2, uxCriticalNestingConst  \n"\r
 230         "       str r1, [r2]                                    \n"\r
 231         "       msr psp, r0                                             \n"\r
 232         "       orr r14, #0xd                                   \n"\r
 233         "                                                                       \n"     /* Exit with interrupts in the state required by the task. */   \r
 234         "       cbnz r1, sv_disable_interrupts  \n"\r
 235         "       bx r14                                                  \n"\r
 236         "                                                                       \n"\r
 237         "sv_disable_interrupts:                         \n"\r
 238         "       ldr r1, =ulKernelPriority               \n"\r
 239         "       ldr r1, [r1]                                    \n"\r
 240         "       msr     basepri, r1                                     \n"\r
 241         "       bx r14                                                  \n"\r
 242         "                                                                       \n"\r
 243         "       .align 2                                                \n"\r
 244         "pxCurrentTCBConst: .word pxCurrentTCB                          \n"\r
 245         "uxCriticalNestingConst: .word uxCriticalNesting        \n"\r
 246         );\r
 247 }\r
 248 /*-----------------------------------------------------------*/\r
 249 \r
 250 void xPortSysTickHandler( void )\r
 251 {\r
 252         extern void vTaskIncrementTick( void );\r
 253         extern void vPortYieldFromISR( void );\r
 254 \r
 255         /* Call the scheduler tick function. */\r
 256         __asm volatile\r
 257         ( \r
 258         "       push {r14}                                                      \n"\r
 259         "       bl vPortIncrementTick                           \n"\r
 260         "       pop {r14}" \r
 261         );\r
 262 \r
 263         /* If using preemption, also force a context switch. */\r
 264         #if configUSE_PREEMPTION == 1\r
 265         __asm volatile\r
 266         ( \r
 267         "       push {r14}                                                      \n"\r
 268         "       bl vPortYieldFromISR                            \n"\r
 269         "       pop {r14}" \r
 270         );\r
 271         #endif\r
 272 \r
 273         /* Exit with interrupts in the correct state. */\r
 274         __asm volatile\r
 275         (\r
 276         "    ldr r2, uxCriticalNestingConst2    \n" \r
 277         "    ldr r2, [r2]                                               \n"\r
 278         "    cbnz r2, tick_disable_interrupts   \n"\r
 279         "    bx r14" \r
 280         );\r
 281 \r
 282    __asm volatile\r
 283    (\r
 284         "tick_disable_interrupts:                               \n"\r
 285         "       ldr r1, =ulKernelPriority                       \n"\r
 286         "       ldr r1, [r1]                                            \n"\r
 287         "       msr     basepri, r1                                             \n"\r
 288         "    bx r14                                                             \n"\r
 289         "                                                                               \n"\r
 290         "       .align 2                                                        \n"\r
 291         "uxCriticalNestingConst2: .word uxCriticalNesting"\r
 292         );\r
 293 }\r
 294 /*-----------------------------------------------------------*/\r
 295 \r
 296 /*\r
 297  * Setup the systick timer to generate the tick interrupts at the required\r
 298  * frequency.\r
 299  */\r
 300 void prvSetupTimerInterrupt( void )\r
 301 {\r
 302         /* Configure SysTick to interrupt at the requested rate. */\r
 303         *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
 304         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 305 }\r
 306 /*-----------------------------------------------------------*/\r
 307 \r
 308 void vPortSwitchContext( void )\r
 309 {\r
 310         vPortSetInterruptMask();\r
 311         vTaskSwitchContext();\r
 312         vPortClearInterruptMask();\r
 313 }\r
 314 /*-----------------------------------------------------------*/\r
 315 \r
 316 void vPortIncrementTick( void )\r
 317 {\r
 318         vPortSetInterruptMask();\r
 319         vTaskIncrementTick();\r
 320         vPortClearInterruptMask();\r
 321 }\r
 322 \r
 323 /*-----------------------------------------------------------*/\r
 324 \r