git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2         FreeRTOS.org V4.6.0 - Copyright (C) 2003-2007 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27         See http://www.FreeRTOS.org for documentation, latest information, license \r
  28         and contact details.  Please ensure to read the configuration and relevant \r
  29         port sections of the online documentation.\r
  30 \r
  31         Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
  32         with commercial development and support options.\r
  33         ***************************************************************************\r
  34 */\r
  35 \r
  36 /*\r
  37         Changes between V4.0.0 and V4.0.1\r
  38 \r
  39         + Reduced the code used to setup the initial stack frame.\r
  40         + The kernel no longer has to install or handle the fault interrupt.\r
  41         \r
  42         Change from V4.4.0:\r
  43 \r
  44         + Introduced usage of configKERNEL_INTERRUPT_PRIORITY macro to set the\r
  45           interrupt priority used by the kernel.\r
  46 */\r
  47 \r
  48 \r
  49 /*-----------------------------------------------------------\r
  50  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  51  *----------------------------------------------------------*/\r
  52 \r
  53 /* Scheduler includes. */\r
  54 #include "FreeRTOS.h"\r
  55 #include "task.h"\r
  56 \r
  57 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is \r
  58 defined.  The value should also ensure backward compatibility.  \r
  59 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
  60 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
  61         #define configKERNEL_INTERRUPT_PRIORITY 255\r
  62 #endif\r
  63 \r
  64 /* Constants required to manipulate the NVIC. */\r
  65 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned portLONG *) 0xe000e010 )\r
  66 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned portLONG *) 0xe000e014 )\r
  67 #define portNVIC_INT_CTRL                       ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
  68 #define portNVIC_SYSPRI2                        ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
  69 #define portNVIC_SYSTICK_CLK            0x00000004\r
  70 #define portNVIC_SYSTICK_INT            0x00000002\r
  71 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  72 #define portNVIC_PENDSVSET                      0x10000000\r
  73 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  74 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  75 \r
  76 /* Constants required to set up the initial stack. */\r
  77 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  78 \r
  79 /* The priority used by the kernel is assigned to a variable to make access\r
  80 from inline assembler easier. */\r
  81 const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  82 \r
  83 /* Each task maintains its own interrupt status in the critical nesting\r
  84 variable. */\r
  85 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  86 \r
  87 /* \r
  88  * Setup the timer to generate the tick interrupts.\r
  89  */\r
  90 static void prvSetupTimerInterrupt( void );\r
  91 \r
  92 /*\r
  93  * Exception handlers.\r
  94  */\r
  95 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
  96 void xPortSysTickHandler( void ) __attribute__ (( naked ));\r
  97 \r
  98 /*\r
  99  * Set the MSP/PSP to a known value.\r
 100  */\r
 101 void prvSetMSP( unsigned long ulValue ) __attribute__ (( naked ));\r
 102 void prvSetPSP( unsigned long ulValue ) __attribute__ (( naked )); \r
 103 \r
 104 /*-----------------------------------------------------------*/\r
 105 \r
 106 /* \r
 107  * See header file for description. \r
 108  */\r
 109 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 110 {\r
 111         /* Simulate the stack frame as it would be created by a context switch\r
 112         interrupt. */\r
 113         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 114         pxTopOfStack--;\r
 115         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 116         pxTopOfStack--;\r
 117         *pxTopOfStack = 0;      /* LR */\r
 118         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 119         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 120         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 121         *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */\r
 122 \r
 123         return pxTopOfStack;\r
 124 }\r
 125 /*-----------------------------------------------------------*/\r
 126 \r
 127 void prvSetPSP( unsigned long ulValue )\r
 128 {\r
 129         asm volatile( "msr psp, r0" );\r
 130         asm volatile( "bx lr" );\r
 131 }\r
 132 /*-----------------------------------------------------------*/\r
 133 \r
 134 void prvSetMSP( unsigned long ulValue )\r
 135 {\r
 136         asm volatile( "msr msp, r0" );\r
 137         asm volatile( "bx lr" );\r
 138 }\r
 139 /*-----------------------------------------------------------*/\r
 140 \r
 141 /* \r
 142  * See header file for description. \r
 143  */\r
 144 portBASE_TYPE xPortStartScheduler( void )\r
 145 {\r
 146         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 147         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 148         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 149 \r
 150         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 151         here already. */\r
 152         prvSetupTimerInterrupt();\r
 153         \r
 154         /* Start the first task. */\r
 155         prvSetPSP( 0 );\r
 156         prvSetMSP( *((unsigned portLONG *) 0 ) );\r
 157         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 158 \r
 159         /* Enable interrupts */\r
 160         portENABLE_INTERRUPTS();\r
 161 \r
 162         /* Should not get here! */\r
 163         return 0;\r
 164 }\r
 165 /*-----------------------------------------------------------*/\r
 166 \r
 167 void vPortEndScheduler( void )\r
 168 {\r
 169         /* It is unlikely that the CM3 port will require this function as there\r
 170         is nothing to return to.  */\r
 171 }\r
 172 /*-----------------------------------------------------------*/\r
 173 \r
 174 void vPortYieldFromISR( void )\r
 175 {\r
 176         /* Set a PendSV to request a context switch. */\r
 177         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 178 \r
 179         /* This function is also called in response to a Yield(), so we want\r
 180         the yield to occur immediately. */\r
 181         portENABLE_INTERRUPTS();\r
 182 }\r
 183 /*-----------------------------------------------------------*/\r
 184 \r
 185 void vPortEnterCritical( void )\r
 186 {\r
 187         portDISABLE_INTERRUPTS();\r
 188         uxCriticalNesting++;\r
 189 }\r
 190 /*-----------------------------------------------------------*/\r
 191 \r
 192 void vPortExitCritical( void )\r
 193 {\r
 194         uxCriticalNesting--;\r
 195         if( uxCriticalNesting == 0 )\r
 196         {\r
 197                 portENABLE_INTERRUPTS();\r
 198         }\r
 199 }\r
 200 /*-----------------------------------------------------------*/\r
 201 \r
 202 void xPortPendSVHandler( void )\r
 203 {\r
 204         /* Start first task if the stack has not yet been setup. */\r
 205         __asm volatile\r
 206         ( \r
 207         "       mrs r0, psp                                             \n"\r
 208         "       cbz r0, no_save                                 \n"\r
 209         "                                                                       \n"     /* Save the context into the TCB. */                                    \r
 210         "       stmdb r0!, {r4-r11}                             \n"\r
 211         "       sub r0, #0x04                                   \n"\r
 212         "       ldr r1, uxCriticalNestingConst  \n"\r
 213         "       ldr r2, pxCurrentTCBConst               \n"\r
 214         "       ldr r1, [r1]                                    \n"\r
 215         "       ldr r2, [r2]                                    \n"\r
 216         "       str r1, [r0]                                    \n"                     \r
 217         "       str r0, [r2]                                    \n"\r
 218         "                                                                       \n"\r
 219         "no_save:\n"    \r
 220         "       push {r14}                                              \n"\r
 221         "       bl vPortSwitchContext                   \n"\r
 222         "       pop {r14}                                               \n"\r
 223         "                                                                       \n"     /* Restore the context. */      \r
 224         "       ldr r1, pxCurrentTCBConst               \n"\r
 225         "       ldr r1, [r1]                                    \n"\r
 226         "       ldr r0, [r1]                                    \n"\r
 227         "       ldmia r0!, {r1, r4-r11}                 \n"\r
 228         "       ldr r2, uxCriticalNestingConst  \n"\r
 229         "       str r1, [r2]                                    \n"\r
 230         "       msr psp, r0                                             \n"\r
 231         "       orr r14, #0xd                                   \n"\r
 232         "                                                                       \n"     /* Exit with interrupts in the state required by the task. */   \r
 233         "       cbnz r1, sv_disable_interrupts  \n"\r
 234         "       bx r14                                                  \n"\r
 235         "                                                                       \n"\r
 236         "sv_disable_interrupts:                         \n"\r
 237         "       ldr r1, =ulKernelPriority               \n"\r
 238         "       ldr r1, [r1]                                    \n"\r
 239         "       msr     basepri, r1                                     \n"\r
 240         "       bx r14                                                  \n"\r
 241         "                                                                       \n"\r
 242         "       .align 2                                                \n"\r
 243         "pxCurrentTCBConst: .word pxCurrentTCB                          \n"\r
 244         "uxCriticalNestingConst: .word uxCriticalNesting        \n"\r
 245         );\r
 246 }\r
 247 /*-----------------------------------------------------------*/\r
 248 \r
 249 void xPortSysTickHandler( void )\r
 250 {\r
 251         extern void vTaskIncrementTick( void );\r
 252         extern void vPortYieldFromISR( void );\r
 253 \r
 254         /* Call the scheduler tick function. */\r
 255         __asm volatile\r
 256         ( \r
 257         "       push {r14}                                                      \n"\r
 258         "       bl vPortIncrementTick                           \n"\r
 259         "       pop {r14}" \r
 260         );\r
 261 \r
 262         /* If using preemption, also force a context switch. */\r
 263         #if configUSE_PREEMPTION == 1\r
 264         __asm volatile\r
 265         ( \r
 266         "       push {r14}                                                      \n"\r
 267         "       bl vPortYieldFromISR                            \n"\r
 268         "       pop {r14}" \r
 269         );\r
 270         #endif\r
 271 \r
 272         /* Exit with interrupts in the correct state. */\r
 273         __asm volatile\r
 274         (\r
 275         "    ldr r2, uxCriticalNestingConst2    \n" \r
 276         "    ldr r2, [r2]                                               \n"\r
 277         "    cbnz r2, tick_disable_interrupts   \n"\r
 278         "    bx r14" \r
 279         );\r
 280 \r
 281    __asm volatile\r
 282    (\r
 283         "tick_disable_interrupts:                               \n"\r
 284         "       ldr r1, =ulKernelPriority                       \n"\r
 285         "       ldr r1, [r1]                                            \n"\r
 286         "       msr     basepri, r1                                             \n"\r
 287         "    bx r14                                                             \n"\r
 288         "                                                                               \n"\r
 289         "       .align 2                                                        \n"\r
 290         "uxCriticalNestingConst2: .word uxCriticalNesting"\r
 291         );\r
 292 }\r
 293 /*-----------------------------------------------------------*/\r
 294 \r
 295 /*\r
 296  * Setup the systick timer to generate the tick interrupts at the required\r
 297  * frequency.\r
 298  */\r
 299 void prvSetupTimerInterrupt( void )\r
 300 {\r
 301         /* Configure SysTick to interrupt at the requested rate. */\r
 302         *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
 303         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 304 }\r
 305 /*-----------------------------------------------------------*/\r
 306 \r
 307 void vPortSwitchContext( void )\r
 308 {\r
 309         vPortSetInterruptMask();\r
 310         vTaskSwitchContext();\r
 311         vPortClearInterruptMask();\r
 312 }\r
 313 /*-----------------------------------------------------------*/\r
 314 \r
 315 void vPortIncrementTick( void )\r
 316 {\r
 317         vPortSetInterruptMask();\r
 318         vTaskIncrementTick();\r
 319         vPortClearInterruptMask();\r
 320 }\r
 321 \r
 322 /*-----------------------------------------------------------*/\r
 323 \r