git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2         FreeRTOS.org V5.1.2 - Copyright (C) 2003-2009 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section\r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26     ***************************************************************************\r
  27     ***************************************************************************\r
  28     *                                                                         *\r
  29     * Get the FreeRTOS eBook!  See http://www.FreeRTOS.org/Documentation      *\r
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  31         * This is a concise, step by step, 'hands on' guide that describes both   *\r
  32         * general multitasking concepts and FreeRTOS specifics. It presents and   *\r
  33         * explains numerous examples that are written using the FreeRTOS API.     *\r
  34         * Full source code for all the examples is provided in an accompanying    *\r
  35         * .zip file.                                                              *\r
  36     *                                                                         *\r
  37     ***************************************************************************\r
  38     ***************************************************************************\r
  39 \r
  40         Please ensure to read the configuration and relevant port sections of the\r
  41         online documentation.\r
  42 \r
  43         http://www.FreeRTOS.org - Documentation, latest information, license and\r
  44         contact details.\r
  45 \r
  46         http://www.SafeRTOS.com - A version that is certified for use in safety\r
  47         critical systems.\r
  48 \r
  49         http://www.OpenRTOS.com - Commercial support, development, porting,\r
  50         licensing and training services.\r
  51 */\r
  52 \r
  53 /*-----------------------------------------------------------\r
  54  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  55  *----------------------------------------------------------*/\r
  56 \r
  57 /* Scheduler includes. */\r
  58 #include "FreeRTOS.h"\r
  59 #include "task.h"\r
  60 \r
  61 /* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
  62 defined.  The value should also ensure backward compatibility.\r
  63 FreeRTOS.org versions prior to V4.4.0 did not include this definition. */\r
  64 #ifndef configKERNEL_INTERRUPT_PRIORITY\r
  65         #define configKERNEL_INTERRUPT_PRIORITY 255\r
  66 #endif\r
  67 \r
  68 /* Constants required to manipulate the NVIC. */\r
  69 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned portLONG *) 0xe000e010 )\r
  70 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned portLONG *) 0xe000e014 )\r
  71 #define portNVIC_INT_CTRL                       ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
  72 #define portNVIC_SYSPRI2                        ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
  73 #define portNVIC_SYSTICK_CLK            0x00000004\r
  74 #define portNVIC_SYSTICK_INT            0x00000002\r
  75 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  76 #define portNVIC_PENDSVSET                      0x10000000\r
  77 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  78 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned portLONG ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  79 \r
  80 /* Constants required to set up the initial stack. */\r
  81 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  82 \r
  83 /* The priority used by the kernel is assigned to a variable to make access\r
  84 from inline assembler easier. */\r
  85 const unsigned portLONG ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  86 \r
  87 /* Each task maintains its own interrupt status in the critical nesting\r
  88 variable. */\r
  89 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  90 \r
  91 /*\r
  92  * Setup the timer to generate the tick interrupts.\r
  93  */\r
  94 static void prvSetupTimerInterrupt( void );\r
  95 \r
  96 /*\r
  97  * Exception handlers.\r
  98  */\r
  99 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 100 void xPortSysTickHandler( void );\r
 101 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 102 \r
 103 /*\r
 104  * Start first task is a separate function so it can be tested in isolation.\r
 105  */\r
 106 void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
 107 \r
 108 /*-----------------------------------------------------------*/\r
 109 \r
 110 /*\r
 111  * See header file for description.\r
 112  */\r
 113 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 114 {\r
 115         /* Simulate the stack frame as it would be created by a context switch\r
 116         interrupt. */\r
 117         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 118         pxTopOfStack--;\r
 119         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 120         pxTopOfStack--;\r
 121         *pxTopOfStack = 0;      /* LR */\r
 122         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 123         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 124         pxTopOfStack -= 8;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 125 \r
 126         return pxTopOfStack;\r
 127 }\r
 128 /*-----------------------------------------------------------*/\r
 129 \r
 130 void vPortSVCHandler( void )\r
 131 {\r
 132         asm volatile (\r
 133                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 134                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 135                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 136                                         "       ldmia r0!, {r4-r11}                             \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
 137                                         "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 138                                         "       mov r0, #0                                              \n"\r
 139                                         "       msr     basepri, r0                                     \n"\r
 140                                         "       orr r14, #0xd                                   \n"\r
 141                                         "       bx r14                                                  \n"\r
 142                                         "                                                                       \n"\r
 143                                         "       .align 2                                                \n"\r
 144                                         "pxCurrentTCBConst2: .word pxCurrentTCB                         \n"\r
 145                                 );\r
 146 }\r
 147 /*-----------------------------------------------------------*/\r
 148 \r
 149 void vPortStartFirstTask( void )\r
 150 {\r
 151         asm volatile(\r
 152                                         " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
 153                                         " ldr r0, [r0]                  \n"\r
 154                                         " ldr r0, [r0]                  \n"\r
 155                                         " msr msp, r0                   \n" /* Set the msp back to the start of the stack. */\r
 156                                         " svc 0                                 \n" /* System call to start first task. */\r
 157                                 );\r
 158 }\r
 159 /*-----------------------------------------------------------*/\r
 160 \r
 161 /*\r
 162  * See header file for description.\r
 163  */\r
 164 portBASE_TYPE xPortStartScheduler( void )\r
 165 {\r
 166         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 167         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 168         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 169 \r
 170         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 171         here already. */\r
 172         prvSetupTimerInterrupt();\r
 173 \r
 174         /* Initialise the critical nesting count ready for the first task. */\r
 175         uxCriticalNesting = 0;\r
 176 \r
 177         /* Start the first task. */\r
 178         vPortStartFirstTask();\r
 179 \r
 180         /* Should not get here! */\r
 181         return 0;\r
 182 }\r
 183 /*-----------------------------------------------------------*/\r
 184 \r
 185 void vPortEndScheduler( void )\r
 186 {\r
 187         /* It is unlikely that the CM3 port will require this function as there\r
 188         is nothing to return to.  */\r
 189 }\r
 190 /*-----------------------------------------------------------*/\r
 191 \r
 192 void vPortYieldFromISR( void )\r
 193 {\r
 194         /* Set a PendSV to request a context switch. */\r
 195         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 196 }\r
 197 /*-----------------------------------------------------------*/\r
 198 \r
 199 void vPortEnterCritical( void )\r
 200 {\r
 201         portDISABLE_INTERRUPTS();\r
 202         uxCriticalNesting++;\r
 203 }\r
 204 /*-----------------------------------------------------------*/\r
 205 \r
 206 void vPortExitCritical( void )\r
 207 {\r
 208         uxCriticalNesting--;\r
 209         if( uxCriticalNesting == 0 )\r
 210         {\r
 211                 portENABLE_INTERRUPTS();\r
 212         }\r
 213 }\r
 214 /*-----------------------------------------------------------*/\r
 215 \r
 216 void xPortPendSVHandler( void )\r
 217 {\r
 218         /* This is a naked function. */\r
 219 \r
 220         __asm volatile\r
 221         (\r
 222         "       mrs r0, psp                                                     \n"\r
 223         "                                                                               \n"\r
 224         "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 225         "       ldr     r2, [r3]                                                \n"\r
 226         "                                                                               \n"\r
 227         "       stmdb r0!, {r4-r11}                                     \n" /* Save the remaining registers. */\r
 228         "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 229         "                                                                               \n"\r
 230         "       stmdb sp!, {r3, r14}                            \n"\r
 231         "       mov r0, %0                                                      \n"\r
 232         "       msr basepri, r0                                         \n"\r
 233         "       bl vTaskSwitchContext                           \n"\r
 234         "       mov r0, #0                                                      \n"\r
 235         "       msr basepri, r0                                         \n"                     \r
 236         "       ldmia sp!, {r3, r14}                            \n"\r
 237         "                                                                               \n"     /* Restore the context, including the critical nesting count. */\r
 238         "       ldr r1, [r3]                                            \n"\r
 239         "       ldr r0, [r1]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 240         "       ldmia r0!, {r4-r11}                                     \n" /* Pop the registers. */\r
 241         "       msr psp, r0                                                     \n"\r
 242         "       bx r14                                                          \n"\r
 243         "                                                                               \n"\r
 244         "       .align 2                                                        \n"\r
 245         "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 246         ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 247         );\r
 248 }\r
 249 /*-----------------------------------------------------------*/\r
 250 \r
 251 void xPortSysTickHandler( void )\r
 252 {\r
 253 unsigned portLONG ulDummy;\r
 254 \r
 255         /* If using preemption, also force a context switch. */\r
 256         #if configUSE_PREEMPTION == 1\r
 257                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 258         #endif\r
 259 \r
 260         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 261         {\r
 262                 vTaskIncrementTick();\r
 263         }\r
 264         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 265 }\r
 266 /*-----------------------------------------------------------*/\r
 267 \r
 268 /*\r
 269  * Setup the systick timer to generate the tick interrupts at the required\r
 270  * frequency.\r
 271  */\r
 272 void prvSetupTimerInterrupt( void )\r
 273 {\r
 274         /* Configure SysTick to interrupt at the requested rate. */\r
 275         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 276         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 277 }\r
 278 /*-----------------------------------------------------------*/\r
 279 \r