git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3/port.c

   1 /*\r
   2         FreeRTOS.org V4.3.0 - Copyright (C) 2003-2007 Richard Barry.\r
   3 \r
   4         This file is part of the FreeRTOS.org distribution.\r
   5 \r
   6         FreeRTOS.org is free software; you can redistribute it and/or modify\r
   7         it under the terms of the GNU General Public License as published by\r
   8         the Free Software Foundation; either version 2 of the License, or\r
   9         (at your option) any later version.\r
  10 \r
  11         FreeRTOS.org is distributed in the hope that it will be useful,\r
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14         GNU General Public License for more details.\r
  15 \r
  16         You should have received a copy of the GNU General Public License\r
  17         along with FreeRTOS.org; if not, write to the Free Software\r
  18         Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19 \r
  20         A special exception to the GPL can be applied should you wish to distribute\r
  21         a combined work that includes FreeRTOS.org, without being obliged to provide\r
  22         the source code for any proprietary components.  See the licensing section \r
  23         of http://www.FreeRTOS.org for full details of how and when the exception\r
  24         can be applied.\r
  25 \r
  26         ***************************************************************************\r
  27         See http://www.FreeRTOS.org for documentation, latest information, license \r
  28         and contact details.  Please ensure to read the configuration and relevant \r
  29         port sections of the online documentation.\r
  30 \r
  31         Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along\r
  32         with commercial development and support options.\r
  33         ***************************************************************************\r
  34 */\r
  35 \r
  36 /*\r
  37         Changes between V4.0.0 and V4.0.1\r
  38 \r
  39         + Reduced the code used to setup the initial stack frame.\r
  40         + The kernel no longer has to install or handle the fault interrupt.\r
  41 */\r
  42 \r
  43 \r
  44 /*-----------------------------------------------------------\r
  45  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  46  *----------------------------------------------------------*/\r
  47 \r
  48 /* Scheduler includes. */\r
  49 #include "FreeRTOS.h"\r
  50 #include "task.h"\r
  51 \r
  52 /* Constants required to manipulate the NVIC. */\r
  53 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned portLONG *) 0xe000e010 )\r
  54 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned portLONG *) 0xe000e014 )\r
  55 #define portNVIC_INT_CTRL                       ( ( volatile unsigned portLONG *) 0xe000ed04 )\r
  56 #define portNVIC_SYSPRI2                        ( ( volatile unsigned portLONG *) 0xe000ed20 )\r
  57 #define portNVIC_SYSPRI1                        ( ( volatile unsigned portLONG *) 0xe000ed1c )\r
  58 #define portNVIC_SYSTICK_CLK            0x00000004\r
  59 #define portNVIC_SYSTICK_INT            0x00000002\r
  60 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  61 #define portNVIC_PENDSVSET                      0x10000000\r
  62 #define portNVIC_PENDSV_PRI                     0x00ff0000\r
  63 #define portNVIC_SVCALL_PRI                     0xff000000\r
  64 #define portNVIC_SYSTICK_PRI            0xff000000\r
  65 \r
  66 /* Constants required to set up the initial stack. */\r
  67 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  68 \r
  69 /* Each task maintains its own interrupt status in the critical nesting\r
  70 variable. */\r
  71 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  72 \r
  73 /* \r
  74  * Setup the timer to generate the tick interrupts.\r
  75  */\r
  76 static void prvSetupTimerInterrupt( void );\r
  77 \r
  78 /*\r
  79  * Exception handlers.\r
  80  */\r
  81 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
  82 void xPortSysTickHandler( void ) __attribute__ (( naked ));\r
  83 \r
  84 /*\r
  85  * Set the MSP/PSP to a known value.\r
  86  */\r
  87 void prvSetMSP( unsigned long ulValue ) __attribute__ (( naked ));\r
  88 void prvSetPSP( unsigned long ulValue ) __attribute__ (( naked )); \r
  89 \r
  90 /*-----------------------------------------------------------*/\r
  91 \r
  92 /* \r
  93  * See header file for description. \r
  94  */\r
  95 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
  96 {\r
  97         /* Simulate the stack frame as it would be created by a context switch\r
  98         interrupt. */\r
  99         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 100         pxTopOfStack--;\r
 101         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 102         pxTopOfStack--;\r
 103         *pxTopOfStack = 0xfffffffd;     /* LR */\r
 104         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 105         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 106         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 107         *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */\r
 108 \r
 109         return pxTopOfStack;\r
 110 }\r
 111 /*-----------------------------------------------------------*/\r
 112 \r
 113 void prvSetPSP( unsigned long ulValue )\r
 114 {\r
 115         asm volatile( "msr psp, r0" );\r
 116         asm volatile( "bx lr" );\r
 117 }\r
 118 /*-----------------------------------------------------------*/\r
 119 \r
 120 void prvSetMSP( unsigned long ulValue )\r
 121 {\r
 122         asm volatile( "msr msp, r0" );\r
 123         asm volatile( "bx lr" );\r
 124 }\r
 125 /*-----------------------------------------------------------*/\r
 126 \r
 127 /* \r
 128  * See header file for description. \r
 129  */\r
 130 portBASE_TYPE xPortStartScheduler( void )\r
 131 {\r
 132         /* Make PendSV, CallSV and SysTick the lowest priority interrupts. */\r
 133         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 134         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 135 \r
 136         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 137         here already. */\r
 138         prvSetupTimerInterrupt();\r
 139         \r
 140         /* Start the first task. */\r
 141         prvSetPSP( 0 );\r
 142         prvSetMSP( *((unsigned portLONG *) 0 ) );\r
 143         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 144 \r
 145         /* Enable interrupts */\r
 146         portENABLE_INTERRUPTS();\r
 147 \r
 148         /* Should not get here! */\r
 149         return 0;\r
 150 }\r
 151 /*-----------------------------------------------------------*/\r
 152 \r
 153 void vPortEndScheduler( void )\r
 154 {\r
 155         /* It is unlikely that the CM3 port will require this function as there\r
 156         is nothing to return to.  */\r
 157 }\r
 158 /*-----------------------------------------------------------*/\r
 159 \r
 160 void vPortYieldFromISR( void )\r
 161 {\r
 162         /* Set a PendSV to request a context switch. */\r
 163         *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;\r
 164 \r
 165         /* This function is also called in response to a Yield(), so we want\r
 166         the yield to occur immediately. */\r
 167         portENABLE_INTERRUPTS();\r
 168 }\r
 169 /*-----------------------------------------------------------*/\r
 170 \r
 171 void vPortEnterCritical( void )\r
 172 {\r
 173         portDISABLE_INTERRUPTS();\r
 174         uxCriticalNesting++;\r
 175 }\r
 176 /*-----------------------------------------------------------*/\r
 177 \r
 178 void vPortExitCritical( void )\r
 179 {\r
 180         uxCriticalNesting--;\r
 181         if( uxCriticalNesting == 0 )\r
 182         {\r
 183                 portENABLE_INTERRUPTS();\r
 184         }\r
 185 }\r
 186 /*-----------------------------------------------------------*/\r
 187 \r
 188 void xPortPendSVHandler( void )\r
 189 {\r
 190         /* Start first task if the stack has not yet been setup. */\r
 191         __asm volatile\r
 192         ( \r
 193         "       mrs r0, psp                                             \n"\r
 194         "       cbz r0, no_save                                 \n"\r
 195         "                                                                       \n"     /* Save the context into the TCB. */                                    \r
 196         "       sub r0, #0x20                                   \n"\r
 197         "       stm r0, {r4-r11}                                \n"\r
 198         "       nop                                                             \n"\r
 199         "       sub r0, #0x04                                   \n"\r
 200         "       ldr r1, uxCriticalNestingConst  \n"\r
 201         "       ldr r1, [r1]                                    \n"\r
 202         "       stm r0, {r1}                                    \n"\r
 203         "       ldr r1, pxCurrentTCBConst               \n"\r
 204         "       ldr r1, [r1]                                    \n"\r
 205         "       str r0, [r1]                                    \n"\r
 206         "                                                                       \n"\r
 207         "no_save:\n"    \r
 208         "       ldr r0, vTaskSwitchContextConst \n"     /* Find the task to execute. */\r
 209         "       push {r14}                                              \n"\r
 210         "       cpsid i                                                 \n"\r
 211         "       blx r0                                                  \n"\r
 212         "       cpsie i                                                 \n"\r
 213         "       pop {r14}                                               \n"\r
 214         "                                                                       \n"     /* Restore the context. */      \r
 215         "       ldr r1, pxCurrentTCBConst               \n"\r
 216         "       ldr r1, [r1]                                    \n"\r
 217         "       ldr r0, [r1]                                    \n"\r
 218         "       ldm r0, {r1, r4-r11}                    \n"\r
 219         "       nop                                                             \n"\r
 220         "       ldr r2, uxCriticalNestingConst  \n"\r
 221         "       str r1, [r2]                                    \n"\r
 222         "       add r0, #0x24                                   \n"\r
 223         "       msr psp, r0                                             \n"\r
 224         "       orr r14, #0xd                                   \n"\r
 225         "                                                                       \n"     /* Exit with interrupts in the state required by the task. */   \r
 226         "       cbnz r1, sv_disable_interrupts  \n"\r
 227         "       bx r14                                                  \n"\r
 228         "                                                                       \n"\r
 229         "sv_disable_interrupts:                         \n"\r
 230         "       cpsid i                                                 \n"\r
 231         "       bx r14                                                  \n"\r
 232         "                                                                       \n"\r
 233         "       .align 2                                                \n"\r
 234         "vTaskSwitchContextConst: .word vTaskSwitchContext      \n"\r
 235         "pxCurrentTCBConst: .word pxCurrentTCB                          \n"\r
 236         "uxCriticalNestingConst: .word uxCriticalNesting        \n"\r
 237         );\r
 238 }\r
 239 /*-----------------------------------------------------------*/\r
 240 \r
 241 void xPortSysTickHandler( void )\r
 242 {\r
 243         extern void vTaskIncrementTick( void );\r
 244         extern void vPortYieldFromISR( void );\r
 245 \r
 246         /* Call the scheduler tick function. */\r
 247         __asm volatile\r
 248         ( \r
 249         "       ldr r0, vTaskIncrementTickConst         \n"\r
 250         "       push {r14}                                                      \n"\r
 251         "       cpsid i                                                         \n"\r
 252         "       blx r0                                                          \n"\r
 253         "       cpsie i                                                         \n"\r
 254         "       pop {r14}" \r
 255         );\r
 256 \r
 257         /* If using preemption, also force a context switch. */\r
 258         #if configUSE_PREEMPTION == 1\r
 259         __asm volatile\r
 260         ( \r
 261         "       push {r14}                                                      \n"\r
 262         "       ldr r0, vPortYieldFromISRConst2         \n"\r
 263         "       blx r0                                                          \n"\r
 264         "       pop {r14}" \r
 265         );\r
 266         #endif\r
 267 \r
 268         /* Exit with interrupts in the correct state. */\r
 269         __asm volatile\r
 270         (\r
 271         "    ldr r2, uxCriticalNestingConst2    \n" \r
 272         "    ldr r2, [r2]                                               \n"\r
 273         "    cbnz r2, tick_disable_interrupts   \n"\r
 274         "    bx r14" \r
 275         );\r
 276 \r
 277    __asm volatile\r
 278    (\r
 279         "tick_disable_interrupts:                               \n"\r
 280         "    cpsid i                                                    \n"\r
 281         "    bx r14                                                             \n"\r
 282         "                                                                               \n"\r
 283         "       .align 2                                                        \n"\r
 284         "vPortYieldFromISRConst2: .word vPortYieldFromISR\n"\r
 285         "vTaskIncrementTickConst: .word vTaskIncrementTick\n" \r
 286         "uxCriticalNestingConst2: .word uxCriticalNesting"\r
 287         );\r
 288 }\r
 289 /*-----------------------------------------------------------*/\r
 290 \r
 291 /*\r
 292  * Setup the systick timer to generate the tick interrupts at the required\r
 293  * frequency.\r
 294  */\r
 295 void prvSetupTimerInterrupt( void )\r
 296 {\r
 297         /* Configure SysTick to interrupt at the requested rate. */\r
 298         *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;\r
 299         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 300 }\r
 301 \r
 302 \r