2 FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
\r
4 This file is part of the FreeRTOS distribution.
\r
6 FreeRTOS is free software; you can redistribute it and/or modify it under
\r
7 the terms of the GNU General Public License (version 2) as published by the
\r
8 Free Software Foundation and modified by the FreeRTOS exception.
\r
9 **NOTE** The exception to the GPL is included to allow you to distribute a
\r
10 combined work that includes FreeRTOS without being obliged to provide the
\r
11 source code for proprietary components outside of the FreeRTOS kernel.
\r
12 Alternative commercial license and support terms are also available upon
\r
13 request. See the licensing section of http://www.FreeRTOS.org for full
\r
16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
\r
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
\r
18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
\r
21 You should have received a copy of the GNU General Public License along
\r
22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
\r
23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
\r
26 ***************************************************************************
\r
28 * The FreeRTOS eBook and reference manual are available to purchase for a *
\r
29 * small fee. Help yourself get started quickly while also helping the *
\r
30 * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
\r
32 ***************************************************************************
\r
36 Please ensure to read the configuration and relevant port sections of the
\r
37 online documentation.
\r
39 http://www.FreeRTOS.org - Documentation, latest information, license and
\r
42 http://www.SafeRTOS.com - A version that is certified for use in safety
\r
45 http://www.OpenRTOS.com - Commercial support, development, porting,
\r
46 licensing and training services.
\r
49 /*-----------------------------------------------------------
\r
50 * Implementation of functions defined in portable.h for the ARM CM3 port.
\r
51 *----------------------------------------------------------*/
\r
53 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
\r
54 all the API functions to use the MPU wrappers. That should only be done when
\r
55 task.h is included from an application file. */
\r
56 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
\r
58 /* Scheduler includes. */
\r
59 #include "FreeRTOS.h"
\r
63 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
\r
65 /* Constants required to access and manipulate the NVIC. */
\r
66 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
\r
67 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
\r
68 #define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
\r
69 #define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
\r
70 #define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
\r
71 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
\r
73 /* Constants required to access and manipulate the MPU. */
\r
74 #define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
\r
75 #define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
\r
76 #define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
\r
77 #define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
\r
78 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
\r
79 #define portMPU_ENABLE ( 0x01UL )
\r
80 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
\r
81 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
\r
82 #define portMPU_REGION_VALID ( 0x10UL )
\r
83 #define portMPU_REGION_ENABLE ( 0x01UL )
\r
84 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
\r
85 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
\r
87 /* Constants required to access and manipulate the SysTick. */
\r
88 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
\r
89 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
\r
90 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
\r
91 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
\r
92 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
\r
93 #define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
\r
94 #define portNVIC_TEMP_SVC_PRI ( 0x01UL << 24UL )
\r
96 /* Constants required to set up the initial stack. */
\r
97 #define portINITIAL_XPSR ( 0x01000000 )
\r
98 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
\r
99 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
\r
101 /* Offsets in the stack to the parameters when inside the SVC handler. */
\r
102 #define portOFFSET_TO_PC ( 6 )
\r
104 /* Set the privilege level to user mode if xRunningPrivileged is false. */
\r
105 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )
\r
107 /* Each task maintains its own interrupt status in the critical nesting
\r
108 variable. Note this is not saved as part of the task context as context
\r
109 switches can only occur when uxCriticalNesting is zero. */
\r
110 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
\r
113 * Setup the timer to generate the tick interrupts.
\r
115 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
\r
118 * Configure a number of standard MPU regions that are used by all tasks.
\r
120 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
\r
123 * Return the smallest MPU region size that a given number of bytes will fit
\r
124 * into. The region size is returned as the value that should be programmed
\r
125 * into the region attribute register for that region.
\r
127 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
\r
130 * Checks to see if being called from the context of an unprivileged task, and
\r
131 * if so raises the privilege level and returns false - otherwise does nothing
\r
132 * other than return true.
\r
134 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
\r
137 * Standard FreeRTOS exception handlers.
\r
139 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
\r
140 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
\r
141 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
\r
144 * Starts the scheduler by restoring the context of the first task to run.
\r
146 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
\r
149 * C portion of the SVC handler. The SVC handler is split between an asm entry
\r
150 * and a C wrapper for simplicity of coding and maintenance.
\r
152 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
\r
154 /*-----------------------------------------------------------*/
\r
157 * See header file for description.
\r
159 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
\r
161 /* Simulate the stack frame as it would be created by a context switch
\r
163 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
\r
165 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
\r
167 *pxTopOfStack = 0; /* LR */
\r
168 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
\r
169 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
170 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
\r
172 if( xRunPrivileged == pdTRUE )
\r
174 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
\r
178 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
\r
181 return pxTopOfStack;
\r
183 /*-----------------------------------------------------------*/
\r
185 void vPortSVCHandler( void )
\r
187 /* Assumes psp was in use. */
\r
190 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
\r
193 " mrseq r0, msp \n"
\r
194 " mrsne r0, psp \n"
\r
198 " b prvSVCHandler \n"
\r
201 /* This will never get executed, but is required to prevent prvSVCHandler
\r
202 being removed by the optimiser. */
\r
203 prvSVCHandler( NULL );
\r
205 /*-----------------------------------------------------------*/
\r
207 static void prvSVCHandler( unsigned long *pulParam )
\r
209 unsigned char ucSVCNumber;
\r
211 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
\r
212 xPSR. The first argument (r0) is pulParam[ 0 ]. */
\r
213 ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
\r
214 switch( ucSVCNumber )
\r
216 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
\r
217 prvRestoreContextOfFirstTask();
\r
220 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
\r
223 case portSVC_prvRaisePrivilege : __asm volatile
\r
225 " mrs r1, control \n" /* Obtain current control value. */
\r
226 " bic r1, #1 \n" /* Set privilege bit. */
\r
227 " msr control, r1 \n" /* Write back new control value. */
\r
231 default : /* Unknown SVC call. */
\r
235 /*-----------------------------------------------------------*/
\r
237 static void prvRestoreContextOfFirstTask( void )
\r
241 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
\r
244 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
\r
245 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
\r
247 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
\r
248 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
\r
249 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
\r
250 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
\r
251 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
\r
252 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
\r
253 " msr control, r3 \n"
\r
254 " msr psp, r0 \n" /* Restore the task stack pointer. */
\r
256 " msr basepri, r0 \n"
\r
257 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
\r
261 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
\r
264 /*-----------------------------------------------------------*/
\r
267 * See header file for description.
\r
269 portBASE_TYPE xPortStartScheduler( void )
\r
271 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
\r
272 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
\r
273 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
\r
274 *(portNVIC_SYSPRI1) |= portNVIC_TEMP_SVC_PRI;
\r
276 /* Configure the regions in the MPU that are common to all tasks. */
\r
279 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
281 prvSetupTimerInterrupt();
\r
283 /* Initialise the critical nesting count ready for the first task. */
\r
284 uxCriticalNesting = 0;
\r
286 /* Start the first task. */
\r
287 __asm volatile( " svc %0 \n"
\r
288 :: "i" (portSVC_START_SCHEDULER) );
\r
290 /* Should not get here! */
\r
293 /*-----------------------------------------------------------*/
\r
295 void vPortEndScheduler( void )
\r
297 /* It is unlikely that the CM3 port will require this function as there
\r
298 is nothing to return to. */
\r
300 /*-----------------------------------------------------------*/
\r
302 void vPortEnterCritical( void )
\r
304 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
306 portDISABLE_INTERRUPTS();
\r
307 uxCriticalNesting++;
\r
309 portRESET_PRIVILEGE( xRunningPrivileged );
\r
311 /*-----------------------------------------------------------*/
\r
313 void vPortExitCritical( void )
\r
315 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
317 uxCriticalNesting--;
\r
318 if( uxCriticalNesting == 0 )
\r
320 portENABLE_INTERRUPTS();
\r
322 portRESET_PRIVILEGE( xRunningPrivileged );
\r
324 /*-----------------------------------------------------------*/
\r
326 void xPortPendSVHandler( void )
\r
328 /* This is a naked function. */
\r
334 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
\r
337 " mrs r1, control \n"
\r
338 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
\r
339 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
\r
341 " stmdb sp!, {r3, r14} \n"
\r
343 " msr basepri, r0 \n"
\r
344 " bl vTaskSwitchContext \n"
\r
346 " msr basepri, r0 \n"
\r
347 " ldmia sp!, {r3, r14} \n"
\r
348 " \n" /* Restore the context. */
\r
350 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
\r
351 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
\r
352 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
\r
353 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
\r
354 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
\r
355 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
\r
356 " msr control, r3 \n"
\r
362 "pxCurrentTCBConst: .word pxCurrentTCB \n"
\r
363 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
\r
366 /*-----------------------------------------------------------*/
\r
368 void xPortSysTickHandler( void )
\r
370 unsigned long ulDummy;
\r
372 /* If using preemption, also force a context switch. */
\r
373 #if configUSE_PREEMPTION == 1
\r
374 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
\r
377 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
\r
379 vTaskIncrementTick();
\r
381 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
\r
383 /*-----------------------------------------------------------*/
\r
386 * Setup the systick timer to generate the tick interrupts at the required
\r
389 static void prvSetupTimerInterrupt( void )
\r
391 /* Configure SysTick to interrupt at the requested rate. */
\r
392 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
\r
393 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
\r
395 /*-----------------------------------------------------------*/
\r
397 static void prvSetupMPU( void )
\r
399 extern unsigned long __privileged_functions_end__[];
\r
400 extern unsigned long __FLASH_segment_start__[];
\r
401 extern unsigned long __FLASH_segment_end__[];
\r
402 extern unsigned long __privileged_data_start__[];
\r
403 extern unsigned long __privileged_data_end__[];
\r
405 /* Check the expected MPU is present. */
\r
406 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
\r
408 /* First setup the entire flash for unprivileged read only access. */
\r
409 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
\r
410 ( portMPU_REGION_VALID ) |
\r
411 ( portUNPRIVILEGED_FLASH_REGION );
\r
413 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
\r
414 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
415 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
\r
416 ( portMPU_REGION_ENABLE );
\r
418 /* Setup the first 16K for privileged only access (even though less
\r
419 than 10K is actually being used). This is where the kernel code is
\r
421 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
\r
422 ( portMPU_REGION_VALID ) |
\r
423 ( portPRIVILEGED_FLASH_REGION );
\r
425 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
\r
426 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
427 ( prvGetMPURegionSizeSetting( __privileged_functions_end__ - __FLASH_segment_start__ ) ) |
\r
428 ( portMPU_REGION_ENABLE );
\r
430 /* Setup the privileged data RAM region. This is where the kernel data
\r
432 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
433 ( portMPU_REGION_VALID ) |
\r
434 ( portPRIVILEGED_RAM_REGION );
\r
436 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
437 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
438 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
439 ( portMPU_REGION_ENABLE );
\r
441 /* By default allow everything to access the general peripherals. The
\r
442 system peripherals and registers are protected. */
\r
443 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
\r
444 ( portMPU_REGION_VALID ) |
\r
445 ( portGENERAL_PERIPHERALS_REGION );
\r
447 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
\r
448 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
\r
449 ( portMPU_REGION_ENABLE );
\r
451 /* Enable the memory fault exception. */
\r
452 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
\r
454 /* Enable the MPU with the background region configured. */
\r
455 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
\r
458 /*-----------------------------------------------------------*/
\r
460 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
\r
462 unsigned long ulRegionSize, ulReturnValue = 4;
\r
464 /* 32 is the smallest region size, 31 is the largest valid value for
\r
466 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
\r
468 if( ulActualSizeInBytes <= ulRegionSize )
\r
478 /* Shift the code by one before returning so it can be written directly
\r
479 into the the correct bit position of the attribute register. */
\r
480 return ( ulReturnValue << 1UL );
\r
482 /*-----------------------------------------------------------*/
\r
484 static portBASE_TYPE prvRaisePrivilege( void )
\r
488 " mrs r0, control \n"
\r
489 " tst r0, #1 \n" /* Is the task running privileged? */
\r
491 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
\r
492 " svcne %0 \n" /* Switch to privileged. */
\r
493 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
\r
495 :: "i" (portSVC_prvRaisePrivilege) : "r0"
\r
500 /*-----------------------------------------------------------*/
\r
502 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
\r
504 extern unsigned long __SRAM_segment_start__[];
\r
505 extern unsigned long __SRAM_segment_end__[];
\r
506 extern unsigned long __privileged_data_start__[];
\r
507 extern unsigned long __privileged_data_end__[];
\r
511 if( xRegions == NULL )
\r
513 /* No MPU regions are specified so allow access to all RAM. */
\r
514 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
515 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
\r
516 ( portMPU_REGION_VALID ) |
\r
517 ( portSTACK_REGION );
\r
519 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
520 ( portMPU_REGION_READ_WRITE ) |
\r
521 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
522 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
\r
523 ( portMPU_REGION_ENABLE );
\r
525 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
\r
526 just removed the privileged only parameters. */
\r
527 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
\r
528 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
529 ( portMPU_REGION_VALID ) |
\r
530 ( portSTACK_REGION + 1 );
\r
532 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
533 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
534 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
535 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
536 ( portMPU_REGION_ENABLE );
\r
538 /* Invalidate all other regions. */
\r
539 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
541 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
542 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
547 /* This function is called automatically when the task is created - in
\r
548 which case the stack region parameters will be valid. At all other
\r
549 times the stack parameters will not be valid and it is assumed that the
\r
550 stack region has already been configured. */
\r
551 if( usStackDepth > 0 )
\r
553 /* Define the region that allows access to the stack. */
\r
554 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
555 ( ( unsigned long ) pxBottomOfStack ) |
\r
556 ( portMPU_REGION_VALID ) |
\r
557 ( portSTACK_REGION ); /* Region number. */
\r
559 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
560 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
561 ( prvGetMPURegionSizeSetting( usStackDepth * sizeof( portSTACK_TYPE ) ) ) |
\r
562 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
563 ( portMPU_REGION_ENABLE );
\r
568 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
570 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
572 /* Translate the generic region definition contained in
\r
573 xRegions into the CM3 specific MPU settings that are then
\r
574 stored in xMPUSettings. */
\r
575 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
576 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
\r
577 ( portMPU_REGION_VALID ) |
\r
578 ( portSTACK_REGION + ul ); /* Region number. */
\r
580 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
581 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
582 ( xRegions[ lIndex ].ulParameters ) |
\r
583 ( portMPU_REGION_ENABLE );
\r
587 /* Invalidate the region. */
\r
588 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
589 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
596 /*-----------------------------------------------------------*/
\r
598 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
\r
600 signed portBASE_TYPE xReturn;
\r
601 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
603 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
604 portRESET_PRIVILEGE( xRunningPrivileged );
\r
607 /*-----------------------------------------------------------*/
\r
609 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
\r
611 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
613 vTaskAllocateMPURegions( xTask, xRegions );
\r
614 portRESET_PRIVILEGE( xRunningPrivileged );
\r
616 /*-----------------------------------------------------------*/
\r
618 #if ( INCLUDE_vTaskDelete == 1 )
\r
619 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
\r
621 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
623 vTaskDelete( pxTaskToDelete );
\r
624 portRESET_PRIVILEGE( xRunningPrivileged );
\r
627 /*-----------------------------------------------------------*/
\r
629 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
630 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
\r
632 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
634 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
635 portRESET_PRIVILEGE( xRunningPrivileged );
\r
638 /*-----------------------------------------------------------*/
\r
640 #if ( INCLUDE_vTaskDelay == 1 )
\r
641 void MPU_vTaskDelay( portTickType xTicksToDelay )
\r
643 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
645 vTaskDelay( xTicksToDelay );
\r
646 portRESET_PRIVILEGE( xRunningPrivileged );
\r
649 /*-----------------------------------------------------------*/
\r
651 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
652 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
\r
654 unsigned portBASE_TYPE uxReturn;
\r
655 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
657 uxReturn = uxTaskPriorityGet( pxTask );
\r
658 portRESET_PRIVILEGE( xRunningPrivileged );
\r
662 /*-----------------------------------------------------------*/
\r
664 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
665 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
\r
667 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
669 vTaskPrioritySet( pxTask, uxNewPriority );
\r
670 portRESET_PRIVILEGE( xRunningPrivileged );
\r
673 /*-----------------------------------------------------------*/
\r
675 #if ( INCLUDE_vTaskSuspend == 1 )
\r
676 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
\r
678 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
680 vTaskSuspend( pxTaskToSuspend );
\r
681 portRESET_PRIVILEGE( xRunningPrivileged );
\r
684 /*-----------------------------------------------------------*/
\r
686 #if ( INCLUDE_vTaskSuspend == 1 )
\r
687 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
\r
689 signed portBASE_TYPE xReturn;
\r
690 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
692 xReturn = xTaskIsTaskSuspended( xTask );
\r
693 portRESET_PRIVILEGE( xRunningPrivileged );
\r
697 /*-----------------------------------------------------------*/
\r
699 #if ( INCLUDE_vTaskSuspend == 1 )
\r
700 void MPU_vTaskResume( xTaskHandle pxTaskToResume )
\r
702 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
704 vTaskResume( pxTaskToResume );
\r
705 portRESET_PRIVILEGE( xRunningPrivileged );
\r
708 /*-----------------------------------------------------------*/
\r
710 void MPU_vTaskSuspendAll( void )
\r
712 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
715 portRESET_PRIVILEGE( xRunningPrivileged );
\r
717 /*-----------------------------------------------------------*/
\r
719 signed portBASE_TYPE MPU_xTaskResumeAll( void )
\r
721 signed portBASE_TYPE xReturn;
\r
722 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
724 xReturn = xTaskResumeAll();
\r
725 portRESET_PRIVILEGE( xRunningPrivileged );
\r
728 /*-----------------------------------------------------------*/
\r
730 portTickType MPU_xTaskGetTickCount( void )
\r
732 portTickType xReturn;
\r
733 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
735 xReturn = xTaskGetTickCount();
\r
736 portRESET_PRIVILEGE( xRunningPrivileged );
\r
739 /*-----------------------------------------------------------*/
\r
741 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
\r
743 unsigned portBASE_TYPE uxReturn;
\r
744 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
746 uxReturn = uxTaskGetNumberOfTasks();
\r
747 portRESET_PRIVILEGE( xRunningPrivileged );
\r
750 /*-----------------------------------------------------------*/
\r
752 void MPU_vTaskList( signed char *pcWriteBuffer )
\r
754 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
756 vTaskList( pcWriteBuffer );
\r
757 portRESET_PRIVILEGE( xRunningPrivileged );
\r
760 /*-----------------------------------------------------------*/
\r
762 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
763 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
\r
765 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
767 vTaskGetRunTimeStats( pcWriteBuffer );
\r
768 portRESET_PRIVILEGE( xRunningPrivileged );
\r
771 /*-----------------------------------------------------------*/
\r
773 #if ( configUSE_TRACE_FACILITY == 1 )
\r
774 void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
\r
776 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
778 vTaskStartTrace( pcBuffer, ulBufferSize );
\r
779 portRESET_PRIVILEGE( xRunningPrivileged );
\r
782 /*-----------------------------------------------------------*/
\r
784 #if ( configUSE_TRACE_FACILITY == 1 )
\r
785 unsigned long MPU_ulTaskEndTrace( void )
\r
787 unsigned long ulReturn;
\r
788 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
790 ulReturn = ulTaskEndTrace();
\r
791 portRESET_PRIVILEGE( xRunningPrivileged );
\r
795 /*-----------------------------------------------------------*/
\r
797 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
798 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
\r
800 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
802 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
803 portRESET_PRIVILEGE( xRunningPrivileged );
\r
806 /*-----------------------------------------------------------*/
\r
808 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
809 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
\r
811 pdTASK_HOOK_CODE xReturn;
\r
812 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
814 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
815 portRESET_PRIVILEGE( xRunningPrivileged );
\r
819 /*-----------------------------------------------------------*/
\r
821 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
822 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
\r
824 portBASE_TYPE xReturn;
\r
825 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
827 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
828 portRESET_PRIVILEGE( xRunningPrivileged );
\r
832 /*-----------------------------------------------------------*/
\r
834 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
835 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
\r
837 unsigned portBASE_TYPE uxReturn;
\r
838 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
840 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
841 portRESET_PRIVILEGE( xRunningPrivileged );
\r
845 /*-----------------------------------------------------------*/
\r
847 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
848 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
\r
850 xTaskHandle xReturn;
\r
851 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
853 xReturn = xTaskGetCurrentTaskHandle();
\r
854 portRESET_PRIVILEGE( xRunningPrivileged );
\r
858 /*-----------------------------------------------------------*/
\r
860 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
861 portBASE_TYPE MPU_xTaskGetSchedulerState( void )
\r
863 portBASE_TYPE xReturn;
\r
864 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
866 xReturn = xTaskGetSchedulerState();
\r
867 portRESET_PRIVILEGE( xRunningPrivileged );
\r
871 /*-----------------------------------------------------------*/
\r
873 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
\r
875 xQueueHandle xReturn;
\r
876 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
878 xReturn = xQueueCreate( uxQueueLength, uxItemSize );
\r
879 portRESET_PRIVILEGE( xRunningPrivileged );
\r
882 /*-----------------------------------------------------------*/
\r
884 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
886 signed portBASE_TYPE xReturn;
\r
887 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
889 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
890 portRESET_PRIVILEGE( xRunningPrivileged );
\r
893 /*-----------------------------------------------------------*/
\r
895 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
\r
897 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
898 unsigned portBASE_TYPE uxReturn;
\r
900 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
901 portRESET_PRIVILEGE( xRunningPrivileged );
\r
904 /*-----------------------------------------------------------*/
\r
906 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
908 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
909 signed portBASE_TYPE xReturn;
\r
911 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
912 portRESET_PRIVILEGE( xRunningPrivileged );
\r
915 /*-----------------------------------------------------------*/
\r
917 #if ( configUSE_MUTEXES == 1 )
\r
918 xQueueHandle MPU_xQueueCreateMutex( void )
\r
920 xQueueHandle xReturn;
\r
921 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
923 xReturn = xQueueCreateMutex();
\r
924 portRESET_PRIVILEGE( xRunningPrivileged );
\r
928 /*-----------------------------------------------------------*/
\r
930 #if configUSE_COUNTING_SEMAPHORES == 1
\r
931 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
\r
933 xQueueHandle xReturn;
\r
934 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
936 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
937 portRESET_PRIVILEGE( xRunningPrivileged );
\r
941 /*-----------------------------------------------------------*/
\r
943 #if ( configUSE_MUTEXES == 1 )
\r
944 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
\r
946 portBASE_TYPE xReturn;
\r
947 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
949 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
950 portRESET_PRIVILEGE( xRunningPrivileged );
\r
954 /*-----------------------------------------------------------*/
\r
956 #if ( configUSE_MUTEXES == 1 )
\r
957 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
\r
959 portBASE_TYPE xReturn;
\r
960 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
962 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
963 portRESET_PRIVILEGE( xRunningPrivileged );
\r
967 /*-----------------------------------------------------------*/
\r
969 #if configUSE_ALTERNATIVE_API == 1
\r
970 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
972 signed portBASE_TYPE xReturn;
\r
973 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
975 xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
976 portRESET_PRIVILEGE( xRunningPrivileged );
\r
980 /*-----------------------------------------------------------*/
\r
982 #if configUSE_ALTERNATIVE_API == 1
\r
983 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
985 signed portBASE_TYPE xReturn;
\r
986 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
988 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
989 portRESET_PRIVILEGE( xRunningPrivileged );
\r
993 /*-----------------------------------------------------------*/
\r
995 #if configQUEUE_REGISTRY_SIZE > 0
\r
996 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
\r
998 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1000 vQueueAddToRegistry( xQueue, pcName );
\r
1002 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1005 /*-----------------------------------------------------------*/
\r
1007 void *MPU_pvPortMalloc( size_t xSize )
\r
1010 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1012 pvReturn = pvPortMalloc( xSize );
\r
1014 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1018 /*-----------------------------------------------------------*/
\r
1020 void MPU_vPortFree( void *pv )
\r
1022 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1026 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1028 /*-----------------------------------------------------------*/
\r
1030 void MPU_vPortInitialiseBlocks( void )
\r
1032 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1034 vPortInitialiseBlocks();
\r
1036 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1038 /*-----------------------------------------------------------*/
\r
1040 size_t MPU_xPortGetFreeHeapSize( void )
\r
1043 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1045 xReturn = xPortGetFreeHeapSize();
\r
1047 portRESET_PRIVILEGE( xRunningPrivileged );
\r