2 FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 ***************************************************************************
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8 * + New to FreeRTOS, *
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10 * + Looking for basic training, *
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11 * + Wanting to improve your FreeRTOS skills and productivity *
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13 * then take a look at the FreeRTOS eBook *
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15 * "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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16 * http://www.FreeRTOS.org/Documentation *
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18 * A pdf reference manual is also available. Both are usually delivered *
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19 * to your inbox within 20 minutes to two hours when purchased between 8am *
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20 * and 8pm GMT (although please allow up to 24 hours in case of *
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21 * exceptional circumstances). Thank you for your support! *
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23 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 ***NOTE*** The exception to the GPL is included to allow you to distribute
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31 a combined work that includes FreeRTOS without being obliged to provide the
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32 source code for proprietary components outside of the FreeRTOS kernel.
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33 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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34 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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35 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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54 /*-----------------------------------------------------------
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55 * Implementation of functions defined in portable.h for the ARM CM3 port.
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56 *----------------------------------------------------------*/
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58 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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59 all the API functions to use the MPU wrappers. That should only be done when
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60 task.h is included from an application file. */
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61 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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63 /* Scheduler includes. */
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64 #include "FreeRTOS.h"
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68 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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70 /* Constants required to access and manipulate the NVIC. */
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71 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
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72 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
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73 #define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
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74 #define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
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75 #define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
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76 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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78 /* Constants required to access and manipulate the MPU. */
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79 #define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
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80 #define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
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81 #define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
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82 #define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
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83 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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84 #define portMPU_ENABLE ( 0x01UL )
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85 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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86 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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87 #define portMPU_REGION_VALID ( 0x10UL )
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88 #define portMPU_REGION_ENABLE ( 0x01UL )
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89 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
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90 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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92 /* Constants required to access and manipulate the SysTick. */
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93 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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94 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
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95 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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96 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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97 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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98 #define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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100 /* Constants required to set up the initial stack. */
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101 #define portINITIAL_XPSR ( 0x01000000 )
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102 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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103 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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105 /* Offsets in the stack to the parameters when inside the SVC handler. */
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106 #define portOFFSET_TO_PC ( 6 )
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108 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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109 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )
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111 /* Each task maintains its own interrupt status in the critical nesting
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112 variable. Note this is not saved as part of the task context as context
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113 switches can only occur when uxCriticalNesting is zero. */
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114 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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117 * Setup the timer to generate the tick interrupts.
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119 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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122 * Configure a number of standard MPU regions that are used by all tasks.
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124 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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127 * Return the smallest MPU region size that a given number of bytes will fit
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128 * into. The region size is returned as the value that should be programmed
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129 * into the region attribute register for that region.
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131 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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134 * Checks to see if being called from the context of an unprivileged task, and
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135 * if so raises the privilege level and returns false - otherwise does nothing
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136 * other than return true.
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138 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
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141 * Standard FreeRTOS exception handlers.
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143 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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144 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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145 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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148 * Starts the scheduler by restoring the context of the first task to run.
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150 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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153 * C portion of the SVC handler. The SVC handler is split between an asm entry
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154 * and a C wrapper for simplicity of coding and maintenance.
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156 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
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158 /*-----------------------------------------------------------*/
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161 * See header file for description.
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163 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
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165 /* Simulate the stack frame as it would be created by a context switch
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167 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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168 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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170 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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172 *pxTopOfStack = 0; /* LR */
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173 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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174 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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175 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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177 if( xRunPrivileged == pdTRUE )
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179 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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183 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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186 return pxTopOfStack;
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188 /*-----------------------------------------------------------*/
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190 void vPortSVCHandler( void )
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192 /* Assumes psp was in use. */
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195 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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198 " mrseq r0, msp \n"
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199 " mrsne r0, psp \n"
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203 " b prvSVCHandler \n"
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207 /* This will never get executed, but is required to prevent prvSVCHandler
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208 being removed by the optimiser. */
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209 prvSVCHandler( NULL );
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211 /*-----------------------------------------------------------*/
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213 static void prvSVCHandler( unsigned long *pulParam )
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215 unsigned char ucSVCNumber;
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217 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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218 xPSR. The first argument (r0) is pulParam[ 0 ]. */
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219 ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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220 switch( ucSVCNumber )
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222 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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223 prvRestoreContextOfFirstTask();
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226 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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229 case portSVC_prvRaisePrivilege : __asm volatile
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231 " mrs r1, control \n" /* Obtain current control value. */
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232 " bic r1, #1 \n" /* Set privilege bit. */
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233 " msr control, r1 \n" /* Write back new control value. */
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238 default : /* Unknown SVC call. */
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242 /*-----------------------------------------------------------*/
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244 static void prvRestoreContextOfFirstTask( void )
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248 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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251 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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252 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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254 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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255 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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256 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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257 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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258 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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259 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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260 " msr control, r3 \n"
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261 " msr psp, r0 \n" /* Restore the task stack pointer. */
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263 " msr basepri, r0 \n"
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264 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
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268 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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271 /*-----------------------------------------------------------*/
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274 * See header file for description.
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276 portBASE_TYPE xPortStartScheduler( void )
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278 /* Make PendSV and SysTick the same priroity as the kernel. */
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279 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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280 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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282 /* Configure the regions in the MPU that are common to all tasks. */
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285 /* Start the timer that generates the tick ISR. Interrupts are disabled
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287 prvSetupTimerInterrupt();
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289 /* Initialise the critical nesting count ready for the first task. */
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290 uxCriticalNesting = 0;
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292 /* Start the first task. */
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293 __asm volatile( " svc %0 \n"
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294 :: "i" (portSVC_START_SCHEDULER) );
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296 /* Should not get here! */
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299 /*-----------------------------------------------------------*/
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301 void vPortEndScheduler( void )
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303 /* It is unlikely that the CM3 port will require this function as there
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304 is nothing to return to. */
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306 /*-----------------------------------------------------------*/
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308 void vPortEnterCritical( void )
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310 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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312 portDISABLE_INTERRUPTS();
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313 uxCriticalNesting++;
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315 portRESET_PRIVILEGE( xRunningPrivileged );
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317 /*-----------------------------------------------------------*/
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319 void vPortExitCritical( void )
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321 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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323 uxCriticalNesting--;
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324 if( uxCriticalNesting == 0 )
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326 portENABLE_INTERRUPTS();
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328 portRESET_PRIVILEGE( xRunningPrivileged );
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330 /*-----------------------------------------------------------*/
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332 void xPortPendSVHandler( void )
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334 /* This is a naked function. */
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340 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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343 " mrs r1, control \n"
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344 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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345 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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347 " stmdb sp!, {r3, r14} \n"
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349 " msr basepri, r0 \n"
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350 " bl vTaskSwitchContext \n"
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352 " msr basepri, r0 \n"
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353 " ldmia sp!, {r3, r14} \n"
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354 " \n" /* Restore the context. */
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356 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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357 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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358 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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359 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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360 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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361 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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362 " msr control, r3 \n"
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368 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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369 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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372 /*-----------------------------------------------------------*/
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374 void xPortSysTickHandler( void )
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376 unsigned long ulDummy;
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378 /* If using preemption, also force a context switch. */
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379 #if configUSE_PREEMPTION == 1
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380 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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383 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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385 vTaskIncrementTick();
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387 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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389 /*-----------------------------------------------------------*/
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392 * Setup the systick timer to generate the tick interrupts at the required
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395 static void prvSetupTimerInterrupt( void )
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397 /* Configure SysTick to interrupt at the requested rate. */
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398 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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399 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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401 /*-----------------------------------------------------------*/
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403 static void prvSetupMPU( void )
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405 extern unsigned long __privileged_functions_end__[];
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406 extern unsigned long __FLASH_segment_start__[];
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407 extern unsigned long __FLASH_segment_end__[];
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408 extern unsigned long __privileged_data_start__[];
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409 extern unsigned long __privileged_data_end__[];
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411 /* Check the expected MPU is present. */
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412 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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414 /* First setup the entire flash for unprivileged read only access. */
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415 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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416 ( portMPU_REGION_VALID ) |
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417 ( portUNPRIVILEGED_FLASH_REGION );
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419 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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420 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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421 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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422 ( portMPU_REGION_ENABLE );
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424 /* Setup the first 16K for privileged only access (even though less
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425 than 10K is actually being used). This is where the kernel code is
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427 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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428 ( portMPU_REGION_VALID ) |
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429 ( portPRIVILEGED_FLASH_REGION );
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431 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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432 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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433 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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434 ( portMPU_REGION_ENABLE );
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436 /* Setup the privileged data RAM region. This is where the kernel data
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438 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
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439 ( portMPU_REGION_VALID ) |
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440 ( portPRIVILEGED_RAM_REGION );
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442 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
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443 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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444 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
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445 ( portMPU_REGION_ENABLE );
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447 /* By default allow everything to access the general peripherals. The
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448 system peripherals and registers are protected. */
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449 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
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450 ( portMPU_REGION_VALID ) |
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451 ( portGENERAL_PERIPHERALS_REGION );
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453 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
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454 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
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455 ( portMPU_REGION_ENABLE );
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457 /* Enable the memory fault exception. */
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458 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
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460 /* Enable the MPU with the background region configured. */
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461 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
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464 /*-----------------------------------------------------------*/
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466 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
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468 unsigned long ulRegionSize, ulReturnValue = 4;
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470 /* 32 is the smallest region size, 31 is the largest valid value for
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472 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
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474 if( ulActualSizeInBytes <= ulRegionSize )
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484 /* Shift the code by one before returning so it can be written directly
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485 into the the correct bit position of the attribute register. */
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486 return ( ulReturnValue << 1UL );
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488 /*-----------------------------------------------------------*/
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490 static portBASE_TYPE prvRaisePrivilege( void )
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494 " mrs r0, control \n"
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495 " tst r0, #1 \n" /* Is the task running privileged? */
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497 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
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498 " svcne %0 \n" /* Switch to privileged. */
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499 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
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501 :: "i" (portSVC_prvRaisePrivilege) : "r0"
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506 /*-----------------------------------------------------------*/
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508 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
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510 extern unsigned long __SRAM_segment_start__[];
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511 extern unsigned long __SRAM_segment_end__[];
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512 extern unsigned long __privileged_data_start__[];
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513 extern unsigned long __privileged_data_end__[];
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517 if( xRegions == NULL )
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519 /* No MPU regions are specified so allow access to all RAM. */
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520 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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521 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
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522 ( portMPU_REGION_VALID ) |
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523 ( portSTACK_REGION );
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525 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
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526 ( portMPU_REGION_READ_WRITE ) |
\r
527 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
528 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
\r
529 ( portMPU_REGION_ENABLE );
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531 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
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532 just removed the privileged only parameters. */
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533 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
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534 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
535 ( portMPU_REGION_VALID ) |
\r
536 ( portSTACK_REGION + 1 );
\r
538 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
539 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
540 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
541 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
542 ( portMPU_REGION_ENABLE );
\r
544 /* Invalidate all other regions. */
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545 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
547 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
548 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
553 /* This function is called automatically when the task is created - in
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554 which case the stack region parameters will be valid. At all other
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555 times the stack parameters will not be valid and it is assumed that the
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556 stack region has already been configured. */
\r
557 if( usStackDepth > 0 )
\r
559 /* Define the region that allows access to the stack. */
\r
560 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
561 ( ( unsigned long ) pxBottomOfStack ) |
\r
562 ( portMPU_REGION_VALID ) |
\r
563 ( portSTACK_REGION ); /* Region number. */
\r
565 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
566 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
567 ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
\r
568 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
569 ( portMPU_REGION_ENABLE );
\r
574 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
576 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
578 /* Translate the generic region definition contained in
\r
579 xRegions into the CM3 specific MPU settings that are then
\r
580 stored in xMPUSettings. */
\r
581 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
582 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
\r
583 ( portMPU_REGION_VALID ) |
\r
584 ( portSTACK_REGION + ul ); /* Region number. */
\r
586 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
587 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
588 ( xRegions[ lIndex ].ulParameters ) |
\r
589 ( portMPU_REGION_ENABLE );
\r
593 /* Invalidate the region. */
\r
594 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
595 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
602 /*-----------------------------------------------------------*/
\r
604 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
\r
606 signed portBASE_TYPE xReturn;
\r
607 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
609 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
610 portRESET_PRIVILEGE( xRunningPrivileged );
\r
613 /*-----------------------------------------------------------*/
\r
615 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
\r
617 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
619 vTaskAllocateMPURegions( xTask, xRegions );
\r
620 portRESET_PRIVILEGE( xRunningPrivileged );
\r
622 /*-----------------------------------------------------------*/
\r
624 #if ( INCLUDE_vTaskDelete == 1 )
\r
625 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
\r
627 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
629 vTaskDelete( pxTaskToDelete );
\r
630 portRESET_PRIVILEGE( xRunningPrivileged );
\r
633 /*-----------------------------------------------------------*/
\r
635 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
636 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
\r
638 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
640 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
641 portRESET_PRIVILEGE( xRunningPrivileged );
\r
644 /*-----------------------------------------------------------*/
\r
646 #if ( INCLUDE_vTaskDelay == 1 )
\r
647 void MPU_vTaskDelay( portTickType xTicksToDelay )
\r
649 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
651 vTaskDelay( xTicksToDelay );
\r
652 portRESET_PRIVILEGE( xRunningPrivileged );
\r
655 /*-----------------------------------------------------------*/
\r
657 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
658 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
\r
660 unsigned portBASE_TYPE uxReturn;
\r
661 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
663 uxReturn = uxTaskPriorityGet( pxTask );
\r
664 portRESET_PRIVILEGE( xRunningPrivileged );
\r
668 /*-----------------------------------------------------------*/
\r
670 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
671 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
\r
673 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
675 vTaskPrioritySet( pxTask, uxNewPriority );
\r
676 portRESET_PRIVILEGE( xRunningPrivileged );
\r
679 /*-----------------------------------------------------------*/
\r
681 #if ( INCLUDE_vTaskSuspend == 1 )
\r
682 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
\r
684 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
686 vTaskSuspend( pxTaskToSuspend );
\r
687 portRESET_PRIVILEGE( xRunningPrivileged );
\r
690 /*-----------------------------------------------------------*/
\r
692 #if ( INCLUDE_vTaskSuspend == 1 )
\r
693 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
\r
695 signed portBASE_TYPE xReturn;
\r
696 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
698 xReturn = xTaskIsTaskSuspended( xTask );
\r
699 portRESET_PRIVILEGE( xRunningPrivileged );
\r
703 /*-----------------------------------------------------------*/
\r
705 #if ( INCLUDE_vTaskSuspend == 1 )
\r
706 void MPU_vTaskResume( xTaskHandle pxTaskToResume )
\r
708 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
710 vTaskResume( pxTaskToResume );
\r
711 portRESET_PRIVILEGE( xRunningPrivileged );
\r
714 /*-----------------------------------------------------------*/
\r
716 void MPU_vTaskSuspendAll( void )
\r
718 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
721 portRESET_PRIVILEGE( xRunningPrivileged );
\r
723 /*-----------------------------------------------------------*/
\r
725 signed portBASE_TYPE MPU_xTaskResumeAll( void )
\r
727 signed portBASE_TYPE xReturn;
\r
728 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
730 xReturn = xTaskResumeAll();
\r
731 portRESET_PRIVILEGE( xRunningPrivileged );
\r
734 /*-----------------------------------------------------------*/
\r
736 portTickType MPU_xTaskGetTickCount( void )
\r
738 portTickType xReturn;
\r
739 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
741 xReturn = xTaskGetTickCount();
\r
742 portRESET_PRIVILEGE( xRunningPrivileged );
\r
745 /*-----------------------------------------------------------*/
\r
747 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
\r
749 unsigned portBASE_TYPE uxReturn;
\r
750 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
752 uxReturn = uxTaskGetNumberOfTasks();
\r
753 portRESET_PRIVILEGE( xRunningPrivileged );
\r
756 /*-----------------------------------------------------------*/
\r
758 #if ( configUSE_TRACE_FACILITY == 1 )
\r
759 void MPU_vTaskList( signed char *pcWriteBuffer )
\r
761 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
763 vTaskList( pcWriteBuffer );
\r
764 portRESET_PRIVILEGE( xRunningPrivileged );
\r
767 /*-----------------------------------------------------------*/
\r
769 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
770 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
\r
772 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
774 vTaskGetRunTimeStats( pcWriteBuffer );
\r
775 portRESET_PRIVILEGE( xRunningPrivileged );
\r
778 /*-----------------------------------------------------------*/
\r
780 #if ( configUSE_TRACE_FACILITY == 1 )
\r
781 void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
\r
783 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
785 vTaskStartTrace( pcBuffer, ulBufferSize );
\r
786 portRESET_PRIVILEGE( xRunningPrivileged );
\r
789 /*-----------------------------------------------------------*/
\r
791 #if ( configUSE_TRACE_FACILITY == 1 )
\r
792 unsigned long MPU_ulTaskEndTrace( void )
\r
794 unsigned long ulReturn;
\r
795 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
797 ulReturn = ulTaskEndTrace();
\r
798 portRESET_PRIVILEGE( xRunningPrivileged );
\r
802 /*-----------------------------------------------------------*/
\r
804 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
805 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
\r
807 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
809 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
810 portRESET_PRIVILEGE( xRunningPrivileged );
\r
813 /*-----------------------------------------------------------*/
\r
815 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
816 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
\r
818 pdTASK_HOOK_CODE xReturn;
\r
819 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
821 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
822 portRESET_PRIVILEGE( xRunningPrivileged );
\r
826 /*-----------------------------------------------------------*/
\r
828 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
829 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
\r
831 portBASE_TYPE xReturn;
\r
832 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
834 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
835 portRESET_PRIVILEGE( xRunningPrivileged );
\r
839 /*-----------------------------------------------------------*/
\r
841 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
842 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
\r
844 unsigned portBASE_TYPE uxReturn;
\r
845 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
847 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
848 portRESET_PRIVILEGE( xRunningPrivileged );
\r
852 /*-----------------------------------------------------------*/
\r
854 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
855 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
\r
857 xTaskHandle xReturn;
\r
858 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
860 xReturn = xTaskGetCurrentTaskHandle();
\r
861 portRESET_PRIVILEGE( xRunningPrivileged );
\r
865 /*-----------------------------------------------------------*/
\r
867 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
868 portBASE_TYPE MPU_xTaskGetSchedulerState( void )
\r
870 portBASE_TYPE xReturn;
\r
871 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
873 xReturn = xTaskGetSchedulerState();
\r
874 portRESET_PRIVILEGE( xRunningPrivileged );
\r
878 /*-----------------------------------------------------------*/
\r
880 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
\r
882 xQueueHandle xReturn;
\r
883 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
885 xReturn = xQueueCreate( uxQueueLength, uxItemSize );
\r
886 portRESET_PRIVILEGE( xRunningPrivileged );
\r
889 /*-----------------------------------------------------------*/
\r
891 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
893 signed portBASE_TYPE xReturn;
\r
894 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
896 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
897 portRESET_PRIVILEGE( xRunningPrivileged );
\r
900 /*-----------------------------------------------------------*/
\r
902 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
\r
904 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
905 unsigned portBASE_TYPE uxReturn;
\r
907 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
908 portRESET_PRIVILEGE( xRunningPrivileged );
\r
911 /*-----------------------------------------------------------*/
\r
913 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
915 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
916 signed portBASE_TYPE xReturn;
\r
918 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
919 portRESET_PRIVILEGE( xRunningPrivileged );
\r
922 /*-----------------------------------------------------------*/
\r
924 #if ( configUSE_MUTEXES == 1 )
\r
925 xQueueHandle MPU_xQueueCreateMutex( void )
\r
927 xQueueHandle xReturn;
\r
928 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
930 xReturn = xQueueCreateMutex();
\r
931 portRESET_PRIVILEGE( xRunningPrivileged );
\r
935 /*-----------------------------------------------------------*/
\r
937 #if configUSE_COUNTING_SEMAPHORES == 1
\r
938 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
\r
940 xQueueHandle xReturn;
\r
941 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
943 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
944 portRESET_PRIVILEGE( xRunningPrivileged );
\r
948 /*-----------------------------------------------------------*/
\r
950 #if ( configUSE_MUTEXES == 1 )
\r
951 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
\r
953 portBASE_TYPE xReturn;
\r
954 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
956 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
957 portRESET_PRIVILEGE( xRunningPrivileged );
\r
961 /*-----------------------------------------------------------*/
\r
963 #if ( configUSE_MUTEXES == 1 )
\r
964 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
\r
966 portBASE_TYPE xReturn;
\r
967 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
969 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
970 portRESET_PRIVILEGE( xRunningPrivileged );
\r
974 /*-----------------------------------------------------------*/
\r
976 #if configUSE_ALTERNATIVE_API == 1
\r
977 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
979 signed portBASE_TYPE xReturn;
\r
980 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
982 xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
983 portRESET_PRIVILEGE( xRunningPrivileged );
\r
987 /*-----------------------------------------------------------*/
\r
989 #if configUSE_ALTERNATIVE_API == 1
\r
990 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
992 signed portBASE_TYPE xReturn;
\r
993 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
995 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
996 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1000 /*-----------------------------------------------------------*/
\r
1002 #if configQUEUE_REGISTRY_SIZE > 0
\r
1003 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
\r
1005 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1007 vQueueAddToRegistry( xQueue, pcName );
\r
1009 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1012 /*-----------------------------------------------------------*/
\r
1014 void *MPU_pvPortMalloc( size_t xSize )
\r
1017 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1019 pvReturn = pvPortMalloc( xSize );
\r
1021 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1025 /*-----------------------------------------------------------*/
\r
1027 void MPU_vPortFree( void *pv )
\r
1029 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1033 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1035 /*-----------------------------------------------------------*/
\r
1037 void MPU_vPortInitialiseBlocks( void )
\r
1039 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1041 vPortInitialiseBlocks();
\r
1043 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1045 /*-----------------------------------------------------------*/
\r
1047 size_t MPU_xPortGetFreeHeapSize( void )
\r
1050 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1052 xReturn = xPortGetFreeHeapSize();
\r
1054 portRESET_PRIVILEGE( xRunningPrivileged );
\r