2 FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * The FreeRTOS eBook and reference manual are available to purchase for a *
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29 * small fee. Help yourself get started quickly while also helping the *
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30 * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *
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32 ***************************************************************************
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36 Please ensure to read the configuration and relevant port sections of the
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37 online documentation.
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39 http://www.FreeRTOS.org - Documentation, latest information, license and
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42 http://www.SafeRTOS.com - A version that is certified for use in safety
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45 http://www.OpenRTOS.com - Commercial support, development, porting,
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46 licensing and training services.
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49 /*-----------------------------------------------------------
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50 * Implementation of functions defined in portable.h for the ARM CM3 port.
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51 *----------------------------------------------------------*/
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53 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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54 all the API functions to use the MPU wrappers. That should only be done when
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55 task.h is included from an application file. */
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56 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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58 /* Scheduler includes. */
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59 #include "FreeRTOS.h"
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63 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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65 /* Constants required to access and manipulate the NVIC. */
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66 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
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67 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
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68 #define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
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69 #define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
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70 #define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
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71 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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73 /* Constants required to access and manipulate the MPU. */
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74 #define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
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75 #define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
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76 #define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
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77 #define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
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78 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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79 #define portMPU_ENABLE ( 0x01UL )
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80 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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81 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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82 #define portMPU_REGION_VALID ( 0x10UL )
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83 #define portMPU_REGION_ENABLE ( 0x01UL )
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84 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
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85 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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87 /* Constants required to access and manipulate the SysTick. */
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88 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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89 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
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90 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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91 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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92 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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93 #define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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94 #define portNVIC_TEMP_SVC_PRI ( 0x01UL << 24UL )
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96 /* Constants required to set up the initial stack. */
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97 #define portINITIAL_XPSR ( 0x01000000 )
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98 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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99 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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101 /* Offsets in the stack to the parameters when inside the SVC handler. */
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102 #define portOFFSET_TO_PC ( 6 )
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104 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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105 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )
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107 /* Each task maintains its own interrupt status in the critical nesting
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108 variable. Note this is not saved as part of the task context as context
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109 switches can only occur when uxCriticalNesting is zero. */
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110 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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113 * Setup the timer to generate the tick interrupts.
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115 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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118 * Configure a number of standard MPU regions that are used by all tasks.
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120 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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123 * Return the smallest MPU region size that a given number of bytes will fit
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124 * into. The region size is returned as the value that should be programmed
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125 * into the region attribute register for that region.
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127 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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130 * Checks to see if being called from the context of an unprivileged task, and
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131 * if so raises the privilege level and returns false - otherwise does nothing
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132 * other than return true.
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134 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
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137 * Standard FreeRTOS exception handlers.
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139 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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140 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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141 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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144 * Starts the scheduler by restoring the context of the first task to run.
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146 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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149 * C portion of the SVC handler. The SVC handler is split between an asm entry
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150 * and a C wrapper for simplicity of coding and maintenance.
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152 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
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154 /*-----------------------------------------------------------*/
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157 * See header file for description.
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159 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
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161 /* Simulate the stack frame as it would be created by a context switch
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163 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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165 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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167 *pxTopOfStack = 0; /* LR */
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168 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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169 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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170 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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172 if( xRunPrivileged == pdTRUE )
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174 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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178 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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181 return pxTopOfStack;
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183 /*-----------------------------------------------------------*/
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185 void vPortSVCHandler( void )
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187 /* Assumes psp was in use. */
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190 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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193 " mrseq r0, msp \n"
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194 " mrsne r0, psp \n"
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198 " b prvSVCHandler \n"
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202 /* This will never get executed, but is required to prevent prvSVCHandler
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203 being removed by the optimiser. */
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204 prvSVCHandler( NULL );
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206 /*-----------------------------------------------------------*/
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208 static void prvSVCHandler( unsigned long *pulParam )
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210 unsigned char ucSVCNumber;
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212 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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213 xPSR. The first argument (r0) is pulParam[ 0 ]. */
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214 ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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215 switch( ucSVCNumber )
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217 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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218 prvRestoreContextOfFirstTask();
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221 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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224 case portSVC_prvRaisePrivilege : __asm volatile
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226 " mrs r1, control \n" /* Obtain current control value. */
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227 " bic r1, #1 \n" /* Set privilege bit. */
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228 " msr control, r1 \n" /* Write back new control value. */
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233 default : /* Unknown SVC call. */
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237 /*-----------------------------------------------------------*/
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239 static void prvRestoreContextOfFirstTask( void )
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243 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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246 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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247 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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249 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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250 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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251 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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252 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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253 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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254 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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255 " msr control, r3 \n"
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256 " msr psp, r0 \n" /* Restore the task stack pointer. */
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258 " msr basepri, r0 \n"
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259 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
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263 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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266 /*-----------------------------------------------------------*/
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269 * See header file for description.
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271 portBASE_TYPE xPortStartScheduler( void )
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273 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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274 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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275 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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276 *(portNVIC_SYSPRI1) |= portNVIC_TEMP_SVC_PRI;
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278 /* Configure the regions in the MPU that are common to all tasks. */
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281 /* Start the timer that generates the tick ISR. Interrupts are disabled
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283 prvSetupTimerInterrupt();
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285 /* Initialise the critical nesting count ready for the first task. */
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286 uxCriticalNesting = 0;
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288 /* Start the first task. */
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289 __asm volatile( " svc %0 \n"
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290 :: "i" (portSVC_START_SCHEDULER) );
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292 /* Should not get here! */
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295 /*-----------------------------------------------------------*/
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297 void vPortEndScheduler( void )
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299 /* It is unlikely that the CM3 port will require this function as there
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300 is nothing to return to. */
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302 /*-----------------------------------------------------------*/
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304 void vPortEnterCritical( void )
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306 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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308 portDISABLE_INTERRUPTS();
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309 uxCriticalNesting++;
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311 portRESET_PRIVILEGE( xRunningPrivileged );
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313 /*-----------------------------------------------------------*/
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315 void vPortExitCritical( void )
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317 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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319 uxCriticalNesting--;
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320 if( uxCriticalNesting == 0 )
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322 portENABLE_INTERRUPTS();
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324 portRESET_PRIVILEGE( xRunningPrivileged );
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326 /*-----------------------------------------------------------*/
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328 void xPortPendSVHandler( void )
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330 /* This is a naked function. */
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336 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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339 " mrs r1, control \n"
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340 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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341 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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343 " stmdb sp!, {r3, r14} \n"
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345 " msr basepri, r0 \n"
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346 " bl vTaskSwitchContext \n"
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348 " msr basepri, r0 \n"
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349 " ldmia sp!, {r3, r14} \n"
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350 " \n" /* Restore the context. */
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352 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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353 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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354 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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355 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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356 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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357 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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358 " msr control, r3 \n"
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364 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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365 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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368 /*-----------------------------------------------------------*/
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370 void xPortSysTickHandler( void )
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372 unsigned long ulDummy;
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374 /* If using preemption, also force a context switch. */
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375 #if configUSE_PREEMPTION == 1
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376 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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379 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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381 vTaskIncrementTick();
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383 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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385 /*-----------------------------------------------------------*/
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388 * Setup the systick timer to generate the tick interrupts at the required
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391 static void prvSetupTimerInterrupt( void )
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393 /* Configure SysTick to interrupt at the requested rate. */
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394 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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395 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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397 /*-----------------------------------------------------------*/
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399 static void prvSetupMPU( void )
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401 extern unsigned long __privileged_functions_end__[];
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402 extern unsigned long __FLASH_segment_start__[];
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403 extern unsigned long __FLASH_segment_end__[];
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404 extern unsigned long __privileged_data_start__[];
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405 extern unsigned long __privileged_data_end__[];
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407 /* Check the expected MPU is present. */
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408 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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410 /* First setup the entire flash for unprivileged read only access. */
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411 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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412 ( portMPU_REGION_VALID ) |
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413 ( portUNPRIVILEGED_FLASH_REGION );
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415 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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416 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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417 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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418 ( portMPU_REGION_ENABLE );
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420 /* Setup the first 16K for privileged only access (even though less
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421 than 10K is actually being used). This is where the kernel code is
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423 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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424 ( portMPU_REGION_VALID ) |
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425 ( portPRIVILEGED_FLASH_REGION );
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427 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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428 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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429 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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430 ( portMPU_REGION_ENABLE );
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432 /* Setup the privileged data RAM region. This is where the kernel data
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434 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
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435 ( portMPU_REGION_VALID ) |
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436 ( portPRIVILEGED_RAM_REGION );
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438 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
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439 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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440 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
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441 ( portMPU_REGION_ENABLE );
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443 /* By default allow everything to access the general peripherals. The
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444 system peripherals and registers are protected. */
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445 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
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446 ( portMPU_REGION_VALID ) |
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447 ( portGENERAL_PERIPHERALS_REGION );
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449 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
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450 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
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451 ( portMPU_REGION_ENABLE );
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453 /* Enable the memory fault exception. */
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454 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
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456 /* Enable the MPU with the background region configured. */
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457 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
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460 /*-----------------------------------------------------------*/
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462 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
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464 unsigned long ulRegionSize, ulReturnValue = 4;
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466 /* 32 is the smallest region size, 31 is the largest valid value for
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468 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
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470 if( ulActualSizeInBytes <= ulRegionSize )
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480 /* Shift the code by one before returning so it can be written directly
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481 into the the correct bit position of the attribute register. */
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482 return ( ulReturnValue << 1UL );
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484 /*-----------------------------------------------------------*/
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486 static portBASE_TYPE prvRaisePrivilege( void )
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490 " mrs r0, control \n"
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491 " tst r0, #1 \n" /* Is the task running privileged? */
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493 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
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494 " svcne %0 \n" /* Switch to privileged. */
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495 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
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497 :: "i" (portSVC_prvRaisePrivilege) : "r0"
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502 /*-----------------------------------------------------------*/
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504 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
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506 extern unsigned long __SRAM_segment_start__[];
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507 extern unsigned long __SRAM_segment_end__[];
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508 extern unsigned long __privileged_data_start__[];
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509 extern unsigned long __privileged_data_end__[];
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513 if( xRegions == NULL )
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515 /* No MPU regions are specified so allow access to all RAM. */
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516 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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517 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
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518 ( portMPU_REGION_VALID ) |
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519 ( portSTACK_REGION );
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521 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
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522 ( portMPU_REGION_READ_WRITE ) |
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523 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
524 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
\r
525 ( portMPU_REGION_ENABLE );
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527 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
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528 just removed the privileged only parameters. */
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529 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
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530 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
531 ( portMPU_REGION_VALID ) |
\r
532 ( portSTACK_REGION + 1 );
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534 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
\r
535 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
536 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
537 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
538 ( portMPU_REGION_ENABLE );
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540 /* Invalidate all other regions. */
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541 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
543 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
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544 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
549 /* This function is called automatically when the task is created - in
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550 which case the stack region parameters will be valid. At all other
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551 times the stack parameters will not be valid and it is assumed that the
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552 stack region has already been configured. */
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553 if( usStackDepth > 0 )
\r
555 /* Define the region that allows access to the stack. */
\r
556 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
557 ( ( unsigned long ) pxBottomOfStack ) |
\r
558 ( portMPU_REGION_VALID ) |
\r
559 ( portSTACK_REGION ); /* Region number. */
\r
561 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
\r
562 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
563 ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
\r
564 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
565 ( portMPU_REGION_ENABLE );
\r
570 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
572 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
574 /* Translate the generic region definition contained in
\r
575 xRegions into the CM3 specific MPU settings that are then
\r
576 stored in xMPUSettings. */
\r
577 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
578 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
\r
579 ( portMPU_REGION_VALID ) |
\r
580 ( portSTACK_REGION + ul ); /* Region number. */
\r
582 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
583 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
584 ( xRegions[ lIndex ].ulParameters ) |
\r
585 ( portMPU_REGION_ENABLE );
\r
589 /* Invalidate the region. */
\r
590 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
591 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
598 /*-----------------------------------------------------------*/
\r
600 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
\r
602 signed portBASE_TYPE xReturn;
\r
603 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
605 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
\r
606 portRESET_PRIVILEGE( xRunningPrivileged );
\r
609 /*-----------------------------------------------------------*/
\r
611 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
\r
613 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
615 vTaskAllocateMPURegions( xTask, xRegions );
\r
616 portRESET_PRIVILEGE( xRunningPrivileged );
\r
618 /*-----------------------------------------------------------*/
\r
620 #if ( INCLUDE_vTaskDelete == 1 )
\r
621 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
\r
623 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
625 vTaskDelete( pxTaskToDelete );
\r
626 portRESET_PRIVILEGE( xRunningPrivileged );
\r
629 /*-----------------------------------------------------------*/
\r
631 #if ( INCLUDE_vTaskDelayUntil == 1 )
\r
632 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
\r
634 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
636 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
\r
637 portRESET_PRIVILEGE( xRunningPrivileged );
\r
640 /*-----------------------------------------------------------*/
\r
642 #if ( INCLUDE_vTaskDelay == 1 )
\r
643 void MPU_vTaskDelay( portTickType xTicksToDelay )
\r
645 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
647 vTaskDelay( xTicksToDelay );
\r
648 portRESET_PRIVILEGE( xRunningPrivileged );
\r
651 /*-----------------------------------------------------------*/
\r
653 #if ( INCLUDE_uxTaskPriorityGet == 1 )
\r
654 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
\r
656 unsigned portBASE_TYPE uxReturn;
\r
657 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
659 uxReturn = uxTaskPriorityGet( pxTask );
\r
660 portRESET_PRIVILEGE( xRunningPrivileged );
\r
664 /*-----------------------------------------------------------*/
\r
666 #if ( INCLUDE_vTaskPrioritySet == 1 )
\r
667 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
\r
669 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
671 vTaskPrioritySet( pxTask, uxNewPriority );
\r
672 portRESET_PRIVILEGE( xRunningPrivileged );
\r
675 /*-----------------------------------------------------------*/
\r
677 #if ( INCLUDE_vTaskSuspend == 1 )
\r
678 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
\r
680 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
682 vTaskSuspend( pxTaskToSuspend );
\r
683 portRESET_PRIVILEGE( xRunningPrivileged );
\r
686 /*-----------------------------------------------------------*/
\r
688 #if ( INCLUDE_vTaskSuspend == 1 )
\r
689 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
\r
691 signed portBASE_TYPE xReturn;
\r
692 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
694 xReturn = xTaskIsTaskSuspended( xTask );
\r
695 portRESET_PRIVILEGE( xRunningPrivileged );
\r
699 /*-----------------------------------------------------------*/
\r
701 #if ( INCLUDE_vTaskSuspend == 1 )
\r
702 void MPU_vTaskResume( xTaskHandle pxTaskToResume )
\r
704 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
706 vTaskResume( pxTaskToResume );
\r
707 portRESET_PRIVILEGE( xRunningPrivileged );
\r
710 /*-----------------------------------------------------------*/
\r
712 void MPU_vTaskSuspendAll( void )
\r
714 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
717 portRESET_PRIVILEGE( xRunningPrivileged );
\r
719 /*-----------------------------------------------------------*/
\r
721 signed portBASE_TYPE MPU_xTaskResumeAll( void )
\r
723 signed portBASE_TYPE xReturn;
\r
724 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
726 xReturn = xTaskResumeAll();
\r
727 portRESET_PRIVILEGE( xRunningPrivileged );
\r
730 /*-----------------------------------------------------------*/
\r
732 portTickType MPU_xTaskGetTickCount( void )
\r
734 portTickType xReturn;
\r
735 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
737 xReturn = xTaskGetTickCount();
\r
738 portRESET_PRIVILEGE( xRunningPrivileged );
\r
741 /*-----------------------------------------------------------*/
\r
743 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
\r
745 unsigned portBASE_TYPE uxReturn;
\r
746 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
748 uxReturn = uxTaskGetNumberOfTasks();
\r
749 portRESET_PRIVILEGE( xRunningPrivileged );
\r
752 /*-----------------------------------------------------------*/
\r
754 #if ( configUSE_TRACE_FACILITY == 1 )
\r
755 void MPU_vTaskList( signed char *pcWriteBuffer )
\r
757 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
759 vTaskList( pcWriteBuffer );
\r
760 portRESET_PRIVILEGE( xRunningPrivileged );
\r
763 /*-----------------------------------------------------------*/
\r
765 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
766 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
\r
768 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
770 vTaskGetRunTimeStats( pcWriteBuffer );
\r
771 portRESET_PRIVILEGE( xRunningPrivileged );
\r
774 /*-----------------------------------------------------------*/
\r
776 #if ( configUSE_TRACE_FACILITY == 1 )
\r
777 void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
\r
779 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
781 vTaskStartTrace( pcBuffer, ulBufferSize );
\r
782 portRESET_PRIVILEGE( xRunningPrivileged );
\r
785 /*-----------------------------------------------------------*/
\r
787 #if ( configUSE_TRACE_FACILITY == 1 )
\r
788 unsigned long MPU_ulTaskEndTrace( void )
\r
790 unsigned long ulReturn;
\r
791 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
793 ulReturn = ulTaskEndTrace();
\r
794 portRESET_PRIVILEGE( xRunningPrivileged );
\r
798 /*-----------------------------------------------------------*/
\r
800 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
801 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
\r
803 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
805 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
806 portRESET_PRIVILEGE( xRunningPrivileged );
\r
809 /*-----------------------------------------------------------*/
\r
811 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
812 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
\r
814 pdTASK_HOOK_CODE xReturn;
\r
815 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
817 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
818 portRESET_PRIVILEGE( xRunningPrivileged );
\r
822 /*-----------------------------------------------------------*/
\r
824 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
825 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
\r
827 portBASE_TYPE xReturn;
\r
828 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
830 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
831 portRESET_PRIVILEGE( xRunningPrivileged );
\r
835 /*-----------------------------------------------------------*/
\r
837 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
838 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
\r
840 unsigned portBASE_TYPE uxReturn;
\r
841 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
843 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
844 portRESET_PRIVILEGE( xRunningPrivileged );
\r
848 /*-----------------------------------------------------------*/
\r
850 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
851 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
\r
853 xTaskHandle xReturn;
\r
854 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
856 xReturn = xTaskGetCurrentTaskHandle();
\r
857 portRESET_PRIVILEGE( xRunningPrivileged );
\r
861 /*-----------------------------------------------------------*/
\r
863 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
864 portBASE_TYPE MPU_xTaskGetSchedulerState( void )
\r
866 portBASE_TYPE xReturn;
\r
867 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
869 xReturn = xTaskGetSchedulerState();
\r
870 portRESET_PRIVILEGE( xRunningPrivileged );
\r
874 /*-----------------------------------------------------------*/
\r
876 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
\r
878 xQueueHandle xReturn;
\r
879 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
881 xReturn = xQueueCreate( uxQueueLength, uxItemSize );
\r
882 portRESET_PRIVILEGE( xRunningPrivileged );
\r
885 /*-----------------------------------------------------------*/
\r
887 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
889 signed portBASE_TYPE xReturn;
\r
890 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
892 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
893 portRESET_PRIVILEGE( xRunningPrivileged );
\r
896 /*-----------------------------------------------------------*/
\r
898 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
\r
900 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
901 unsigned portBASE_TYPE uxReturn;
\r
903 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
904 portRESET_PRIVILEGE( xRunningPrivileged );
\r
907 /*-----------------------------------------------------------*/
\r
909 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
911 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
912 signed portBASE_TYPE xReturn;
\r
914 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
915 portRESET_PRIVILEGE( xRunningPrivileged );
\r
918 /*-----------------------------------------------------------*/
\r
920 #if ( configUSE_MUTEXES == 1 )
\r
921 xQueueHandle MPU_xQueueCreateMutex( void )
\r
923 xQueueHandle xReturn;
\r
924 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
926 xReturn = xQueueCreateMutex();
\r
927 portRESET_PRIVILEGE( xRunningPrivileged );
\r
931 /*-----------------------------------------------------------*/
\r
933 #if configUSE_COUNTING_SEMAPHORES == 1
\r
934 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
\r
936 xQueueHandle xReturn;
\r
937 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
939 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
940 portRESET_PRIVILEGE( xRunningPrivileged );
\r
944 /*-----------------------------------------------------------*/
\r
946 #if ( configUSE_MUTEXES == 1 )
\r
947 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
\r
949 portBASE_TYPE xReturn;
\r
950 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
952 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
953 portRESET_PRIVILEGE( xRunningPrivileged );
\r
957 /*-----------------------------------------------------------*/
\r
959 #if ( configUSE_MUTEXES == 1 )
\r
960 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
\r
962 portBASE_TYPE xReturn;
\r
963 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
965 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
966 portRESET_PRIVILEGE( xRunningPrivileged );
\r
970 /*-----------------------------------------------------------*/
\r
972 #if configUSE_ALTERNATIVE_API == 1
\r
973 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
975 signed portBASE_TYPE xReturn;
\r
976 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
978 xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
979 portRESET_PRIVILEGE( xRunningPrivileged );
\r
983 /*-----------------------------------------------------------*/
\r
985 #if configUSE_ALTERNATIVE_API == 1
\r
986 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
988 signed portBASE_TYPE xReturn;
\r
989 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
991 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
992 portRESET_PRIVILEGE( xRunningPrivileged );
\r
996 /*-----------------------------------------------------------*/
\r
998 #if configQUEUE_REGISTRY_SIZE > 0
\r
999 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
\r
1001 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1003 vQueueAddToRegistry( xQueue, pcName );
\r
1005 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1008 /*-----------------------------------------------------------*/
\r
1010 void *MPU_pvPortMalloc( size_t xSize )
\r
1013 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1015 pvReturn = pvPortMalloc( xSize );
\r
1017 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1021 /*-----------------------------------------------------------*/
\r
1023 void MPU_vPortFree( void *pv )
\r
1025 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1029 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1031 /*-----------------------------------------------------------*/
\r
1033 void MPU_vPortInitialiseBlocks( void )
\r
1035 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1037 vPortInitialiseBlocks();
\r
1039 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1041 /*-----------------------------------------------------------*/
\r
1043 size_t MPU_xPortGetFreeHeapSize( void )
\r
1046 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1048 xReturn = xPortGetFreeHeapSize();
\r
1050 portRESET_PRIVILEGE( xRunningPrivileged );
\r