git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
   3 \r
   4     This file is part of the FreeRTOS distribution.\r
   5 \r
   6     FreeRTOS is free software; you can redistribute it and/or modify it    under\r
   7     the terms of the GNU General Public License (version 2) as published by the\r
   8     Free Software Foundation and modified by the FreeRTOS exception.\r
   9     **NOTE** The exception to the GPL is included to allow you to distribute a\r
  10     combined work that includes FreeRTOS without being obliged to provide the\r
  11     source code for proprietary components outside of the FreeRTOS kernel.\r
  12     Alternative commercial license and support terms are also available upon\r
  13     request.  See the licensing section of http://www.FreeRTOS.org for full\r
  14     license details.\r
  15 \r
  16     FreeRTOS is distributed in the hope that it will be useful,    but WITHOUT\r
  17     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  18     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  19     more details.\r
  20 \r
  21     You should have received a copy of the GNU General Public License along\r
  22     with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
  23     Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
  24 \r
  25 \r
  26     ***************************************************************************\r
  27     *                                                                         *\r
  28     * The FreeRTOS eBook and reference manual are available to purchase for a *\r
  29     * small fee. Help yourself get started quickly while also helping the     *\r
  30     * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
  31     *                                                                         *\r
  32     ***************************************************************************\r
  33 \r
  34     1 tab == 4 spaces!\r
  35 \r
  36     Please ensure to read the configuration and relevant port sections of the\r
  37     online documentation.\r
  38 \r
  39     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  40     contact details.\r
  41 \r
  42     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  43     critical systems.\r
  44 \r
  45     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  46     licensing and training services.\r
  47 */\r
  48 \r
  49 /*-----------------------------------------------------------\r
  50  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  51  *----------------------------------------------------------*/\r
  52 \r
  53 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  54 all the API functions to use the MPU wrappers.  That should only be done when\r
  55 task.h is included from an application file. */\r
  56 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  57 \r
  58 /* Scheduler includes. */\r
  59 #include "FreeRTOS.h"\r
  60 #include "task.h"\r
  61 #include "queue.h"\r
  62 \r
  63 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  64 \r
  65 /* Constants required to access and manipulate the NVIC. */\r
  66 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  67 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  68 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  69 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  70 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  71 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  72 \r
  73 /* Constants required to access and manipulate the MPU. */\r
  74 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
  75 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
  76 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
  77 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
  78 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
  79 #define portMPU_ENABLE                                                  ( 0x01UL )\r
  80 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
  81 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
  82 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
  83 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
  84 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
  85 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
  86 \r
  87 /* Constants required to access and manipulate the SysTick. */\r
  88 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
  89 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
  90 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
  91 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
  92 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  93 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  94 \r
  95 /* Constants required to set up the initial stack. */\r
  96 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
  97 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
  98 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
  99 \r
 100 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 101 #define portOFFSET_TO_PC                                                ( 6 )\r
 102 \r
 103 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 104 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )\r
 105 \r
 106 /* Each task maintains its own interrupt status in the critical nesting\r
 107 variable.  Note this is not saved as part of the task context as context\r
 108 switches can only occur when uxCriticalNesting is zero. */\r
 109 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 110 \r
 111 /*\r
 112  * Setup the timer to generate the tick interrupts.\r
 113  */\r
 114 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 115 \r
 116 /*\r
 117  * Configure a number of standard MPU regions that are used by all tasks.\r
 118  */\r
 119 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 120 \r
 121 /* \r
 122  * Return the smallest MPU region size that a given number of bytes will fit\r
 123  * into.  The region size is returned as the value that should be programmed\r
 124  * into the region attribute register for that region.\r
 125  */\r
 126 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 127 \r
 128 /* \r
 129  * Checks to see if being called from the context of an unprivileged task, and\r
 130  * if so raises the privilege level and returns false - otherwise does nothing\r
 131  * other than return true.\r
 132  */\r
 133 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 134 \r
 135 /*\r
 136  * Standard FreeRTOS exception handlers.\r
 137  */\r
 138 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 139 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 140 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 141 \r
 142 /*\r
 143  * Starts the scheduler by restoring the context of the first task to run.\r
 144  */\r
 145 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 146 \r
 147 /*\r
 148  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 149  * and a C wrapper for simplicity of coding and maintenance.\r
 150  */\r
 151 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 152 \r
 153 /*-----------------------------------------------------------*/\r
 154 \r
 155 /*\r
 156  * See header file for description.\r
 157  */\r
 158 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 159 {\r
 160         /* Simulate the stack frame as it would be created by a context switch\r
 161         interrupt. */\r
 162         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 163         pxTopOfStack--;\r
 164         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 165         pxTopOfStack--;\r
 166         *pxTopOfStack = 0;      /* LR */\r
 167         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 168         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 169         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 170 \r
 171         if( xRunPrivileged == pdTRUE )\r
 172         {\r
 173                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 174         }\r
 175         else\r
 176         {\r
 177                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 178         }\r
 179 \r
 180         return pxTopOfStack;\r
 181 }\r
 182 /*-----------------------------------------------------------*/\r
 183 \r
 184 void vPortSVCHandler( void )\r
 185 {\r
 186         /* Assumes psp was in use. */\r
 187         __asm volatile \r
 188         (\r
 189                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 190                         "       tst lr, #4                                              \n"\r
 191                         "       ite eq                                                  \n"\r
 192                         "       mrseq r0, msp                                   \n"\r
 193                         "       mrsne r0, psp                                   \n"\r
 194                 #else\r
 195                         "       mrs r0, psp                                             \n"\r
 196                 #endif\r
 197                         "       b prvSVCHandler                                 \n"\r
 198                         :::"r0"\r
 199         );\r
 200 \r
 201         /* This will never get executed, but is required to prevent prvSVCHandler\r
 202         being removed by the optimiser. */\r
 203         prvSVCHandler( NULL );\r
 204 }\r
 205 /*-----------------------------------------------------------*/\r
 206 \r
 207 static void prvSVCHandler(      unsigned long *pulParam )\r
 208 {\r
 209 unsigned char ucSVCNumber;\r
 210 \r
 211         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 212         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 213         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 214         switch( ucSVCNumber )\r
 215         {\r
 216                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 217                                                                                         prvRestoreContextOfFirstTask();\r
 218                                                                                         break;\r
 219 \r
 220                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 221                                                                                         break;\r
 222 \r
 223                 case portSVC_prvRaisePrivilege  :       __asm volatile \r
 224                                                                                         (\r
 225                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 226                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 227                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 228                                                                                                 :::"r1"\r
 229                                                                                         );\r
 230                                                                                         break;\r
 231 \r
 232                 default                                                 :       /* Unknown SVC call. */\r
 233                                                                                         break;\r
 234         }\r
 235 }\r
 236 /*-----------------------------------------------------------*/\r
 237 \r
 238 static void prvRestoreContextOfFirstTask( void )\r
 239 {\r
 240         __asm volatile \r
 241         (\r
 242                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 243                 "       ldr r0, [r0]                                    \n"\r
 244                 "       ldr r0, [r0]                                    \n"\r
 245                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 246                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 247                 "       ldr r1, [r3]                                    \n"\r
 248                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 249                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 250                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 251                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 252                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 253                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 254                 "       msr control, r3                                 \n"\r
 255                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 256                 "       mov r0, #0                                              \n"\r
 257                 "       msr     basepri, r0                                     \n"\r
 258                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 259                 "       bx r14                                                  \n"\r
 260                 "                                                                       \n"\r
 261                 "       .align 2                                                \n"\r
 262                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 263         );\r
 264 }\r
 265 /*-----------------------------------------------------------*/\r
 266 \r
 267 /*\r
 268  * See header file for description.\r
 269  */\r
 270 portBASE_TYPE xPortStartScheduler( void )\r
 271 {\r
 272         /* Make PendSV and SysTick the same priroity as the kernel. */\r
 273         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 274         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 275 \r
 276         /* Configure the regions in the MPU that are common to all tasks. */\r
 277         prvSetupMPU();\r
 278 \r
 279         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 280         here already. */\r
 281         prvSetupTimerInterrupt();\r
 282 \r
 283         /* Initialise the critical nesting count ready for the first task. */\r
 284         uxCriticalNesting = 0;\r
 285 \r
 286         /* Start the first task. */\r
 287         __asm volatile( "       svc %0                  \n"\r
 288                                         :: "i" (portSVC_START_SCHEDULER) );\r
 289 \r
 290         /* Should not get here! */\r
 291         return 0;\r
 292 }\r
 293 /*-----------------------------------------------------------*/\r
 294 \r
 295 void vPortEndScheduler( void )\r
 296 {\r
 297         /* It is unlikely that the CM3 port will require this function as there\r
 298         is nothing to return to.  */\r
 299 }\r
 300 /*-----------------------------------------------------------*/\r
 301 \r
 302 void vPortEnterCritical( void )\r
 303 {\r
 304 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 305 \r
 306         portDISABLE_INTERRUPTS();\r
 307         uxCriticalNesting++;\r
 308 \r
 309         portRESET_PRIVILEGE( xRunningPrivileged );\r
 310 }\r
 311 /*-----------------------------------------------------------*/\r
 312 \r
 313 void vPortExitCritical( void )\r
 314 {\r
 315 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 316 \r
 317         uxCriticalNesting--;\r
 318         if( uxCriticalNesting == 0 )\r
 319         {\r
 320                 portENABLE_INTERRUPTS();\r
 321         }\r
 322         portRESET_PRIVILEGE( xRunningPrivileged );\r
 323 }\r
 324 /*-----------------------------------------------------------*/\r
 325 \r
 326 void xPortPendSVHandler( void )\r
 327 {\r
 328         /* This is a naked function. */\r
 329 \r
 330         __asm volatile\r
 331         (\r
 332                 "       mrs r0, psp                                                     \n"\r
 333                 "                                                                               \n"\r
 334                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 335                 "       ldr     r2, [r3]                                                \n"\r
 336                 "                                                                               \n"\r
 337                 "       mrs r1, control                                         \n"\r
 338                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 339                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 340                 "                                                                               \n"\r
 341                 "       stmdb sp!, {r3, r14}                            \n"\r
 342                 "       mov r0, %0                                                      \n"\r
 343                 "       msr basepri, r0                                         \n"\r
 344                 "       bl vTaskSwitchContext                           \n"\r
 345                 "       mov r0, #0                                                      \n"\r
 346                 "       msr basepri, r0                                         \n"\r
 347                 "       ldmia sp!, {r3, r14}                            \n"\r
 348                 "                                                                               \n"     /* Restore the context. */\r
 349                 "       ldr r1, [r3]                                            \n"\r
 350                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 351                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 352                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 353                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 354                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 355                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 356                 "       msr control, r3                                         \n"\r
 357                 "                                                                               \n"\r
 358                 "       msr psp, r0                                                     \n"\r
 359                 "       bx r14                                                          \n"\r
 360                 "                                                                               \n"\r
 361                 "       .align 2                                                        \n"\r
 362                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 363                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 364         );\r
 365 }\r
 366 /*-----------------------------------------------------------*/\r
 367 \r
 368 void xPortSysTickHandler( void )\r
 369 {\r
 370 unsigned long ulDummy;\r
 371 \r
 372         /* If using preemption, also force a context switch. */\r
 373         #if configUSE_PREEMPTION == 1\r
 374                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 375         #endif\r
 376 \r
 377         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 378         {\r
 379                 vTaskIncrementTick();\r
 380         }\r
 381         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 382 }\r
 383 /*-----------------------------------------------------------*/\r
 384 \r
 385 /*\r
 386  * Setup the systick timer to generate the tick interrupts at the required\r
 387  * frequency.\r
 388  */\r
 389 static void prvSetupTimerInterrupt( void )\r
 390 {\r
 391         /* Configure SysTick to interrupt at the requested rate. */\r
 392         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 393         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 394 }\r
 395 /*-----------------------------------------------------------*/\r
 396 \r
 397 static void prvSetupMPU( void )\r
 398 {\r
 399 extern unsigned long __privileged_functions_end__[];\r
 400 extern unsigned long __FLASH_segment_start__[];\r
 401 extern unsigned long __FLASH_segment_end__[];\r
 402 extern unsigned long __privileged_data_start__[];\r
 403 extern unsigned long __privileged_data_end__[];\r
 404 \r
 405         /* Check the expected MPU is present. */\r
 406         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 407         {\r
 408                 /* First setup the entire flash for unprivileged read only access. */\r
 409         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 410                                                                                 ( portMPU_REGION_VALID ) |\r
 411                                                                                 ( portUNPRIVILEGED_FLASH_REGION ); \r
 412 \r
 413                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 414                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 415                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 416                                                                                 ( portMPU_REGION_ENABLE );\r
 417 \r
 418                 /* Setup the first 16K for privileged only access (even though less \r
 419                 than 10K is actually being used).  This is where the kernel code is\r
 420                 placed. */\r
 421         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 422                                                                                 ( portMPU_REGION_VALID ) |\r
 423                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 424 \r
 425                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 426                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | \r
 427                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) | \r
 428                                                                                 ( portMPU_REGION_ENABLE );\r
 429 \r
 430                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 431                 is placed. */\r
 432                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 433                                                                                 ( portMPU_REGION_VALID ) |\r
 434                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 435 \r
 436                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 437                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 438                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 439                                                                                 ( portMPU_REGION_ENABLE );\r
 440 \r
 441                 /* By default allow everything to access the general peripherals.  The\r
 442                 system peripherals and registers are protected. */\r
 443                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 444                                                                                 ( portMPU_REGION_VALID ) |\r
 445                                                                                 ( portGENERAL_PERIPHERALS_REGION ); \r
 446 \r
 447                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 448                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 449                                                                                 ( portMPU_REGION_ENABLE );\r
 450 \r
 451                 /* Enable the memory fault exception. */\r
 452                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 453 \r
 454                 /* Enable the MPU with the background region configured. */\r
 455                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 456         }\r
 457 }\r
 458 /*-----------------------------------------------------------*/\r
 459 \r
 460 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 461 {\r
 462 unsigned long ulRegionSize, ulReturnValue = 4;\r
 463 \r
 464         /* 32 is the smallest region size, 31 is the largest valid value for\r
 465         ulReturnValue. */\r
 466         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 467         {\r
 468                 if( ulActualSizeInBytes <= ulRegionSize )\r
 469                 {\r
 470                         break;\r
 471                 }\r
 472                 else\r
 473                 {\r
 474                         ulReturnValue++;\r
 475                 }\r
 476         }\r
 477 \r
 478         /* Shift the code by one before returning so it can be written directly\r
 479         into the the correct bit position of the attribute register. */\r
 480         return ( ulReturnValue << 1UL );\r
 481 }\r
 482 /*-----------------------------------------------------------*/\r
 483 \r
 484 static portBASE_TYPE prvRaisePrivilege( void )\r
 485 {\r
 486         __asm volatile\r
 487         ( \r
 488                 "       mrs r0, control                                         \n"\r
 489                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 490                 "       itte ne                                                         \n"\r
 491                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 492                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 493                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 494                 "       bx lr                                                           \n"\r
 495                 :: "i" (portSVC_prvRaisePrivilege) : "r0" \r
 496         );\r
 497 \r
 498         return 0;\r
 499 }\r
 500 /*-----------------------------------------------------------*/\r
 501 \r
 502 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 503 {\r
 504 extern unsigned long __SRAM_segment_start__[];\r
 505 extern unsigned long __SRAM_segment_end__[];\r
 506 extern unsigned long __privileged_data_start__[];\r
 507 extern unsigned long __privileged_data_end__[];\r
 508 long lIndex;\r
 509 unsigned long ul;\r
 510 \r
 511         if( xRegions == NULL )\r
 512         {\r
 513                 /* No MPU regions are specified so allow access to all RAM. */\r
 514         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 515                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 516                                 ( portMPU_REGION_VALID ) |\r
 517                                 ( portSTACK_REGION );\r
 518 \r
 519                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 520                                 ( portMPU_REGION_READ_WRITE ) | \r
 521                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 522                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 523                                 ( portMPU_REGION_ENABLE );\r
 524 \r
 525                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 526                 just removed the privileged only parameters. */\r
 527                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =        \r
 528                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 529                                 ( portMPU_REGION_VALID ) |\r
 530                                 ( portSTACK_REGION + 1 );\r
 531 \r
 532                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =          \r
 533                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 534                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 535                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 536                                 ( portMPU_REGION_ENABLE );\r
 537                                 \r
 538                 /* Invalidate all other regions. */\r
 539                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 540                 { \r
 541                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 542                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 543                 }\r
 544         }\r
 545         else\r
 546         {\r
 547                 /* This function is called automatically when the task is created - in\r
 548                 which case the stack region parameters will be valid.  At all other\r
 549                 times the stack parameters will not be valid and it is assumed that the\r
 550                 stack region has already been configured. */\r
 551                 if( usStackDepth > 0 )\r
 552                 {\r
 553                         /* Define the region that allows access to the stack. */\r
 554                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 555                                         ( ( unsigned long ) pxBottomOfStack ) | \r
 556                                         ( portMPU_REGION_VALID ) |\r
 557                                         ( portSTACK_REGION ); /* Region number. */\r
 558 \r
 559                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 560                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 561                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 562                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 563                                         ( portMPU_REGION_ENABLE );\r
 564                 }\r
 565 \r
 566                 lIndex = 0;\r
 567 \r
 568                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 569                 {\r
 570                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 571                         {\r
 572                                 /* Translate the generic region definition contained in \r
 573                                 xRegions into the CM3 specific MPU settings that are then \r
 574                                 stored in xMPUSettings. */\r
 575                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =       \r
 576                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | \r
 577                                                 ( portMPU_REGION_VALID ) |\r
 578                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 579 \r
 580                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = \r
 581                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | \r
 582                                                 ( xRegions[ lIndex ].ulParameters ) | \r
 583                                                 ( portMPU_REGION_ENABLE ); \r
 584                         }\r
 585                         else\r
 586                         {\r
 587                                 /* Invalidate the region. */\r
 588                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 589                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 590                         }\r
 591 \r
 592                         lIndex++;\r
 593                 }\r
 594         }\r
 595 }\r
 596 /*-----------------------------------------------------------*/\r
 597 \r
 598 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 599 {\r
 600 signed portBASE_TYPE xReturn;\r
 601 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 602 \r
 603         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 604         portRESET_PRIVILEGE( xRunningPrivileged );\r
 605         return xReturn;\r
 606 }\r
 607 /*-----------------------------------------------------------*/\r
 608 \r
 609 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 610 {\r
 611 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 612 \r
 613         vTaskAllocateMPURegions( xTask, xRegions );\r
 614         portRESET_PRIVILEGE( xRunningPrivileged );\r
 615 }\r
 616 /*-----------------------------------------------------------*/\r
 617 \r
 618 #if ( INCLUDE_vTaskDelete == 1 )\r
 619         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 620         {\r
 621     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 622 \r
 623                 vTaskDelete( pxTaskToDelete );\r
 624         portRESET_PRIVILEGE( xRunningPrivileged );\r
 625         }\r
 626 #endif\r
 627 /*-----------------------------------------------------------*/\r
 628 \r
 629 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 630         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 631         {\r
 632     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 633 \r
 634                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 635         portRESET_PRIVILEGE( xRunningPrivileged );\r
 636         }\r
 637 #endif\r
 638 /*-----------------------------------------------------------*/\r
 639 \r
 640 #if ( INCLUDE_vTaskDelay == 1 )\r
 641         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 642         {\r
 643     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 644 \r
 645                 vTaskDelay( xTicksToDelay );\r
 646         portRESET_PRIVILEGE( xRunningPrivileged );\r
 647         }\r
 648 #endif\r
 649 /*-----------------------------------------------------------*/\r
 650 \r
 651 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 652         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 653         {\r
 654         unsigned portBASE_TYPE uxReturn;\r
 655     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 656 \r
 657                 uxReturn = uxTaskPriorityGet( pxTask );\r
 658         portRESET_PRIVILEGE( xRunningPrivileged );\r
 659                 return uxReturn;\r
 660         }\r
 661 #endif\r
 662 /*-----------------------------------------------------------*/\r
 663 \r
 664 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 665         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 666         {\r
 667     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 668 \r
 669                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 670         portRESET_PRIVILEGE( xRunningPrivileged );\r
 671         }\r
 672 #endif\r
 673 /*-----------------------------------------------------------*/\r
 674 \r
 675 #if ( INCLUDE_vTaskSuspend == 1 )\r
 676         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 677         {\r
 678     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 679 \r
 680                 vTaskSuspend( pxTaskToSuspend );\r
 681         portRESET_PRIVILEGE( xRunningPrivileged );\r
 682         }\r
 683 #endif\r
 684 /*-----------------------------------------------------------*/\r
 685 \r
 686 #if ( INCLUDE_vTaskSuspend == 1 )\r
 687         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 688         {\r
 689         signed portBASE_TYPE xReturn;\r
 690     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 691 \r
 692                 xReturn = xTaskIsTaskSuspended( xTask );\r
 693         portRESET_PRIVILEGE( xRunningPrivileged );\r
 694                 return xReturn;\r
 695         }\r
 696 #endif\r
 697 /*-----------------------------------------------------------*/\r
 698 \r
 699 #if ( INCLUDE_vTaskSuspend == 1 )\r
 700         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 701         {\r
 702     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 703 \r
 704                 vTaskResume( pxTaskToResume );\r
 705         portRESET_PRIVILEGE( xRunningPrivileged );\r
 706         }\r
 707 #endif\r
 708 /*-----------------------------------------------------------*/\r
 709 \r
 710 void MPU_vTaskSuspendAll( void )\r
 711 {\r
 712 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 713 \r
 714         vTaskSuspendAll();\r
 715     portRESET_PRIVILEGE( xRunningPrivileged );\r
 716 }\r
 717 /*-----------------------------------------------------------*/\r
 718 \r
 719 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 720 {\r
 721 signed portBASE_TYPE xReturn;\r
 722 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 723 \r
 724         xReturn = xTaskResumeAll();\r
 725     portRESET_PRIVILEGE( xRunningPrivileged );\r
 726     return xReturn;\r
 727 }\r
 728 /*-----------------------------------------------------------*/\r
 729 \r
 730 portTickType MPU_xTaskGetTickCount( void )\r
 731 {\r
 732 portTickType xReturn;\r
 733 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 734 \r
 735         xReturn = xTaskGetTickCount();\r
 736     portRESET_PRIVILEGE( xRunningPrivileged );\r
 737         return xReturn;\r
 738 }\r
 739 /*-----------------------------------------------------------*/\r
 740 \r
 741 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 742 {\r
 743 unsigned portBASE_TYPE uxReturn;\r
 744 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 745 \r
 746         uxReturn = uxTaskGetNumberOfTasks();\r
 747     portRESET_PRIVILEGE( xRunningPrivileged );\r
 748         return uxReturn;\r
 749 }\r
 750 /*-----------------------------------------------------------*/\r
 751 \r
 752 #if ( configUSE_TRACE_FACILITY == 1 )\r
 753         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 754         {\r
 755         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 756         \r
 757                 vTaskList( pcWriteBuffer );\r
 758                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 759         }\r
 760 #endif\r
 761 /*-----------------------------------------------------------*/\r
 762 \r
 763 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 764         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 765         {\r
 766     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 767 \r
 768                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 769         portRESET_PRIVILEGE( xRunningPrivileged );\r
 770         }\r
 771 #endif\r
 772 /*-----------------------------------------------------------*/\r
 773 \r
 774 #if ( configUSE_TRACE_FACILITY == 1 )\r
 775         void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )\r
 776         {\r
 777     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 778 \r
 779                 vTaskStartTrace( pcBuffer, ulBufferSize );\r
 780         portRESET_PRIVILEGE( xRunningPrivileged );\r
 781         }\r
 782 #endif\r
 783 /*-----------------------------------------------------------*/\r
 784 \r
 785 #if ( configUSE_TRACE_FACILITY == 1 )\r
 786         unsigned long MPU_ulTaskEndTrace( void )\r
 787         {\r
 788         unsigned long ulReturn;\r
 789     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 790 \r
 791                 ulReturn = ulTaskEndTrace();\r
 792         portRESET_PRIVILEGE( xRunningPrivileged );\r
 793                 return ulReturn;\r
 794         }\r
 795 #endif\r
 796 /*-----------------------------------------------------------*/\r
 797 \r
 798 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 799         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 800         {\r
 801     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 802 \r
 803                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 804         portRESET_PRIVILEGE( xRunningPrivileged );\r
 805         }\r
 806 #endif\r
 807 /*-----------------------------------------------------------*/\r
 808 \r
 809 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 810         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 811         {\r
 812         pdTASK_HOOK_CODE xReturn;\r
 813     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 814 \r
 815                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 816         portRESET_PRIVILEGE( xRunningPrivileged );\r
 817                 return xReturn;\r
 818         }\r
 819 #endif\r
 820 /*-----------------------------------------------------------*/\r
 821 \r
 822 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 823         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 824         {\r
 825         portBASE_TYPE xReturn;\r
 826     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 827 \r
 828                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 829         portRESET_PRIVILEGE( xRunningPrivileged );\r
 830                 return xReturn;\r
 831         }\r
 832 #endif\r
 833 /*-----------------------------------------------------------*/\r
 834 \r
 835 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 836         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 837         {\r
 838         unsigned portBASE_TYPE uxReturn;\r
 839     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 840 \r
 841                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 842         portRESET_PRIVILEGE( xRunningPrivileged );\r
 843                 return uxReturn;\r
 844         }\r
 845 #endif\r
 846 /*-----------------------------------------------------------*/\r
 847 \r
 848 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 849         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 850         {\r
 851         xTaskHandle xReturn;\r
 852     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 853 \r
 854                 xReturn = xTaskGetCurrentTaskHandle();\r
 855         portRESET_PRIVILEGE( xRunningPrivileged );\r
 856                 return xReturn;\r
 857         }\r
 858 #endif\r
 859 /*-----------------------------------------------------------*/\r
 860 \r
 861 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 862         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 863         {\r
 864         portBASE_TYPE xReturn;\r
 865     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 866 \r
 867                 xReturn = xTaskGetSchedulerState();\r
 868         portRESET_PRIVILEGE( xRunningPrivileged );\r
 869                 return xReturn;\r
 870         }\r
 871 #endif\r
 872 /*-----------------------------------------------------------*/\r
 873 \r
 874 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
 875 {\r
 876 xQueueHandle xReturn;\r
 877 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 878 \r
 879         xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
 880         portRESET_PRIVILEGE( xRunningPrivileged );\r
 881         return xReturn;\r
 882 }\r
 883 /*-----------------------------------------------------------*/\r
 884 \r
 885 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 886 {\r
 887 signed portBASE_TYPE xReturn;\r
 888 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 889 \r
 890         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 891         portRESET_PRIVILEGE( xRunningPrivileged );\r
 892         return xReturn;\r
 893 }\r
 894 /*-----------------------------------------------------------*/\r
 895 \r
 896 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 897 {\r
 898 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 899 unsigned portBASE_TYPE uxReturn;\r
 900 \r
 901         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 902         portRESET_PRIVILEGE( xRunningPrivileged );\r
 903         return uxReturn;\r
 904 }\r
 905 /*-----------------------------------------------------------*/\r
 906 \r
 907 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 908 {\r
 909 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 910 signed portBASE_TYPE xReturn;\r
 911 \r
 912         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
 913         portRESET_PRIVILEGE( xRunningPrivileged );\r
 914         return xReturn;\r
 915 }\r
 916 /*-----------------------------------------------------------*/\r
 917 \r
 918 #if ( configUSE_MUTEXES == 1 )\r
 919         xQueueHandle MPU_xQueueCreateMutex( void )\r
 920         {\r
 921     xQueueHandle xReturn;\r
 922         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 923 \r
 924                 xReturn = xQueueCreateMutex();\r
 925                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 926                 return xReturn;\r
 927         }\r
 928 #endif\r
 929 /*-----------------------------------------------------------*/\r
 930 \r
 931 #if configUSE_COUNTING_SEMAPHORES == 1\r
 932         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
 933         {\r
 934     xQueueHandle xReturn;\r
 935         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 936 \r
 937                 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
 938                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 939                 return xReturn;\r
 940         }\r
 941 #endif\r
 942 /*-----------------------------------------------------------*/\r
 943 \r
 944 #if ( configUSE_MUTEXES == 1 )\r
 945         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
 946         {\r
 947         portBASE_TYPE xReturn;\r
 948         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 949 \r
 950                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
 951                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 952                 return xReturn;\r
 953         }\r
 954 #endif\r
 955 /*-----------------------------------------------------------*/\r
 956 \r
 957 #if ( configUSE_MUTEXES == 1 )\r
 958         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
 959         {\r
 960         portBASE_TYPE xReturn;\r
 961         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 962 \r
 963                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
 964                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 965                 return xReturn;\r
 966         }\r
 967 #endif\r
 968 /*-----------------------------------------------------------*/\r
 969 \r
 970 #if configUSE_ALTERNATIVE_API == 1\r
 971         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 972         {\r
 973         signed portBASE_TYPE xReturn;\r
 974         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 975 \r
 976                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 977                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 978                 return xReturn;\r
 979         }\r
 980 #endif\r
 981 /*-----------------------------------------------------------*/\r
 982 \r
 983 #if configUSE_ALTERNATIVE_API == 1\r
 984         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 985         {\r
 986     signed portBASE_TYPE xReturn;\r
 987         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 988 \r
 989                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
 990                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 991                 return xReturn;\r
 992         }\r
 993 #endif\r
 994 /*-----------------------------------------------------------*/\r
 995 \r
 996 #if configQUEUE_REGISTRY_SIZE > 0\r
 997         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
 998         {\r
 999         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1000 \r
1001                 vQueueAddToRegistry( xQueue, pcName );\r
1002 \r
1003                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1004         }\r
1005 #endif\r
1006 /*-----------------------------------------------------------*/\r
1007 \r
1008 void *MPU_pvPortMalloc( size_t xSize )\r
1009 {\r
1010 void *pvReturn;\r
1011 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1012 \r
1013         pvReturn = pvPortMalloc( xSize );\r
1014 \r
1015         portRESET_PRIVILEGE( xRunningPrivileged );\r
1016 \r
1017         return pvReturn;\r
1018 }\r
1019 /*-----------------------------------------------------------*/\r
1020 \r
1021 void MPU_vPortFree( void *pv )\r
1022 {\r
1023 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1024 \r
1025         vPortFree( pv );\r
1026 \r
1027         portRESET_PRIVILEGE( xRunningPrivileged );\r
1028 }\r
1029 /*-----------------------------------------------------------*/\r
1030 \r
1031 void MPU_vPortInitialiseBlocks( void )\r
1032 {\r
1033 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1034 \r
1035         vPortInitialiseBlocks();\r
1036 \r
1037         portRESET_PRIVILEGE( xRunningPrivileged );\r
1038 }\r
1039 /*-----------------------------------------------------------*/\r
1040 \r
1041 size_t MPU_xPortGetFreeHeapSize( void )\r
1042 {\r
1043 size_t xReturn;\r
1044 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1045 \r
1046         xReturn = xPortGetFreeHeapSize();\r
1047 \r
1048         portRESET_PRIVILEGE( xRunningPrivileged );\r
1049         \r
1050         return xReturn;\r
1051 }\r
1052 \r