git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
   3 \r
   4     ***************************************************************************\r
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  15     *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *\r
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  17     *                                                                         *\r
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  22     *                                                                         *\r
  23     ***************************************************************************\r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
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  32     source code for proprietary components outside of the FreeRTOS kernel.\r
  33     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
  34     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  35     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public \r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it \r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54 /*-----------------------------------------------------------\r
  55  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  56  *----------------------------------------------------------*/\r
  57 \r
  58 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  59 all the API functions to use the MPU wrappers.  That should only be done when\r
  60 task.h is included from an application file. */\r
  61 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  62 \r
  63 /* Scheduler includes. */\r
  64 #include "FreeRTOS.h"\r
  65 #include "task.h"\r
  66 #include "queue.h"\r
  67 \r
  68 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  69 \r
  70 /* Constants required to access and manipulate the NVIC. */\r
  71 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  72 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  73 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  74 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  75 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  76 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  77 \r
  78 /* Constants required to access and manipulate the MPU. */\r
  79 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
  80 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
  81 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
  82 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
  83 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
  84 #define portMPU_ENABLE                                                  ( 0x01UL )\r
  85 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
  86 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
  87 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
  88 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
  89 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
  90 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
  91 \r
  92 /* Constants required to access and manipulate the SysTick. */\r
  93 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
  94 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
  95 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
  96 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
  97 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  98 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  99 \r
 100 /* Constants required to set up the initial stack. */\r
 101 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
 102 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
 103 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 104 \r
 105 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 106 #define portOFFSET_TO_PC                                                ( 6 )\r
 107 \r
 108 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 109 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0" :::"r0" )\r
 110 \r
 111 /* Each task maintains its own interrupt status in the critical nesting\r
 112 variable.  Note this is not saved as part of the task context as context\r
 113 switches can only occur when uxCriticalNesting is zero. */\r
 114 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 115 \r
 116 /*\r
 117  * Setup the timer to generate the tick interrupts.\r
 118  */\r
 119 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 120 \r
 121 /*\r
 122  * Configure a number of standard MPU regions that are used by all tasks.\r
 123  */\r
 124 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 125 \r
 126 /* \r
 127  * Return the smallest MPU region size that a given number of bytes will fit\r
 128  * into.  The region size is returned as the value that should be programmed\r
 129  * into the region attribute register for that region.\r
 130  */\r
 131 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 132 \r
 133 /* \r
 134  * Checks to see if being called from the context of an unprivileged task, and\r
 135  * if so raises the privilege level and returns false - otherwise does nothing\r
 136  * other than return true.\r
 137  */\r
 138 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 139 \r
 140 /*\r
 141  * Standard FreeRTOS exception handlers.\r
 142  */\r
 143 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 144 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 145 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 146 \r
 147 /*\r
 148  * Starts the scheduler by restoring the context of the first task to run.\r
 149  */\r
 150 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 151 \r
 152 /*\r
 153  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 154  * and a C wrapper for simplicity of coding and maintenance.\r
 155  */\r
 156 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 157 \r
 158 /*\r
 159  * Prototypes for all the MPU wrappers.\r
 160  */\r
 161 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions );\r
 162 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions );\r
 163 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete );\r
 164 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement );\r
 165 void MPU_vTaskDelay( portTickType xTicksToDelay );\r
 166 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask );\r
 167 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );\r
 168 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend );\r
 169 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask );\r
 170 void MPU_vTaskResume( xTaskHandle pxTaskToResume );\r
 171 void MPU_vTaskSuspendAll( void );\r
 172 signed portBASE_TYPE MPU_xTaskResumeAll( void );\r
 173 portTickType MPU_xTaskGetTickCount( void );\r
 174 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void );\r
 175 void MPU_vTaskList( signed char *pcWriteBuffer );\r
 176 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer );\r
 177 void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize );\r
 178 unsigned long MPU_ulTaskEndTrace( void );\r
 179 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue );\r
 180 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask );\r
 181 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter );\r
 182 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );\r
 183 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );\r
 184 portBASE_TYPE MPU_xTaskGetSchedulerState( void );\r
 185 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );\r
 186 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 187 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );\r
 188 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 189 xQueueHandle MPU_xQueueCreateMutex( void );\r
 190 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );\r
 191 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime );\r
 192 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex );\r
 193 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );\r
 194 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );\r
 195 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );\r
 196 void *MPU_pvPortMalloc( size_t xSize );\r
 197 void MPU_vPortFree( void *pv );\r
 198 void MPU_vPortInitialiseBlocks( void );\r
 199 size_t MPU_xPortGetFreeHeapSize( void );\r
 200 \r
 201 /*-----------------------------------------------------------*/\r
 202 \r
 203 /*\r
 204  * See header file for description.\r
 205  */\r
 206 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 207 {\r
 208         /* Simulate the stack frame as it would be created by a context switch\r
 209         interrupt. */\r
 210         pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */\r
 211         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 212         pxTopOfStack--;\r
 213         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 214         pxTopOfStack--;\r
 215         *pxTopOfStack = 0;      /* LR */\r
 216         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 217         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 218         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 219 \r
 220         if( xRunPrivileged == pdTRUE )\r
 221         {\r
 222                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 223         }\r
 224         else\r
 225         {\r
 226                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 227         }\r
 228 \r
 229         return pxTopOfStack;\r
 230 }\r
 231 /*-----------------------------------------------------------*/\r
 232 \r
 233 void vPortSVCHandler( void )\r
 234 {\r
 235         /* Assumes psp was in use. */\r
 236         __asm volatile \r
 237         (\r
 238                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 239                         "       tst lr, #4                                              \n"\r
 240                         "       ite eq                                                  \n"\r
 241                         "       mrseq r0, msp                                   \n"\r
 242                         "       mrsne r0, psp                                   \n"\r
 243                 #else\r
 244                         "       mrs r0, psp                                             \n"\r
 245                 #endif\r
 246                         "       b prvSVCHandler                                 \n"\r
 247                         :::"r0"\r
 248         );\r
 249 \r
 250         /* This will never get executed, but is required to prevent prvSVCHandler\r
 251         being removed by the optimiser. */\r
 252         prvSVCHandler( NULL );\r
 253 }\r
 254 /*-----------------------------------------------------------*/\r
 255 \r
 256 static void prvSVCHandler(      unsigned long *pulParam )\r
 257 {\r
 258 unsigned char ucSVCNumber;\r
 259 \r
 260         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 261         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 262         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 263         switch( ucSVCNumber )\r
 264         {\r
 265                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 266                                                                                         prvRestoreContextOfFirstTask();\r
 267                                                                                         break;\r
 268 \r
 269                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 270                                                                                         break;\r
 271 \r
 272                 case portSVC_RAISE_PRIVILEGE    :       __asm volatile \r
 273                                                                                         (\r
 274                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 275                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 276                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 277                                                                                                 :::"r1"\r
 278                                                                                         );\r
 279                                                                                         break;\r
 280 \r
 281                 default                                                 :       /* Unknown SVC call. */\r
 282                                                                                         break;\r
 283         }\r
 284 }\r
 285 /*-----------------------------------------------------------*/\r
 286 \r
 287 static void prvRestoreContextOfFirstTask( void )\r
 288 {\r
 289         __asm volatile \r
 290         (\r
 291                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 292                 "       ldr r0, [r0]                                    \n"\r
 293                 "       ldr r0, [r0]                                    \n"\r
 294                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 295                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 296                 "       ldr r1, [r3]                                    \n"\r
 297                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 298                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 299                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 300                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 301                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 302                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 303                 "       msr control, r3                                 \n"\r
 304                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 305                 "       mov r0, #0                                              \n"\r
 306                 "       msr     basepri, r0                                     \n"\r
 307                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 308                 "       bx r14                                                  \n"\r
 309                 "                                                                       \n"\r
 310                 "       .align 2                                                \n"\r
 311                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 312         );\r
 313 }\r
 314 /*-----------------------------------------------------------*/\r
 315 \r
 316 /*\r
 317  * See header file for description.\r
 318  */\r
 319 portBASE_TYPE xPortStartScheduler( void )\r
 320 {\r
 321         /* Make PendSV and SysTick the same priroity as the kernel. */\r
 322         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 323         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 324 \r
 325         /* Configure the regions in the MPU that are common to all tasks. */\r
 326         prvSetupMPU();\r
 327 \r
 328         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 329         here already. */\r
 330         prvSetupTimerInterrupt();\r
 331 \r
 332         /* Initialise the critical nesting count ready for the first task. */\r
 333         uxCriticalNesting = 0;\r
 334 \r
 335         /* Start the first task. */\r
 336         __asm volatile( "       svc %0                  \n"\r
 337                                         :: "i" (portSVC_START_SCHEDULER) );\r
 338 \r
 339         /* Should not get here! */\r
 340         return 0;\r
 341 }\r
 342 /*-----------------------------------------------------------*/\r
 343 \r
 344 void vPortEndScheduler( void )\r
 345 {\r
 346         /* It is unlikely that the CM3 port will require this function as there\r
 347         is nothing to return to.  */\r
 348 }\r
 349 /*-----------------------------------------------------------*/\r
 350 \r
 351 void vPortEnterCritical( void )\r
 352 {\r
 353 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 354 \r
 355         portDISABLE_INTERRUPTS();\r
 356         uxCriticalNesting++;\r
 357 \r
 358         portRESET_PRIVILEGE( xRunningPrivileged );\r
 359 }\r
 360 /*-----------------------------------------------------------*/\r
 361 \r
 362 void vPortExitCritical( void )\r
 363 {\r
 364 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 365 \r
 366         uxCriticalNesting--;\r
 367         if( uxCriticalNesting == 0 )\r
 368         {\r
 369                 portENABLE_INTERRUPTS();\r
 370         }\r
 371         portRESET_PRIVILEGE( xRunningPrivileged );\r
 372 }\r
 373 /*-----------------------------------------------------------*/\r
 374 \r
 375 void xPortPendSVHandler( void )\r
 376 {\r
 377         /* This is a naked function. */\r
 378 \r
 379         __asm volatile\r
 380         (\r
 381                 "       mrs r0, psp                                                     \n"\r
 382                 "                                                                               \n"\r
 383                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 384                 "       ldr     r2, [r3]                                                \n"\r
 385                 "                                                                               \n"\r
 386                 "       mrs r1, control                                         \n"\r
 387                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 388                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 389                 "                                                                               \n"\r
 390                 "       stmdb sp!, {r3, r14}                            \n"\r
 391                 "       mov r0, %0                                                      \n"\r
 392                 "       msr basepri, r0                                         \n"\r
 393                 "       bl vTaskSwitchContext                           \n"\r
 394                 "       mov r0, #0                                                      \n"\r
 395                 "       msr basepri, r0                                         \n"\r
 396                 "       ldmia sp!, {r3, r14}                            \n"\r
 397                 "                                                                               \n"     /* Restore the context. */\r
 398                 "       ldr r1, [r3]                                            \n"\r
 399                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 400                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 401                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 402                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 403                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 404                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 405                 "       msr control, r3                                         \n"\r
 406                 "                                                                               \n"\r
 407                 "       msr psp, r0                                                     \n"\r
 408                 "       bx r14                                                          \n"\r
 409                 "                                                                               \n"\r
 410                 "       .align 2                                                        \n"\r
 411                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 412                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 413         );\r
 414 }\r
 415 /*-----------------------------------------------------------*/\r
 416 \r
 417 void xPortSysTickHandler( void )\r
 418 {\r
 419 unsigned long ulDummy;\r
 420 \r
 421         /* If using preemption, also force a context switch. */\r
 422         #if configUSE_PREEMPTION == 1\r
 423                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 424         #endif\r
 425 \r
 426         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 427         {\r
 428                 vTaskIncrementTick();\r
 429         }\r
 430         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 431 }\r
 432 /*-----------------------------------------------------------*/\r
 433 \r
 434 /*\r
 435  * Setup the systick timer to generate the tick interrupts at the required\r
 436  * frequency.\r
 437  */\r
 438 static void prvSetupTimerInterrupt( void )\r
 439 {\r
 440         /* Configure SysTick to interrupt at the requested rate. */\r
 441         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 442         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 443 }\r
 444 /*-----------------------------------------------------------*/\r
 445 \r
 446 static void prvSetupMPU( void )\r
 447 {\r
 448 extern unsigned long __privileged_functions_end__[];\r
 449 extern unsigned long __FLASH_segment_start__[];\r
 450 extern unsigned long __FLASH_segment_end__[];\r
 451 extern unsigned long __privileged_data_start__[];\r
 452 extern unsigned long __privileged_data_end__[];\r
 453 \r
 454         /* Check the expected MPU is present. */\r
 455         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 456         {\r
 457                 /* First setup the entire flash for unprivileged read only access. */\r
 458         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 459                                                                                 ( portMPU_REGION_VALID ) |\r
 460                                                                                 ( portUNPRIVILEGED_FLASH_REGION ); \r
 461 \r
 462                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 463                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 464                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 465                                                                                 ( portMPU_REGION_ENABLE );\r
 466 \r
 467                 /* Setup the first 16K for privileged only access (even though less \r
 468                 than 10K is actually being used).  This is where the kernel code is\r
 469                 placed. */\r
 470         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 471                                                                                 ( portMPU_REGION_VALID ) |\r
 472                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 473 \r
 474                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 475                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | \r
 476                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) | \r
 477                                                                                 ( portMPU_REGION_ENABLE );\r
 478 \r
 479                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 480                 is placed. */\r
 481                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 482                                                                                 ( portMPU_REGION_VALID ) |\r
 483                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 484 \r
 485                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 486                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 487                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 488                                                                                 ( portMPU_REGION_ENABLE );\r
 489 \r
 490                 /* By default allow everything to access the general peripherals.  The\r
 491                 system peripherals and registers are protected. */\r
 492                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 493                                                                                 ( portMPU_REGION_VALID ) |\r
 494                                                                                 ( portGENERAL_PERIPHERALS_REGION ); \r
 495 \r
 496                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 497                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 498                                                                                 ( portMPU_REGION_ENABLE );\r
 499 \r
 500                 /* Enable the memory fault exception. */\r
 501                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 502 \r
 503                 /* Enable the MPU with the background region configured. */\r
 504                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 505         }\r
 506 }\r
 507 /*-----------------------------------------------------------*/\r
 508 \r
 509 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 510 {\r
 511 unsigned long ulRegionSize, ulReturnValue = 4;\r
 512 \r
 513         /* 32 is the smallest region size, 31 is the largest valid value for\r
 514         ulReturnValue. */\r
 515         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 516         {\r
 517                 if( ulActualSizeInBytes <= ulRegionSize )\r
 518                 {\r
 519                         break;\r
 520                 }\r
 521                 else\r
 522                 {\r
 523                         ulReturnValue++;\r
 524                 }\r
 525         }\r
 526 \r
 527         /* Shift the code by one before returning so it can be written directly\r
 528         into the the correct bit position of the attribute register. */\r
 529         return ( ulReturnValue << 1UL );\r
 530 }\r
 531 /*-----------------------------------------------------------*/\r
 532 \r
 533 static portBASE_TYPE prvRaisePrivilege( void )\r
 534 {\r
 535         __asm volatile\r
 536         ( \r
 537                 "       mrs r0, control                                         \n"\r
 538                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 539                 "       itte ne                                                         \n"\r
 540                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 541                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 542                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 543                 "       bx lr                                                           \n"\r
 544                 :: "i" (portSVC_RAISE_PRIVILEGE) : "r0" \r
 545         );\r
 546 \r
 547         return 0;\r
 548 }\r
 549 /*-----------------------------------------------------------*/\r
 550 \r
 551 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 552 {\r
 553 extern unsigned long __SRAM_segment_start__[];\r
 554 extern unsigned long __SRAM_segment_end__[];\r
 555 extern unsigned long __privileged_data_start__[];\r
 556 extern unsigned long __privileged_data_end__[];\r
 557 long lIndex;\r
 558 unsigned long ul;\r
 559 \r
 560         if( xRegions == NULL )\r
 561         {\r
 562                 /* No MPU regions are specified so allow access to all RAM. */\r
 563         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 564                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 565                                 ( portMPU_REGION_VALID ) |\r
 566                                 ( portSTACK_REGION );\r
 567 \r
 568                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 569                                 ( portMPU_REGION_READ_WRITE ) | \r
 570                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 571                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 572                                 ( portMPU_REGION_ENABLE );\r
 573 \r
 574                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 575                 just removed the privileged only parameters. */\r
 576                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =        \r
 577                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 578                                 ( portMPU_REGION_VALID ) |\r
 579                                 ( portSTACK_REGION + 1 );\r
 580 \r
 581                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =          \r
 582                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 583                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 584                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 585                                 ( portMPU_REGION_ENABLE );\r
 586                                 \r
 587                 /* Invalidate all other regions. */\r
 588                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 589                 { \r
 590                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 591                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 592                 }\r
 593         }\r
 594         else\r
 595         {\r
 596                 /* This function is called automatically when the task is created - in\r
 597                 which case the stack region parameters will be valid.  At all other\r
 598                 times the stack parameters will not be valid and it is assumed that the\r
 599                 stack region has already been configured. */\r
 600                 if( usStackDepth > 0 )\r
 601                 {\r
 602                         /* Define the region that allows access to the stack. */\r
 603                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 604                                         ( ( unsigned long ) pxBottomOfStack ) | \r
 605                                         ( portMPU_REGION_VALID ) |\r
 606                                         ( portSTACK_REGION ); /* Region number. */\r
 607 \r
 608                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 609                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 610                                         ( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |\r
 611                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 612                                         ( portMPU_REGION_ENABLE );\r
 613                 }\r
 614 \r
 615                 lIndex = 0;\r
 616 \r
 617                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 618                 {\r
 619                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 620                         {\r
 621                                 /* Translate the generic region definition contained in \r
 622                                 xRegions into the CM3 specific MPU settings that are then \r
 623                                 stored in xMPUSettings. */\r
 624                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =       \r
 625                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | \r
 626                                                 ( portMPU_REGION_VALID ) |\r
 627                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 628 \r
 629                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = \r
 630                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | \r
 631                                                 ( xRegions[ lIndex ].ulParameters ) | \r
 632                                                 ( portMPU_REGION_ENABLE ); \r
 633                         }\r
 634                         else\r
 635                         {\r
 636                                 /* Invalidate the region. */\r
 637                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 638                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 639                         }\r
 640 \r
 641                         lIndex++;\r
 642                 }\r
 643         }\r
 644 }\r
 645 /*-----------------------------------------------------------*/\r
 646 \r
 647 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 648 {\r
 649 signed portBASE_TYPE xReturn;\r
 650 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 651 \r
 652         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 653         portRESET_PRIVILEGE( xRunningPrivileged );\r
 654         return xReturn;\r
 655 }\r
 656 /*-----------------------------------------------------------*/\r
 657 \r
 658 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 659 {\r
 660 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 661 \r
 662         vTaskAllocateMPURegions( xTask, xRegions );\r
 663         portRESET_PRIVILEGE( xRunningPrivileged );\r
 664 }\r
 665 /*-----------------------------------------------------------*/\r
 666 \r
 667 #if ( INCLUDE_vTaskDelete == 1 )\r
 668         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 669         {\r
 670     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 671 \r
 672                 vTaskDelete( pxTaskToDelete );\r
 673         portRESET_PRIVILEGE( xRunningPrivileged );\r
 674         }\r
 675 #endif\r
 676 /*-----------------------------------------------------------*/\r
 677 \r
 678 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 679         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 680         {\r
 681     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 682 \r
 683                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 684         portRESET_PRIVILEGE( xRunningPrivileged );\r
 685         }\r
 686 #endif\r
 687 /*-----------------------------------------------------------*/\r
 688 \r
 689 #if ( INCLUDE_vTaskDelay == 1 )\r
 690         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 691         {\r
 692     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 693 \r
 694                 vTaskDelay( xTicksToDelay );\r
 695         portRESET_PRIVILEGE( xRunningPrivileged );\r
 696         }\r
 697 #endif\r
 698 /*-----------------------------------------------------------*/\r
 699 \r
 700 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 701         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 702         {\r
 703         unsigned portBASE_TYPE uxReturn;\r
 704     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 705 \r
 706                 uxReturn = uxTaskPriorityGet( pxTask );\r
 707         portRESET_PRIVILEGE( xRunningPrivileged );\r
 708                 return uxReturn;\r
 709         }\r
 710 #endif\r
 711 /*-----------------------------------------------------------*/\r
 712 \r
 713 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 714         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 715         {\r
 716     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 717 \r
 718                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 719         portRESET_PRIVILEGE( xRunningPrivileged );\r
 720         }\r
 721 #endif\r
 722 /*-----------------------------------------------------------*/\r
 723 \r
 724 #if ( INCLUDE_vTaskSuspend == 1 )\r
 725         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 726         {\r
 727     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 728 \r
 729                 vTaskSuspend( pxTaskToSuspend );\r
 730         portRESET_PRIVILEGE( xRunningPrivileged );\r
 731         }\r
 732 #endif\r
 733 /*-----------------------------------------------------------*/\r
 734 \r
 735 #if ( INCLUDE_vTaskSuspend == 1 )\r
 736         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 737         {\r
 738         signed portBASE_TYPE xReturn;\r
 739     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 740 \r
 741                 xReturn = xTaskIsTaskSuspended( xTask );\r
 742         portRESET_PRIVILEGE( xRunningPrivileged );\r
 743                 return xReturn;\r
 744         }\r
 745 #endif\r
 746 /*-----------------------------------------------------------*/\r
 747 \r
 748 #if ( INCLUDE_vTaskSuspend == 1 )\r
 749         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 750         {\r
 751     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 752 \r
 753                 vTaskResume( pxTaskToResume );\r
 754         portRESET_PRIVILEGE( xRunningPrivileged );\r
 755         }\r
 756 #endif\r
 757 /*-----------------------------------------------------------*/\r
 758 \r
 759 void MPU_vTaskSuspendAll( void )\r
 760 {\r
 761 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 762 \r
 763         vTaskSuspendAll();\r
 764     portRESET_PRIVILEGE( xRunningPrivileged );\r
 765 }\r
 766 /*-----------------------------------------------------------*/\r
 767 \r
 768 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 769 {\r
 770 signed portBASE_TYPE xReturn;\r
 771 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 772 \r
 773         xReturn = xTaskResumeAll();\r
 774     portRESET_PRIVILEGE( xRunningPrivileged );\r
 775     return xReturn;\r
 776 }\r
 777 /*-----------------------------------------------------------*/\r
 778 \r
 779 portTickType MPU_xTaskGetTickCount( void )\r
 780 {\r
 781 portTickType xReturn;\r
 782 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 783 \r
 784         xReturn = xTaskGetTickCount();\r
 785     portRESET_PRIVILEGE( xRunningPrivileged );\r
 786         return xReturn;\r
 787 }\r
 788 /*-----------------------------------------------------------*/\r
 789 \r
 790 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 791 {\r
 792 unsigned portBASE_TYPE uxReturn;\r
 793 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 794 \r
 795         uxReturn = uxTaskGetNumberOfTasks();\r
 796     portRESET_PRIVILEGE( xRunningPrivileged );\r
 797         return uxReturn;\r
 798 }\r
 799 /*-----------------------------------------------------------*/\r
 800 \r
 801 #if ( configUSE_TRACE_FACILITY == 1 )\r
 802         void MPU_vTaskList( signed char *pcWriteBuffer )\r
 803         {\r
 804         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 805         \r
 806                 vTaskList( pcWriteBuffer );\r
 807                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 808         }\r
 809 #endif\r
 810 /*-----------------------------------------------------------*/\r
 811 \r
 812 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 813         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 814         {\r
 815     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 816 \r
 817                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 818         portRESET_PRIVILEGE( xRunningPrivileged );\r
 819         }\r
 820 #endif\r
 821 /*-----------------------------------------------------------*/\r
 822 \r
 823 #if ( configUSE_TRACE_FACILITY == 1 )\r
 824         void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )\r
 825         {\r
 826     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 827 \r
 828                 vTaskStartTrace( pcBuffer, ulBufferSize );\r
 829         portRESET_PRIVILEGE( xRunningPrivileged );\r
 830         }\r
 831 #endif\r
 832 /*-----------------------------------------------------------*/\r
 833 \r
 834 #if ( configUSE_TRACE_FACILITY == 1 )\r
 835         unsigned long MPU_ulTaskEndTrace( void )\r
 836         {\r
 837         unsigned long ulReturn;\r
 838     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 839 \r
 840                 ulReturn = ulTaskEndTrace();\r
 841         portRESET_PRIVILEGE( xRunningPrivileged );\r
 842                 return ulReturn;\r
 843         }\r
 844 #endif\r
 845 /*-----------------------------------------------------------*/\r
 846 \r
 847 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 848         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 849         {\r
 850     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 851 \r
 852                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 853         portRESET_PRIVILEGE( xRunningPrivileged );\r
 854         }\r
 855 #endif\r
 856 /*-----------------------------------------------------------*/\r
 857 \r
 858 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 859         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 860         {\r
 861         pdTASK_HOOK_CODE xReturn;\r
 862     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 863 \r
 864                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 865         portRESET_PRIVILEGE( xRunningPrivileged );\r
 866                 return xReturn;\r
 867         }\r
 868 #endif\r
 869 /*-----------------------------------------------------------*/\r
 870 \r
 871 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 872         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 873         {\r
 874         portBASE_TYPE xReturn;\r
 875     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 876 \r
 877                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 878         portRESET_PRIVILEGE( xRunningPrivileged );\r
 879                 return xReturn;\r
 880         }\r
 881 #endif\r
 882 /*-----------------------------------------------------------*/\r
 883 \r
 884 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 885         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 886         {\r
 887         unsigned portBASE_TYPE uxReturn;\r
 888     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 889 \r
 890                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 891         portRESET_PRIVILEGE( xRunningPrivileged );\r
 892                 return uxReturn;\r
 893         }\r
 894 #endif\r
 895 /*-----------------------------------------------------------*/\r
 896 \r
 897 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 898         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 899         {\r
 900         xTaskHandle xReturn;\r
 901     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 902 \r
 903                 xReturn = xTaskGetCurrentTaskHandle();\r
 904         portRESET_PRIVILEGE( xRunningPrivileged );\r
 905                 return xReturn;\r
 906         }\r
 907 #endif\r
 908 /*-----------------------------------------------------------*/\r
 909 \r
 910 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 911         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 912         {\r
 913         portBASE_TYPE xReturn;\r
 914     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 915 \r
 916                 xReturn = xTaskGetSchedulerState();\r
 917         portRESET_PRIVILEGE( xRunningPrivileged );\r
 918                 return xReturn;\r
 919         }\r
 920 #endif\r
 921 /*-----------------------------------------------------------*/\r
 922 \r
 923 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
 924 {\r
 925 xQueueHandle xReturn;\r
 926 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 927 \r
 928         xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
 929         portRESET_PRIVILEGE( xRunningPrivileged );\r
 930         return xReturn;\r
 931 }\r
 932 /*-----------------------------------------------------------*/\r
 933 \r
 934 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 935 {\r
 936 signed portBASE_TYPE xReturn;\r
 937 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 938 \r
 939         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 940         portRESET_PRIVILEGE( xRunningPrivileged );\r
 941         return xReturn;\r
 942 }\r
 943 /*-----------------------------------------------------------*/\r
 944 \r
 945 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 946 {\r
 947 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 948 unsigned portBASE_TYPE uxReturn;\r
 949 \r
 950         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 951         portRESET_PRIVILEGE( xRunningPrivileged );\r
 952         return uxReturn;\r
 953 }\r
 954 /*-----------------------------------------------------------*/\r
 955 \r
 956 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 957 {\r
 958 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 959 signed portBASE_TYPE xReturn;\r
 960 \r
 961         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
 962         portRESET_PRIVILEGE( xRunningPrivileged );\r
 963         return xReturn;\r
 964 }\r
 965 /*-----------------------------------------------------------*/\r
 966 \r
 967 #if ( configUSE_MUTEXES == 1 )\r
 968         xQueueHandle MPU_xQueueCreateMutex( void )\r
 969         {\r
 970     xQueueHandle xReturn;\r
 971         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 972 \r
 973                 xReturn = xQueueCreateMutex();\r
 974                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 975                 return xReturn;\r
 976         }\r
 977 #endif\r
 978 /*-----------------------------------------------------------*/\r
 979 \r
 980 #if configUSE_COUNTING_SEMAPHORES == 1\r
 981         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
 982         {\r
 983     xQueueHandle xReturn;\r
 984         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 985 \r
 986                 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
 987                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 988                 return xReturn;\r
 989         }\r
 990 #endif\r
 991 /*-----------------------------------------------------------*/\r
 992 \r
 993 #if ( configUSE_MUTEXES == 1 )\r
 994         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
 995         {\r
 996         portBASE_TYPE xReturn;\r
 997         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 998 \r
 999                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
1000                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1001                 return xReturn;\r
1002         }\r
1003 #endif\r
1004 /*-----------------------------------------------------------*/\r
1005 \r
1006 #if ( configUSE_MUTEXES == 1 )\r
1007         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
1008         {\r
1009         portBASE_TYPE xReturn;\r
1010         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1011 \r
1012                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
1013                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1014                 return xReturn;\r
1015         }\r
1016 #endif\r
1017 /*-----------------------------------------------------------*/\r
1018 \r
1019 #if configUSE_ALTERNATIVE_API == 1\r
1020         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
1021         {\r
1022         signed portBASE_TYPE xReturn;\r
1023         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1024 \r
1025                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
1026                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1027                 return xReturn;\r
1028         }\r
1029 #endif\r
1030 /*-----------------------------------------------------------*/\r
1031 \r
1032 #if configUSE_ALTERNATIVE_API == 1\r
1033         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
1034         {\r
1035     signed portBASE_TYPE xReturn;\r
1036         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1037 \r
1038                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
1039                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1040                 return xReturn;\r
1041         }\r
1042 #endif\r
1043 /*-----------------------------------------------------------*/\r
1044 \r
1045 #if configQUEUE_REGISTRY_SIZE > 0\r
1046         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
1047         {\r
1048         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1049 \r
1050                 vQueueAddToRegistry( xQueue, pcName );\r
1051 \r
1052                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1053         }\r
1054 #endif\r
1055 /*-----------------------------------------------------------*/\r
1056 \r
1057 void *MPU_pvPortMalloc( size_t xSize )\r
1058 {\r
1059 void *pvReturn;\r
1060 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1061 \r
1062         pvReturn = pvPortMalloc( xSize );\r
1063 \r
1064         portRESET_PRIVILEGE( xRunningPrivileged );\r
1065 \r
1066         return pvReturn;\r
1067 }\r
1068 /*-----------------------------------------------------------*/\r
1069 \r
1070 void MPU_vPortFree( void *pv )\r
1071 {\r
1072 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1073 \r
1074         vPortFree( pv );\r
1075 \r
1076         portRESET_PRIVILEGE( xRunningPrivileged );\r
1077 }\r
1078 /*-----------------------------------------------------------*/\r
1079 \r
1080 void MPU_vPortInitialiseBlocks( void )\r
1081 {\r
1082 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1083 \r
1084         vPortInitialiseBlocks();\r
1085 \r
1086         portRESET_PRIVILEGE( xRunningPrivileged );\r
1087 }\r
1088 /*-----------------------------------------------------------*/\r
1089 \r
1090 size_t MPU_xPortGetFreeHeapSize( void )\r
1091 {\r
1092 size_t xReturn;\r
1093 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1094 \r
1095         xReturn = xPortGetFreeHeapSize();\r
1096 \r
1097         portRESET_PRIVILEGE( xRunningPrivileged );\r
1098         \r
1099         return xReturn;\r
1100 }\r
1101 \r