2 FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
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4 This file is part of the FreeRTOS distribution.
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6 FreeRTOS is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License (version 2) as published by the
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8 Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS without being obliged to provide the
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11 source code for proprietary components outside of the FreeRTOS kernel.
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12 Alternative commercial license and support terms are also available upon
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13 request. See the licensing section of http://www.FreeRTOS.org for full
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16 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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21 You should have received a copy of the GNU General Public License along
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22 with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
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23 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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26 ***************************************************************************
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28 * Looking for a quick start? Then check out the FreeRTOS eBook! *
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29 * See http://www.FreeRTOS.org/Documentation for details *
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31 ***************************************************************************
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35 Please ensure to read the configuration and relevant port sections of the
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36 online documentation.
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38 http://www.FreeRTOS.org - Documentation, latest information, license and
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41 http://www.SafeRTOS.com - A version that is certified for use in safety
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44 http://www.OpenRTOS.com - Commercial support, development, porting,
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45 licensing and training services.
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48 /*-----------------------------------------------------------
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49 * Implementation of functions defined in portable.h for the ARM CM3 port.
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50 *----------------------------------------------------------*/
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52 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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53 all the API functions to use the MPU wrappers. That should only be done when
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54 task.h is included from an application file. */
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55 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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57 /* Scheduler includes. */
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58 #include "FreeRTOS.h"
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62 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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64 /* Constants required to access and manipulate the NVIC. */
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65 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
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66 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
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67 #define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
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68 #define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
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69 #define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
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70 #define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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72 /* Constants required to access and manipulate the MPU. */
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73 #define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
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74 #define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
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75 #define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
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76 #define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
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77 #define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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78 #define portMPU_ENABLE ( 0x01UL )
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79 #define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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80 #define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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81 #define portMPU_REGION_VALID ( 0x10UL )
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82 #define portMPU_REGION_ENABLE ( 0x01UL )
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83 #define portPERIPHERALS_START_ADDRESS 0x40000000UL
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84 #define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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86 /* Constants required to access and manipulate the SysTick. */
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87 #define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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88 #define portNVIC_SYSTICK_INT ( 0x00000002UL )
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89 #define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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90 #define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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91 #define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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92 #define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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93 #define portNVIC_TEMP_SVC_PRI ( 0x01UL << 24UL )
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95 /* Constants required to set up the initial stack. */
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96 #define portINITIAL_XPSR ( 0x01000000 )
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97 #define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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98 #define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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100 /* Offsets in the stack to the parameters when inside the SVC handler. */
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101 #define portOFFSET_TO_PC ( 6 )
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103 /* Set the privilege level to user mode if xRunningPrivileged is false. */
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104 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )
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106 /* Each task maintains its own interrupt status in the critical nesting
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107 variable. Note this is not saved as part of the task context as context
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108 switches can only occur when uxCriticalNesting is zero. */
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109 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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112 * Setup the timer to generate the tick interrupts.
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114 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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117 * Configure a number of standard MPU regions that are used by all tasks.
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119 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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122 * Return the smallest MPU region size that a given number of bytes will fit
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123 * into. The region size is returned as the value that should be programmed
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124 * into the region attribute register for that region.
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126 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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129 * Checks to see if being called from the context of an unprivileged task, and
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130 * if so raises the privilege level and returns false - otherwise does nothing
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131 * other than return true.
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133 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
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136 * Standard FreeRTOS exception handlers.
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138 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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139 void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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140 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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143 * Starts the scheduler by restoring the context of the first task to run.
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145 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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148 * C portion of the SVC handler. The SVC handler is split between an asm entry
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149 * and a C wrapper for simplicity of coding and maintenance.
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151 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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153 /*-----------------------------------------------------------*/
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156 * See header file for description.
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158 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
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160 /* Simulate the stack frame as it would be created by a context switch
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162 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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164 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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166 *pxTopOfStack = 0; /* LR */
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167 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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168 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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169 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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171 if( xRunPrivileged == pdTRUE )
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173 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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177 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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180 return pxTopOfStack;
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182 /*-----------------------------------------------------------*/
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184 void vPortSVCHandler( void )
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186 /* Assumes psp was in use. */
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189 #ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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192 " mrseq r0, msp \n"
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193 " mrsne r0, psp \n"
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197 " b prvSVCHandler \n"
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200 /* This will never get executed, but is required to prevent prvSVCHandler
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201 being removed by the optimiser. */
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202 prvSVCHandler( NULL );
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204 /*-----------------------------------------------------------*/
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206 static void prvSVCHandler( unsigned long *pulParam )
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208 unsigned char ucSVCNumber;
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210 /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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211 xPSR. The first argument (r0) is pulParam[ 0 ]. */
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212 ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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213 switch( ucSVCNumber )
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215 case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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216 prvRestoreContextOfFirstTask();
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219 case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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222 case portSVC_prvRaisePrivilege : __asm volatile
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224 " mrs r1, control \n" /* Obtain current control value. */
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225 " bic r1, #1 \n" /* Set privilege bit. */
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226 " msr control, r1 \n" /* Write back new control value. */
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230 default : /* Unknown SVC call. */
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234 /*-----------------------------------------------------------*/
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236 static void prvRestoreContextOfFirstTask( void )
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240 " ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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243 " msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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244 " ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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246 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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247 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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248 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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249 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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250 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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251 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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252 " msr control, r3 \n"
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253 " msr psp, r0 \n" /* Restore the task stack pointer. */
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255 " msr basepri, r0 \n"
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256 " ldr r14, =0xfffffffd \n" /* Load exec return code. */
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260 "pxCurrentTCBConst2: .word pxCurrentTCB \n"
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263 /*-----------------------------------------------------------*/
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266 * See header file for description.
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268 portBASE_TYPE xPortStartScheduler( void )
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270 /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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271 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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272 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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273 *(portNVIC_SYSPRI1) |= portNVIC_TEMP_SVC_PRI;
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275 /* Configure the regions in the MPU that are common to all tasks. */
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278 /* Start the timer that generates the tick ISR. Interrupts are disabled
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280 prvSetupTimerInterrupt();
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282 /* Initialise the critical nesting count ready for the first task. */
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283 uxCriticalNesting = 0;
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285 /* Start the first task. */
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286 __asm volatile( " svc %0 \n"
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287 :: "i" (portSVC_START_SCHEDULER) );
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289 /* Should not get here! */
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292 /*-----------------------------------------------------------*/
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294 void vPortEndScheduler( void )
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296 /* It is unlikely that the CM3 port will require this function as there
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297 is nothing to return to. */
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299 /*-----------------------------------------------------------*/
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301 void vPortEnterCritical( void )
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303 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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305 portDISABLE_INTERRUPTS();
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306 uxCriticalNesting++;
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308 portRESET_PRIVILEGE( xRunningPrivileged );
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310 /*-----------------------------------------------------------*/
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312 void vPortExitCritical( void )
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314 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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316 uxCriticalNesting--;
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317 if( uxCriticalNesting == 0 )
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319 portENABLE_INTERRUPTS();
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321 portRESET_PRIVILEGE( xRunningPrivileged );
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323 /*-----------------------------------------------------------*/
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325 void xPortPendSVHandler( void )
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327 /* This is a naked function. */
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333 " ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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336 " mrs r1, control \n"
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337 " stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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338 " str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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340 " stmdb sp!, {r3, r14} \n"
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342 " msr basepri, r0 \n"
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343 " bl vTaskSwitchContext \n"
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345 " msr basepri, r0 \n"
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346 " ldmia sp!, {r3, r14} \n"
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347 " \n" /* Restore the context. */
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349 " ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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350 " add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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351 " ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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352 " ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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353 " stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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354 " ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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355 " msr control, r3 \n"
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361 "pxCurrentTCBConst: .word pxCurrentTCB \n"
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362 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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365 /*-----------------------------------------------------------*/
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367 void xPortSysTickHandler( void )
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369 unsigned long ulDummy;
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371 /* If using preemption, also force a context switch. */
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372 #if configUSE_PREEMPTION == 1
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373 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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376 ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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378 vTaskIncrementTick();
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380 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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382 /*-----------------------------------------------------------*/
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385 * Setup the systick timer to generate the tick interrupts at the required
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388 static void prvSetupTimerInterrupt( void )
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390 /* Configure SysTick to interrupt at the requested rate. */
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391 *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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392 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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394 /*-----------------------------------------------------------*/
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396 static void prvSetupMPU( void )
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398 extern unsigned long __privileged_functions_end__[];
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399 extern unsigned long __FLASH_segment_start__[];
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400 extern unsigned long __FLASH_segment_end__[];
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401 extern unsigned long __privileged_data_start__[];
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402 extern unsigned long __privileged_data_end__[];
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404 /* Check the expected MPU is present. */
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405 if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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407 /* First setup the entire flash for unprivileged read only access. */
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408 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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409 ( portMPU_REGION_VALID ) |
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410 ( portUNPRIVILEGED_FLASH_REGION );
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412 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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413 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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414 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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415 ( portMPU_REGION_ENABLE );
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417 /* Setup the first 16K for privileged only access (even though less
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418 than 10K is actually being used). This is where the kernel code is
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420 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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421 ( portMPU_REGION_VALID ) |
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422 ( portPRIVILEGED_FLASH_REGION );
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424 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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425 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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426 ( prvGetMPURegionSizeSetting( __privileged_functions_end__ - __FLASH_segment_start__ ) ) |
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427 ( portMPU_REGION_ENABLE );
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429 /* Setup the privileged data RAM region. This is where the kernel data
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431 *portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
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432 ( portMPU_REGION_VALID ) |
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433 ( portPRIVILEGED_RAM_REGION );
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435 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
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436 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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437 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
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438 ( portMPU_REGION_ENABLE );
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440 /* By default allow everything to access the general peripherals. The
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441 system peripherals and registers are protected. */
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442 *portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
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443 ( portMPU_REGION_VALID ) |
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444 ( portGENERAL_PERIPHERALS_REGION );
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446 *portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
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447 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
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448 ( portMPU_REGION_ENABLE );
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450 /* Enable the memory fault exception. */
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451 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
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453 /* Enable the MPU with the background region configured. */
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454 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
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457 /*-----------------------------------------------------------*/
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459 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
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461 unsigned long ulRegionSize, ulReturnValue = 4;
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463 /* 32 is the smallest region size, 31 is the largest valid value for
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465 for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
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467 if( ulActualSizeInBytes <= ulRegionSize )
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477 /* Shift the code by one before returning so it can be written directly
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478 into the the correct bit position of the attribute register. */
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479 return ( ulReturnValue << 1UL );
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481 /*-----------------------------------------------------------*/
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483 static portBASE_TYPE prvRaisePrivilege( void )
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487 " mrs r0, control \n"
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488 " tst r0, #1 \n" /* Is the task running privileged? */
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490 " movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
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491 " svcne %0 \n" /* Switch to privileged. */
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492 " moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
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494 :: "i" (portSVC_prvRaisePrivilege) : "r0"
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499 /*-----------------------------------------------------------*/
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501 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
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503 extern unsigned long __SRAM_segment_start__[];
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504 extern unsigned long __SRAM_segment_end__[];
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505 extern unsigned long __privileged_data_start__[];
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506 extern unsigned long __privileged_data_end__[];
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510 if( xRegions == NULL )
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512 /* No MPU regions are specified so allow access to all RAM. */
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513 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
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514 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
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515 ( portMPU_REGION_VALID ) |
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516 ( portSTACK_REGION );
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518 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
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519 ( portMPU_REGION_READ_WRITE ) |
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520 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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521 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
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522 ( portMPU_REGION_ENABLE );
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524 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
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525 just removed the privileged only parameters. */
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526 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
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527 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
\r
528 ( portMPU_REGION_VALID ) |
\r
529 ( portSTACK_REGION + 1 );
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531 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
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532 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
\r
533 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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534 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
\r
535 ( portMPU_REGION_ENABLE );
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537 /* Invalidate all other regions. */
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538 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
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540 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
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541 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
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546 /* This function is called automatically when the task is created - in
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547 which case the stack region parameters will be valid. At all other
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548 times the stack parameters will not be valid and it is assumed that the
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549 stack region has already been configured. */
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550 if( usStackDepth > 0 )
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552 /* Define the region that allows access to the stack. */
\r
553 xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
\r
554 ( ( unsigned long ) pxBottomOfStack ) |
\r
555 ( portMPU_REGION_VALID ) |
\r
556 ( portSTACK_REGION ); /* Region number. */
\r
558 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
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559 ( portMPU_REGION_READ_WRITE ) | /* Read and write. */
\r
560 ( prvGetMPURegionSizeSetting( usStackDepth * sizeof( portSTACK_TYPE ) ) ) |
\r
561 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
\r
562 ( portMPU_REGION_ENABLE );
\r
567 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
\r
569 if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
\r
571 /* Translate the generic region definition contained in
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572 xRegions into the CM3 specific MPU settings that are then
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573 stored in xMPUSettings. */
\r
574 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
\r
575 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
\r
576 ( portMPU_REGION_VALID ) |
\r
577 ( portSTACK_REGION + ul ); /* Region number. */
\r
579 xMPUSettings->xRegion[ ul ].ulRegionAttribute =
\r
580 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
\r
581 ( xRegions[ lIndex ].ulParameters ) |
\r
582 ( portMPU_REGION_ENABLE );
\r
586 /* Invalidate the region. */
\r
587 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
\r
588 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
\r
595 /*-----------------------------------------------------------*/
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597 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
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599 signed portBASE_TYPE xReturn;
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600 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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602 xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
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603 portRESET_PRIVILEGE( xRunningPrivileged );
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606 /*-----------------------------------------------------------*/
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608 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
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610 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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612 vTaskAllocateMPURegions( xTask, xRegions );
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613 portRESET_PRIVILEGE( xRunningPrivileged );
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615 /*-----------------------------------------------------------*/
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617 #if ( INCLUDE_vTaskDelete == 1 )
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618 void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
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620 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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622 vTaskDelete( pxTaskToDelete );
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623 portRESET_PRIVILEGE( xRunningPrivileged );
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626 /*-----------------------------------------------------------*/
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628 #if ( INCLUDE_vTaskDelayUntil == 1 )
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629 void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
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631 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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633 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
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634 portRESET_PRIVILEGE( xRunningPrivileged );
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637 /*-----------------------------------------------------------*/
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639 #if ( INCLUDE_vTaskDelay == 1 )
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640 void MPU_vTaskDelay( portTickType xTicksToDelay )
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642 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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644 vTaskDelay( xTicksToDelay );
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645 portRESET_PRIVILEGE( xRunningPrivileged );
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648 /*-----------------------------------------------------------*/
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650 #if ( INCLUDE_uxTaskPriorityGet == 1 )
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651 unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
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653 unsigned portBASE_TYPE uxReturn;
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654 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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656 uxReturn = uxTaskPriorityGet( pxTask );
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657 portRESET_PRIVILEGE( xRunningPrivileged );
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661 /*-----------------------------------------------------------*/
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663 #if ( INCLUDE_vTaskPrioritySet == 1 )
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664 void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
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666 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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668 vTaskPrioritySet( pxTask, uxNewPriority );
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669 portRESET_PRIVILEGE( xRunningPrivileged );
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672 /*-----------------------------------------------------------*/
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674 #if ( INCLUDE_vTaskSuspend == 1 )
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675 void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
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677 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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679 vTaskSuspend( pxTaskToSuspend );
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680 portRESET_PRIVILEGE( xRunningPrivileged );
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683 /*-----------------------------------------------------------*/
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685 #if ( INCLUDE_vTaskSuspend == 1 )
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686 signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
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688 signed portBASE_TYPE xReturn;
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689 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
691 xReturn = xTaskIsTaskSuspended( xTask );
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692 portRESET_PRIVILEGE( xRunningPrivileged );
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696 /*-----------------------------------------------------------*/
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698 #if ( INCLUDE_vTaskSuspend == 1 )
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699 void MPU_vTaskResume( xTaskHandle pxTaskToResume )
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701 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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703 vTaskResume( pxTaskToResume );
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704 portRESET_PRIVILEGE( xRunningPrivileged );
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707 /*-----------------------------------------------------------*/
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709 void MPU_vTaskSuspendAll( void )
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711 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
714 portRESET_PRIVILEGE( xRunningPrivileged );
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716 /*-----------------------------------------------------------*/
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718 signed portBASE_TYPE MPU_xTaskResumeAll( void )
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720 signed portBASE_TYPE xReturn;
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721 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
723 xReturn = xTaskResumeAll();
\r
724 portRESET_PRIVILEGE( xRunningPrivileged );
\r
727 /*-----------------------------------------------------------*/
\r
729 portTickType MPU_xTaskGetTickCount( void )
\r
731 portTickType xReturn;
\r
732 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
734 xReturn = xTaskGetTickCount();
\r
735 portRESET_PRIVILEGE( xRunningPrivileged );
\r
738 /*-----------------------------------------------------------*/
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740 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
\r
742 unsigned portBASE_TYPE uxReturn;
\r
743 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
745 uxReturn = uxTaskGetNumberOfTasks();
\r
746 portRESET_PRIVILEGE( xRunningPrivileged );
\r
749 /*-----------------------------------------------------------*/
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751 void MPU_vTaskList( signed char *pcWriteBuffer )
\r
753 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
755 vTaskList( pcWriteBuffer );
\r
756 portRESET_PRIVILEGE( xRunningPrivileged );
\r
759 /*-----------------------------------------------------------*/
\r
761 #if ( configGENERATE_RUN_TIME_STATS == 1 )
\r
762 void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
\r
764 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
766 vTaskGetRunTimeStats( pcWriteBuffer );
\r
767 portRESET_PRIVILEGE( xRunningPrivileged );
\r
770 /*-----------------------------------------------------------*/
\r
772 #if ( configUSE_TRACE_FACILITY == 1 )
\r
773 void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
\r
775 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
777 vTaskStartTrace( pcBuffer, ulBufferSize );
\r
778 portRESET_PRIVILEGE( xRunningPrivileged );
\r
781 /*-----------------------------------------------------------*/
\r
783 #if ( configUSE_TRACE_FACILITY == 1 )
\r
784 unsigned long MPU_ulTaskEndTrace( void )
\r
786 unsigned long ulReturn;
\r
787 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
789 ulReturn = ulTaskEndTrace();
\r
790 portRESET_PRIVILEGE( xRunningPrivileged );
\r
794 /*-----------------------------------------------------------*/
\r
796 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
797 void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
\r
799 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
801 vTaskSetApplicationTaskTag( xTask, pxTagValue );
\r
802 portRESET_PRIVILEGE( xRunningPrivileged );
\r
805 /*-----------------------------------------------------------*/
\r
807 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
808 pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
\r
810 pdTASK_HOOK_CODE xReturn;
\r
811 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
813 xReturn = xTaskGetApplicationTaskTag( xTask );
\r
814 portRESET_PRIVILEGE( xRunningPrivileged );
\r
818 /*-----------------------------------------------------------*/
\r
820 #if ( configUSE_APPLICATION_TASK_TAG == 1 )
\r
821 portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
\r
823 portBASE_TYPE xReturn;
\r
824 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
826 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
\r
827 portRESET_PRIVILEGE( xRunningPrivileged );
\r
831 /*-----------------------------------------------------------*/
\r
833 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
\r
834 unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
\r
836 unsigned portBASE_TYPE uxReturn;
\r
837 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
839 uxReturn = uxTaskGetStackHighWaterMark( xTask );
\r
840 portRESET_PRIVILEGE( xRunningPrivileged );
\r
844 /*-----------------------------------------------------------*/
\r
846 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
\r
847 xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
\r
849 xTaskHandle xReturn;
\r
850 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
852 xReturn = xTaskGetCurrentTaskHandle();
\r
853 portRESET_PRIVILEGE( xRunningPrivileged );
\r
857 /*-----------------------------------------------------------*/
\r
859 #if ( INCLUDE_xTaskGetSchedulerState == 1 )
\r
860 portBASE_TYPE MPU_xTaskGetSchedulerState( void )
\r
862 portBASE_TYPE xReturn;
\r
863 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
865 xReturn = xTaskGetSchedulerState();
\r
866 portRESET_PRIVILEGE( xRunningPrivileged );
\r
870 /*-----------------------------------------------------------*/
\r
872 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
\r
874 xQueueHandle xReturn;
\r
875 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
877 xReturn = xQueueCreate( uxQueueLength, uxItemSize );
\r
878 portRESET_PRIVILEGE( xRunningPrivileged );
\r
881 /*-----------------------------------------------------------*/
\r
883 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
885 signed portBASE_TYPE xReturn;
\r
886 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
888 xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
889 portRESET_PRIVILEGE( xRunningPrivileged );
\r
892 /*-----------------------------------------------------------*/
\r
894 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
\r
896 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
897 unsigned portBASE_TYPE uxReturn;
\r
899 uxReturn = uxQueueMessagesWaiting( pxQueue );
\r
900 portRESET_PRIVILEGE( xRunningPrivileged );
\r
903 /*-----------------------------------------------------------*/
\r
905 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
907 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
908 signed portBASE_TYPE xReturn;
\r
910 xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
911 portRESET_PRIVILEGE( xRunningPrivileged );
\r
914 /*-----------------------------------------------------------*/
\r
916 #if ( configUSE_MUTEXES == 1 )
\r
917 xQueueHandle MPU_xQueueCreateMutex( void )
\r
919 xQueueHandle xReturn;
\r
920 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
922 xReturn = xQueueCreateMutex();
\r
923 portRESET_PRIVILEGE( xRunningPrivileged );
\r
927 /*-----------------------------------------------------------*/
\r
929 #if configUSE_COUNTING_SEMAPHORES == 1
\r
930 xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
\r
932 xQueueHandle xReturn;
\r
933 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
935 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
\r
936 portRESET_PRIVILEGE( xRunningPrivileged );
\r
940 /*-----------------------------------------------------------*/
\r
942 #if ( configUSE_MUTEXES == 1 )
\r
943 portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
\r
945 portBASE_TYPE xReturn;
\r
946 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
948 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
\r
949 portRESET_PRIVILEGE( xRunningPrivileged );
\r
953 /*-----------------------------------------------------------*/
\r
955 #if ( configUSE_MUTEXES == 1 )
\r
956 portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
\r
958 portBASE_TYPE xReturn;
\r
959 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
961 xReturn = xQueueGiveMutexRecursive( xMutex );
\r
962 portRESET_PRIVILEGE( xRunningPrivileged );
\r
966 /*-----------------------------------------------------------*/
\r
968 #if configUSE_ALTERNATIVE_API == 1
\r
969 signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
\r
971 signed portBASE_TYPE xReturn;
\r
972 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
974 xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
\r
975 portRESET_PRIVILEGE( xRunningPrivileged );
\r
979 /*-----------------------------------------------------------*/
\r
981 #if configUSE_ALTERNATIVE_API == 1
\r
982 signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
\r
984 signed portBASE_TYPE xReturn;
\r
985 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
987 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
\r
988 portRESET_PRIVILEGE( xRunningPrivileged );
\r
992 /*-----------------------------------------------------------*/
\r
994 #if configQUEUE_REGISTRY_SIZE > 0
\r
995 void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
\r
997 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
999 vQueueAddToRegistry( xQueue, pcName );
\r
1001 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1004 /*-----------------------------------------------------------*/
\r
1006 void *MPU_pvPortMalloc( size_t xSize )
\r
1009 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1011 pvReturn = pvPortMalloc( xSize );
\r
1013 portRESET_PRIVILEGE( xRunningPrivileged );
\r
1017 /*-----------------------------------------------------------*/
\r
1019 void MPU_vPortFree( void *pv )
\r
1021 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
\r
1025 portRESET_PRIVILEGE( xRunningPrivileged );
\r