git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM3_MPU/port.c

   1 /*\r
   2     FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.\r
   3 \r
   4     This file is part of the FreeRTOS distribution.\r
   5 \r
   6     FreeRTOS is free software; you can redistribute it and/or modify it    under\r
   7     the terms of the GNU General Public License (version 2) as published by the\r
   8     Free Software Foundation and modified by the FreeRTOS exception.\r
   9     **NOTE** The exception to the GPL is included to allow you to distribute a\r
  10     combined work that includes FreeRTOS without being obliged to provide the\r
  11     source code for proprietary components outside of the FreeRTOS kernel.\r
  12     Alternative commercial license and support terms are also available upon\r
  13     request.  See the licensing section of http://www.FreeRTOS.org for full\r
  14     license details.\r
  15 \r
  16     FreeRTOS is distributed in the hope that it will be useful,    but WITHOUT\r
  17     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  18     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  19     more details.\r
  20 \r
  21     You should have received a copy of the GNU General Public License along\r
  22     with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59\r
  23     Temple Place, Suite 330, Boston, MA  02111-1307  USA.\r
  24 \r
  25 \r
  26     ***************************************************************************\r
  27     *                                                                         *\r
  28     * The FreeRTOS eBook and reference manual are available to purchase for a *\r
  29     * small fee. Help yourself get started quickly while also helping the     *\r
  30     * FreeRTOS project! See http://www.FreeRTOS.org/Documentation for details *\r
  31     *                                                                         *\r
  32     ***************************************************************************\r
  33 \r
  34     1 tab == 4 spaces!\r
  35 \r
  36     Please ensure to read the configuration and relevant port sections of the\r
  37     online documentation.\r
  38 \r
  39     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  40     contact details.\r
  41 \r
  42     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  43     critical systems.\r
  44 \r
  45     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  46     licensing and training services.\r
  47 */\r
  48 \r
  49 /*-----------------------------------------------------------\r
  50  * Implementation of functions defined in portable.h for the ARM CM3 port.\r
  51  *----------------------------------------------------------*/\r
  52 \r
  53 /* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining\r
  54 all the API functions to use the MPU wrappers.  That should only be done when\r
  55 task.h is included from an application file. */\r
  56 #define MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  57 \r
  58 /* Scheduler includes. */\r
  59 #include "FreeRTOS.h"\r
  60 #include "task.h"\r
  61 #include "queue.h"\r
  62 \r
  63 #undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE\r
  64 \r
  65 /* Constants required to access and manipulate the NVIC. */\r
  66 #define portNVIC_SYSTICK_CTRL                                   ( ( volatile unsigned long * ) 0xe000e010 )\r
  67 #define portNVIC_SYSTICK_LOAD                                   ( ( volatile unsigned long * ) 0xe000e014 )\r
  68 #define portNVIC_SYSPRI2                                                ( ( volatile unsigned long * ) 0xe000ed20 )\r
  69 #define portNVIC_SYSPRI1                                                ( ( volatile unsigned long * ) 0xe000ed1c )\r
  70 #define portNVIC_SYS_CTRL_STATE                                 ( ( volatile unsigned long * ) 0xe000ed24 )\r
  71 #define portNVIC_MEM_FAULT_ENABLE                               ( 1UL << 16UL )\r
  72 \r
  73 /* Constants required to access and manipulate the MPU. */\r
  74 #define portMPU_TYPE                                                    ( ( volatile unsigned long * ) 0xe000ed90 )\r
  75 #define portMPU_REGION_BASE_ADDRESS                             ( ( volatile unsigned long * ) 0xe000ed9C )\r
  76 #define portMPU_REGION_ATTRIBUTE                                ( ( volatile unsigned long * ) 0xe000edA0 )\r
  77 #define portMPU_CTRL                                                    ( ( volatile unsigned long * ) 0xe000ed94 )\r
  78 #define portEXPECTED_MPU_TYPE_VALUE                             ( 8UL << 8UL ) /* 8 regions, unified. */\r
  79 #define portMPU_ENABLE                                                  ( 0x01UL )\r
  80 #define portMPU_BACKGROUND_ENABLE                               ( 1UL << 2UL )\r
  81 #define portPRIVILEGED_EXECUTION_START_ADDRESS  ( 0UL )\r
  82 #define portMPU_REGION_VALID                                    ( 0x10UL )\r
  83 #define portMPU_REGION_ENABLE                                   ( 0x01UL )\r
  84 #define portPERIPHERALS_START_ADDRESS                   0x40000000UL\r
  85 #define portPERIPHERALS_END_ADDRESS                             0x5FFFFFFFUL\r
  86 \r
  87 /* Constants required to access and manipulate the SysTick. */\r
  88 #define portNVIC_SYSTICK_CLK                                    ( 0x00000004UL )\r
  89 #define portNVIC_SYSTICK_INT                                    ( 0x00000002UL )\r
  90 #define portNVIC_SYSTICK_ENABLE                                 ( 0x00000001UL )\r
  91 #define portNVIC_PENDSV_PRI                                             ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )\r
  92 #define portNVIC_SYSTICK_PRI                                    ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  93 #define portNVIC_SVC_PRI                                                ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )\r
  94 #define portNVIC_TEMP_SVC_PRI                                   ( 0x01UL << 24UL )\r
  95 \r
  96 /* Constants required to set up the initial stack. */\r
  97 #define portINITIAL_XPSR                                                ( 0x01000000 )\r
  98 #define portINITIAL_CONTROL_IF_UNPRIVILEGED             ( 0x03 )\r
  99 #define portINITIAL_CONTROL_IF_PRIVILEGED               ( 0x02 )\r
 100 \r
 101 /* Offsets in the stack to the parameters when inside the SVC handler. */\r
 102 #define portOFFSET_TO_PC                                                ( 6 )\r
 103 \r
 104 /* Set the privilege level to user mode if xRunningPrivileged is false. */\r
 105 #define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )\r
 106 \r
 107 /* Each task maintains its own interrupt status in the critical nesting\r
 108 variable.  Note this is not saved as part of the task context as context\r
 109 switches can only occur when uxCriticalNesting is zero. */\r
 110 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
 111 \r
 112 /*\r
 113  * Setup the timer to generate the tick interrupts.\r
 114  */\r
 115 static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;\r
 116 \r
 117 /*\r
 118  * Configure a number of standard MPU regions that are used by all tasks.\r
 119  */\r
 120 static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;\r
 121 \r
 122 /* \r
 123  * Return the smallest MPU region size that a given number of bytes will fit\r
 124  * into.  The region size is returned as the value that should be programmed\r
 125  * into the region attribute register for that region.\r
 126  */\r
 127 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;\r
 128 \r
 129 /* \r
 130  * Checks to see if being called from the context of an unprivileged task, and\r
 131  * if so raises the privilege level and returns false - otherwise does nothing\r
 132  * other than return true.\r
 133  */\r
 134 static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));\r
 135 \r
 136 /*\r
 137  * Standard FreeRTOS exception handlers.\r
 138  */\r
 139 void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 140 void xPortSysTickHandler( void )  __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;\r
 141 void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;\r
 142 \r
 143 /*\r
 144  * Starts the scheduler by restoring the context of the first task to run.\r
 145  */\r
 146 static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;\r
 147 \r
 148 /*\r
 149  * C portion of the SVC handler.  The SVC handler is split between an asm entry\r
 150  * and a C wrapper for simplicity of coding and maintenance.\r
 151  */\r
 152 static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;\r
 153 \r
 154 /*-----------------------------------------------------------*/\r
 155 \r
 156 /*\r
 157  * See header file for description.\r
 158  */\r
 159 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )\r
 160 {\r
 161         /* Simulate the stack frame as it would be created by a context switch\r
 162         interrupt. */\r
 163         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 164         pxTopOfStack--;\r
 165         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 166         pxTopOfStack--;\r
 167         *pxTopOfStack = 0;      /* LR */\r
 168         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 169         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 170         pxTopOfStack -= 9;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 171 \r
 172         if( xRunPrivileged == pdTRUE )\r
 173         {\r
 174                 *pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;\r
 175         }\r
 176         else\r
 177         {\r
 178                 *pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;\r
 179         }\r
 180 \r
 181         return pxTopOfStack;\r
 182 }\r
 183 /*-----------------------------------------------------------*/\r
 184 \r
 185 void vPortSVCHandler( void )\r
 186 {\r
 187         /* Assumes psp was in use. */\r
 188         __asm volatile \r
 189         (\r
 190                 #ifndef USE_PROCESS_STACK       /* Code should not be required if a main() is using the process stack. */\r
 191                         "       tst lr, #4                                              \n"\r
 192                         "       ite eq                                                  \n"\r
 193                         "       mrseq r0, msp                                   \n"\r
 194                         "       mrsne r0, psp                                   \n"\r
 195                 #else\r
 196                         "       mrs r0, psp                                             \n"\r
 197                 #endif\r
 198                         "       b prvSVCHandler                                 \n"\r
 199                         :::"r0"\r
 200         );\r
 201 \r
 202         /* This will never get executed, but is required to prevent prvSVCHandler\r
 203         being removed by the optimiser. */\r
 204         prvSVCHandler( NULL );\r
 205 }\r
 206 /*-----------------------------------------------------------*/\r
 207 \r
 208 static void prvSVCHandler(      unsigned long *pulParam )\r
 209 {\r
 210 unsigned char ucSVCNumber;\r
 211 \r
 212         /* The stack contains: r0, r1, r2, r3, r12, r14, the return address and\r
 213         xPSR.  The first argument (r0) is pulParam[ 0 ]. */\r
 214         ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];\r
 215         switch( ucSVCNumber )\r
 216         {\r
 217                 case portSVC_START_SCHEDULER    :       *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;\r
 218                                                                                         prvRestoreContextOfFirstTask();\r
 219                                                                                         break;\r
 220 \r
 221                 case portSVC_YIELD                              :       *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 222                                                                                         break;\r
 223 \r
 224                 case portSVC_prvRaisePrivilege  :       __asm volatile \r
 225                                                                                         (\r
 226                                                                                                 "       mrs r1, control         \n" /* Obtain current control value. */\r
 227                                                                                                 "       bic r1, #1                      \n" /* Set privilege bit. */\r
 228                                                                                                 "       msr control, r1         \n" /* Write back new control value. */\r
 229                                                                                                 :::"r1"\r
 230                                                                                         );\r
 231                                                                                         break;\r
 232 \r
 233                 default                                                 :       /* Unknown SVC call. */\r
 234                                                                                         break;\r
 235         }\r
 236 }\r
 237 /*-----------------------------------------------------------*/\r
 238 \r
 239 static void prvRestoreContextOfFirstTask( void )\r
 240 {\r
 241         __asm volatile \r
 242         (\r
 243                 "       ldr r0, =0xE000ED08                             \n" /* Use the NVIC offset register to locate the stack. */\r
 244                 "       ldr r0, [r0]                                    \n"\r
 245                 "       ldr r0, [r0]                                    \n"\r
 246                 "       msr msp, r0                                             \n" /* Set the msp back to the start of the stack. */\r
 247                 "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 248                 "       ldr r1, [r3]                                    \n"\r
 249                 "       ldr r0, [r1]                                    \n" /* The first item in the TCB is the task top of stack. */\r
 250                 "       add r1, r1, #4                                  \n" /* Move onto the second item in the TCB... */\r
 251                 "       ldr r2, =0xe000ed9c                             \n" /* Region Base Address register. */\r
 252                 "       ldmia r1!, {r4-r11}                             \n" /* Read 4 sets of MPU registers. */\r
 253                 "       stmia r2!, {r4-r11}                             \n" /* Write 4 sets of MPU registers. */\r
 254                 "       ldmia r0!, {r3, r4-r11}                 \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 255                 "       msr control, r3                                 \n"\r
 256                 "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 257                 "       mov r0, #0                                              \n"\r
 258                 "       msr     basepri, r0                                     \n"\r
 259                 "       ldr r14, =0xfffffffd                    \n" /* Load exec return code. */\r
 260                 "       bx r14                                                  \n"\r
 261                 "                                                                       \n"\r
 262                 "       .align 2                                                \n"\r
 263                 "pxCurrentTCBConst2: .word pxCurrentTCB \n"\r
 264         );\r
 265 }\r
 266 /*-----------------------------------------------------------*/\r
 267 \r
 268 /*\r
 269  * See header file for description.\r
 270  */\r
 271 portBASE_TYPE xPortStartScheduler( void )\r
 272 {\r
 273         /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */\r
 274         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 275         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 276     *(portNVIC_SYSPRI1) |= portNVIC_TEMP_SVC_PRI;\r
 277 \r
 278         /* Configure the regions in the MPU that are common to all tasks. */\r
 279         prvSetupMPU();\r
 280 \r
 281         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 282         here already. */\r
 283         prvSetupTimerInterrupt();\r
 284 \r
 285         /* Initialise the critical nesting count ready for the first task. */\r
 286         uxCriticalNesting = 0;\r
 287 \r
 288         /* Start the first task. */\r
 289         __asm volatile( "       svc %0                  \n"\r
 290                                         :: "i" (portSVC_START_SCHEDULER) );\r
 291 \r
 292         /* Should not get here! */\r
 293         return 0;\r
 294 }\r
 295 /*-----------------------------------------------------------*/\r
 296 \r
 297 void vPortEndScheduler( void )\r
 298 {\r
 299         /* It is unlikely that the CM3 port will require this function as there\r
 300         is nothing to return to.  */\r
 301 }\r
 302 /*-----------------------------------------------------------*/\r
 303 \r
 304 void vPortEnterCritical( void )\r
 305 {\r
 306 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 307 \r
 308         portDISABLE_INTERRUPTS();\r
 309         uxCriticalNesting++;\r
 310 \r
 311         portRESET_PRIVILEGE( xRunningPrivileged );\r
 312 }\r
 313 /*-----------------------------------------------------------*/\r
 314 \r
 315 void vPortExitCritical( void )\r
 316 {\r
 317 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 318 \r
 319         uxCriticalNesting--;\r
 320         if( uxCriticalNesting == 0 )\r
 321         {\r
 322                 portENABLE_INTERRUPTS();\r
 323         }\r
 324         portRESET_PRIVILEGE( xRunningPrivileged );\r
 325 }\r
 326 /*-----------------------------------------------------------*/\r
 327 \r
 328 void xPortPendSVHandler( void )\r
 329 {\r
 330         /* This is a naked function. */\r
 331 \r
 332         __asm volatile\r
 333         (\r
 334                 "       mrs r0, psp                                                     \n"\r
 335                 "                                                                               \n"\r
 336                 "       ldr     r3, pxCurrentTCBConst                   \n" /* Get the location of the current TCB. */\r
 337                 "       ldr     r2, [r3]                                                \n"\r
 338                 "                                                                               \n"\r
 339                 "       mrs r1, control                                         \n"\r
 340                 "       stmdb r0!, {r1, r4-r11}                         \n" /* Save the remaining registers. */\r
 341                 "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 342                 "                                                                               \n"\r
 343                 "       stmdb sp!, {r3, r14}                            \n"\r
 344                 "       mov r0, %0                                                      \n"\r
 345                 "       msr basepri, r0                                         \n"\r
 346                 "       bl vTaskSwitchContext                           \n"\r
 347                 "       mov r0, #0                                                      \n"\r
 348                 "       msr basepri, r0                                         \n"\r
 349                 "       ldmia sp!, {r3, r14}                            \n"\r
 350                 "                                                                               \n"     /* Restore the context. */\r
 351                 "       ldr r1, [r3]                                            \n"\r
 352                 "       ldr r0, [r1]                                            \n" /* The first item in the TCB is the task top of stack. */\r
 353                 "       add r1, r1, #4                                          \n" /* Move onto the second item in the TCB... */\r
 354                 "       ldr r2, =0xe000ed9c                                     \n" /* Region Base Address register. */\r
 355                 "       ldmia r1!, {r4-r11}                                     \n" /* Read 4 sets of MPU registers. */\r
 356                 "       stmia r2!, {r4-r11}                                     \n" /* Write 4 sets of MPU registers. */\r
 357                 "       ldmia r0!, {r3, r4-r11}                         \n" /* Pop the registers that are not automatically saved on exception entry. */\r
 358                 "       msr control, r3                                         \n"\r
 359                 "                                                                               \n"\r
 360                 "       msr psp, r0                                                     \n"\r
 361                 "       bx r14                                                          \n"\r
 362                 "                                                                               \n"\r
 363                 "       .align 2                                                        \n"\r
 364                 "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 365                 ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 366         );\r
 367 }\r
 368 /*-----------------------------------------------------------*/\r
 369 \r
 370 void xPortSysTickHandler( void )\r
 371 {\r
 372 unsigned long ulDummy;\r
 373 \r
 374         /* If using preemption, also force a context switch. */\r
 375         #if configUSE_PREEMPTION == 1\r
 376                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 377         #endif\r
 378 \r
 379         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 380         {\r
 381                 vTaskIncrementTick();\r
 382         }\r
 383         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 384 }\r
 385 /*-----------------------------------------------------------*/\r
 386 \r
 387 /*\r
 388  * Setup the systick timer to generate the tick interrupts at the required\r
 389  * frequency.\r
 390  */\r
 391 static void prvSetupTimerInterrupt( void )\r
 392 {\r
 393         /* Configure SysTick to interrupt at the requested rate. */\r
 394         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 395         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 396 }\r
 397 /*-----------------------------------------------------------*/\r
 398 \r
 399 static void prvSetupMPU( void )\r
 400 {\r
 401 extern unsigned long __privileged_functions_end__[];\r
 402 extern unsigned long __FLASH_segment_start__[];\r
 403 extern unsigned long __FLASH_segment_end__[];\r
 404 extern unsigned long __privileged_data_start__[];\r
 405 extern unsigned long __privileged_data_end__[];\r
 406 \r
 407         /* Check the expected MPU is present. */\r
 408         if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )\r
 409         {\r
 410                 /* First setup the entire flash for unprivileged read only access. */\r
 411         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 412                                                                                 ( portMPU_REGION_VALID ) |\r
 413                                                                                 ( portUNPRIVILEGED_FLASH_REGION ); \r
 414 \r
 415                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_ONLY ) |\r
 416                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 417                                                                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |\r
 418                                                                                 ( portMPU_REGION_ENABLE );\r
 419 \r
 420                 /* Setup the first 16K for privileged only access (even though less \r
 421                 than 10K is actually being used).  This is where the kernel code is\r
 422                 placed. */\r
 423         *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */\r
 424                                                                                 ( portMPU_REGION_VALID ) |\r
 425                                                                                 ( portPRIVILEGED_FLASH_REGION );\r
 426 \r
 427                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |\r
 428                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) | \r
 429                                                                                 ( prvGetMPURegionSizeSetting( __privileged_functions_end__ - __FLASH_segment_start__ ) ) | \r
 430                                                                                 ( portMPU_REGION_ENABLE );\r
 431 \r
 432                 /* Setup the privileged data RAM region.  This is where the kernel data\r
 433                 is placed. */\r
 434                 *portMPU_REGION_BASE_ADDRESS =  ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 435                                                                                 ( portMPU_REGION_VALID ) |\r
 436                                                                                 ( portPRIVILEGED_RAM_REGION );\r
 437 \r
 438                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 439                                                                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 440                                                                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 441                                                                                 ( portMPU_REGION_ENABLE );\r
 442 \r
 443                 /* By default allow everything to access the general peripherals.  The\r
 444                 system peripherals and registers are protected. */\r
 445                 *portMPU_REGION_BASE_ADDRESS =  ( portPERIPHERALS_START_ADDRESS ) |\r
 446                                                                                 ( portMPU_REGION_VALID ) |\r
 447                                                                                 ( portGENERAL_PERIPHERALS_REGION ); \r
 448 \r
 449                 *portMPU_REGION_ATTRIBUTE =             ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |\r
 450                                                                                 ( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |\r
 451                                                                                 ( portMPU_REGION_ENABLE );\r
 452 \r
 453                 /* Enable the memory fault exception. */\r
 454                 *portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;\r
 455 \r
 456                 /* Enable the MPU with the background region configured. */\r
 457                 *portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );\r
 458         }\r
 459 }\r
 460 /*-----------------------------------------------------------*/\r
 461 \r
 462 static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )\r
 463 {\r
 464 unsigned long ulRegionSize, ulReturnValue = 4;\r
 465 \r
 466         /* 32 is the smallest region size, 31 is the largest valid value for\r
 467         ulReturnValue. */\r
 468         for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )\r
 469         {\r
 470                 if( ulActualSizeInBytes <= ulRegionSize )\r
 471                 {\r
 472                         break;\r
 473                 }\r
 474                 else\r
 475                 {\r
 476                         ulReturnValue++;\r
 477                 }\r
 478         }\r
 479 \r
 480         /* Shift the code by one before returning so it can be written directly\r
 481         into the the correct bit position of the attribute register. */\r
 482         return ( ulReturnValue << 1UL );\r
 483 }\r
 484 /*-----------------------------------------------------------*/\r
 485 \r
 486 static portBASE_TYPE prvRaisePrivilege( void )\r
 487 {\r
 488         __asm volatile\r
 489         ( \r
 490                 "       mrs r0, control                                         \n"\r
 491                 "       tst r0, #1                                                      \n" /* Is the task running privileged? */\r
 492                 "       itte ne                                                         \n"\r
 493                 "       movne r0, #0                                            \n" /* CONTROL[0]!=0, return false. */\r
 494                 "       svcne %0                                                        \n" /* Switch to privileged. */\r
 495                 "       moveq r0, #1                                            \n" /* CONTROL[0]==0, return true. */\r
 496                 "       bx lr                                                           \n"\r
 497                 :: "i" (portSVC_prvRaisePrivilege) : "r0" \r
 498         );\r
 499 \r
 500         return 0;\r
 501 }\r
 502 /*-----------------------------------------------------------*/\r
 503 \r
 504 void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )\r
 505 {\r
 506 extern unsigned long __SRAM_segment_start__[];\r
 507 extern unsigned long __SRAM_segment_end__[];\r
 508 extern unsigned long __privileged_data_start__[];\r
 509 extern unsigned long __privileged_data_end__[];\r
 510 long lIndex;\r
 511 unsigned long ul;\r
 512 \r
 513         if( xRegions == NULL )\r
 514         {\r
 515                 /* No MPU regions are specified so allow access to all RAM. */\r
 516         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 517                                 ( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */\r
 518                                 ( portMPU_REGION_VALID ) |\r
 519                                 ( portSTACK_REGION );\r
 520 \r
 521                 xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 522                                 ( portMPU_REGION_READ_WRITE ) | \r
 523                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 524                                 ( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |\r
 525                                 ( portMPU_REGION_ENABLE );\r
 526 \r
 527                 /* Re-instate the privileged only RAM region as xRegion[ 0 ] will have\r
 528                 just removed the privileged only parameters. */\r
 529                 xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =        \r
 530                                 ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */\r
 531                                 ( portMPU_REGION_VALID ) |\r
 532                                 ( portSTACK_REGION + 1 );\r
 533 \r
 534                 xMPUSettings->xRegion[ 1 ].ulRegionAttribute =          \r
 535                                 ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |\r
 536                                 ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 537                                 prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |\r
 538                                 ( portMPU_REGION_ENABLE );\r
 539                                 \r
 540                 /* Invalidate all other regions. */\r
 541                 for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 542                 { \r
 543                         xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 544                         xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 545                 }\r
 546         }\r
 547         else\r
 548         {\r
 549                 /* This function is called automatically when the task is created - in\r
 550                 which case the stack region parameters will be valid.  At all other\r
 551                 times the stack parameters will not be valid and it is assumed that the\r
 552                 stack region has already been configured. */\r
 553                 if( usStackDepth > 0 )\r
 554                 {\r
 555                         /* Define the region that allows access to the stack. */\r
 556                         xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =        \r
 557                                         ( ( unsigned long ) pxBottomOfStack ) | \r
 558                                         ( portMPU_REGION_VALID ) |\r
 559                                         ( portSTACK_REGION ); /* Region number. */\r
 560 \r
 561                         xMPUSettings->xRegion[ 0 ].ulRegionAttribute =  \r
 562                                         ( portMPU_REGION_READ_WRITE ) | /* Read and write. */\r
 563                                         ( prvGetMPURegionSizeSetting( usStackDepth * sizeof( portSTACK_TYPE ) ) ) |\r
 564                                         ( portMPU_REGION_CACHEABLE_BUFFERABLE ) |\r
 565                                         ( portMPU_REGION_ENABLE );\r
 566                 }\r
 567 \r
 568                 lIndex = 0;\r
 569 \r
 570                 for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )\r
 571                 {\r
 572                         if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )\r
 573                         {\r
 574                                 /* Translate the generic region definition contained in \r
 575                                 xRegions into the CM3 specific MPU settings that are then \r
 576                                 stored in xMPUSettings. */\r
 577                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =       \r
 578                                                 ( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) | \r
 579                                                 ( portMPU_REGION_VALID ) |\r
 580                                                 ( portSTACK_REGION + ul ); /* Region number. */\r
 581 \r
 582                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = \r
 583                                                 ( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) | \r
 584                                                 ( xRegions[ lIndex ].ulParameters ) | \r
 585                                                 ( portMPU_REGION_ENABLE ); \r
 586                         }\r
 587                         else\r
 588                         {\r
 589                                 /* Invalidate the region. */\r
 590                                 xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;     \r
 591                                 xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;\r
 592                         }\r
 593 \r
 594                         lIndex++;\r
 595                 }\r
 596         }\r
 597 }\r
 598 /*-----------------------------------------------------------*/\r
 599 \r
 600 signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )\r
 601 {\r
 602 signed portBASE_TYPE xReturn;\r
 603 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 604 \r
 605         xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );\r
 606         portRESET_PRIVILEGE( xRunningPrivileged );\r
 607         return xReturn;\r
 608 }\r
 609 /*-----------------------------------------------------------*/\r
 610 \r
 611 void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )\r
 612 {\r
 613 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 614 \r
 615         vTaskAllocateMPURegions( xTask, xRegions );\r
 616         portRESET_PRIVILEGE( xRunningPrivileged );\r
 617 }\r
 618 /*-----------------------------------------------------------*/\r
 619 \r
 620 #if ( INCLUDE_vTaskDelete == 1 )\r
 621         void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )\r
 622         {\r
 623     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 624 \r
 625                 vTaskDelete( pxTaskToDelete );\r
 626         portRESET_PRIVILEGE( xRunningPrivileged );\r
 627         }\r
 628 #endif\r
 629 /*-----------------------------------------------------------*/\r
 630 \r
 631 #if ( INCLUDE_vTaskDelayUntil == 1 )\r
 632         void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )\r
 633         {\r
 634     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 635 \r
 636                 vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );\r
 637         portRESET_PRIVILEGE( xRunningPrivileged );\r
 638         }\r
 639 #endif\r
 640 /*-----------------------------------------------------------*/\r
 641 \r
 642 #if ( INCLUDE_vTaskDelay == 1 )\r
 643         void MPU_vTaskDelay( portTickType xTicksToDelay )\r
 644         {\r
 645     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 646 \r
 647                 vTaskDelay( xTicksToDelay );\r
 648         portRESET_PRIVILEGE( xRunningPrivileged );\r
 649         }\r
 650 #endif\r
 651 /*-----------------------------------------------------------*/\r
 652 \r
 653 #if ( INCLUDE_uxTaskPriorityGet == 1 )\r
 654         unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )\r
 655         {\r
 656         unsigned portBASE_TYPE uxReturn;\r
 657     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 658 \r
 659                 uxReturn = uxTaskPriorityGet( pxTask );\r
 660         portRESET_PRIVILEGE( xRunningPrivileged );\r
 661                 return uxReturn;\r
 662         }\r
 663 #endif\r
 664 /*-----------------------------------------------------------*/\r
 665 \r
 666 #if ( INCLUDE_vTaskPrioritySet == 1 )\r
 667         void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )\r
 668         {\r
 669     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 670 \r
 671                 vTaskPrioritySet( pxTask, uxNewPriority );\r
 672         portRESET_PRIVILEGE( xRunningPrivileged );\r
 673         }\r
 674 #endif\r
 675 /*-----------------------------------------------------------*/\r
 676 \r
 677 #if ( INCLUDE_vTaskSuspend == 1 )\r
 678         void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )\r
 679         {\r
 680     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 681 \r
 682                 vTaskSuspend( pxTaskToSuspend );\r
 683         portRESET_PRIVILEGE( xRunningPrivileged );\r
 684         }\r
 685 #endif\r
 686 /*-----------------------------------------------------------*/\r
 687 \r
 688 #if ( INCLUDE_vTaskSuspend == 1 )\r
 689         signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )\r
 690         {\r
 691         signed portBASE_TYPE xReturn;\r
 692     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 693 \r
 694                 xReturn = xTaskIsTaskSuspended( xTask );\r
 695         portRESET_PRIVILEGE( xRunningPrivileged );\r
 696                 return xReturn;\r
 697         }\r
 698 #endif\r
 699 /*-----------------------------------------------------------*/\r
 700 \r
 701 #if ( INCLUDE_vTaskSuspend == 1 )\r
 702         void MPU_vTaskResume( xTaskHandle pxTaskToResume )\r
 703         {\r
 704     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 705 \r
 706                 vTaskResume( pxTaskToResume );\r
 707         portRESET_PRIVILEGE( xRunningPrivileged );\r
 708         }\r
 709 #endif\r
 710 /*-----------------------------------------------------------*/\r
 711 \r
 712 void MPU_vTaskSuspendAll( void )\r
 713 {\r
 714 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 715 \r
 716         vTaskSuspendAll();\r
 717     portRESET_PRIVILEGE( xRunningPrivileged );\r
 718 }\r
 719 /*-----------------------------------------------------------*/\r
 720 \r
 721 signed portBASE_TYPE MPU_xTaskResumeAll( void )\r
 722 {\r
 723 signed portBASE_TYPE xReturn;\r
 724 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 725 \r
 726         xReturn = xTaskResumeAll();\r
 727     portRESET_PRIVILEGE( xRunningPrivileged );\r
 728     return xReturn;\r
 729 }\r
 730 /*-----------------------------------------------------------*/\r
 731 \r
 732 portTickType MPU_xTaskGetTickCount( void )\r
 733 {\r
 734 portTickType xReturn;\r
 735 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 736 \r
 737         xReturn = xTaskGetTickCount();\r
 738     portRESET_PRIVILEGE( xRunningPrivileged );\r
 739         return xReturn;\r
 740 }\r
 741 /*-----------------------------------------------------------*/\r
 742 \r
 743 unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )\r
 744 {\r
 745 unsigned portBASE_TYPE uxReturn;\r
 746 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 747 \r
 748         uxReturn = uxTaskGetNumberOfTasks();\r
 749     portRESET_PRIVILEGE( xRunningPrivileged );\r
 750         return uxReturn;\r
 751 }\r
 752 /*-----------------------------------------------------------*/\r
 753 \r
 754 void MPU_vTaskList( signed char *pcWriteBuffer )\r
 755 {\r
 756 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 757 \r
 758         vTaskList( pcWriteBuffer );\r
 759     portRESET_PRIVILEGE( xRunningPrivileged );\r
 760 }\r
 761 \r
 762 /*-----------------------------------------------------------*/\r
 763 \r
 764 #if ( configGENERATE_RUN_TIME_STATS == 1 )\r
 765         void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )\r
 766         {\r
 767     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 768 \r
 769                 vTaskGetRunTimeStats( pcWriteBuffer );\r
 770         portRESET_PRIVILEGE( xRunningPrivileged );\r
 771         }\r
 772 #endif\r
 773 /*-----------------------------------------------------------*/\r
 774 \r
 775 #if ( configUSE_TRACE_FACILITY == 1 )\r
 776         void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )\r
 777         {\r
 778     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 779 \r
 780                 vTaskStartTrace( pcBuffer, ulBufferSize );\r
 781         portRESET_PRIVILEGE( xRunningPrivileged );\r
 782         }\r
 783 #endif\r
 784 /*-----------------------------------------------------------*/\r
 785 \r
 786 #if ( configUSE_TRACE_FACILITY == 1 )\r
 787         unsigned long MPU_ulTaskEndTrace( void )\r
 788         {\r
 789         unsigned long ulReturn;\r
 790     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 791 \r
 792                 ulReturn = ulTaskEndTrace();\r
 793         portRESET_PRIVILEGE( xRunningPrivileged );\r
 794                 return ulReturn;\r
 795         }\r
 796 #endif\r
 797 /*-----------------------------------------------------------*/\r
 798 \r
 799 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 800         void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )\r
 801         {\r
 802     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 803 \r
 804                 vTaskSetApplicationTaskTag( xTask, pxTagValue );\r
 805         portRESET_PRIVILEGE( xRunningPrivileged );\r
 806         }\r
 807 #endif\r
 808 /*-----------------------------------------------------------*/\r
 809 \r
 810 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 811         pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )\r
 812         {\r
 813         pdTASK_HOOK_CODE xReturn;\r
 814     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 815 \r
 816                 xReturn = xTaskGetApplicationTaskTag( xTask );\r
 817         portRESET_PRIVILEGE( xRunningPrivileged );\r
 818                 return xReturn;\r
 819         }\r
 820 #endif\r
 821 /*-----------------------------------------------------------*/\r
 822 \r
 823 #if ( configUSE_APPLICATION_TASK_TAG == 1 )\r
 824         portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )\r
 825         {\r
 826         portBASE_TYPE xReturn;\r
 827     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 828 \r
 829                 xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );\r
 830         portRESET_PRIVILEGE( xRunningPrivileged );\r
 831                 return xReturn;\r
 832         }\r
 833 #endif\r
 834 /*-----------------------------------------------------------*/\r
 835 \r
 836 #if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )\r
 837         unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )\r
 838         {\r
 839         unsigned portBASE_TYPE uxReturn;\r
 840     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 841 \r
 842                 uxReturn = uxTaskGetStackHighWaterMark( xTask );\r
 843         portRESET_PRIVILEGE( xRunningPrivileged );\r
 844                 return uxReturn;\r
 845         }\r
 846 #endif\r
 847 /*-----------------------------------------------------------*/\r
 848 \r
 849 #if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )\r
 850         xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )\r
 851         {\r
 852         xTaskHandle xReturn;\r
 853     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 854 \r
 855                 xReturn = xTaskGetCurrentTaskHandle();\r
 856         portRESET_PRIVILEGE( xRunningPrivileged );\r
 857                 return xReturn;\r
 858         }\r
 859 #endif\r
 860 /*-----------------------------------------------------------*/\r
 861 \r
 862 #if ( INCLUDE_xTaskGetSchedulerState == 1 )\r
 863         portBASE_TYPE MPU_xTaskGetSchedulerState( void )\r
 864         {\r
 865         portBASE_TYPE xReturn;\r
 866     portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 867 \r
 868                 xReturn = xTaskGetSchedulerState();\r
 869         portRESET_PRIVILEGE( xRunningPrivileged );\r
 870                 return xReturn;\r
 871         }\r
 872 #endif\r
 873 /*-----------------------------------------------------------*/\r
 874 \r
 875 xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )\r
 876 {\r
 877 xQueueHandle xReturn;\r
 878 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 879 \r
 880         xReturn = xQueueCreate( uxQueueLength, uxItemSize );\r
 881         portRESET_PRIVILEGE( xRunningPrivileged );\r
 882         return xReturn;\r
 883 }\r
 884 /*-----------------------------------------------------------*/\r
 885 \r
 886 signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 887 {\r
 888 signed portBASE_TYPE xReturn;\r
 889 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 890 \r
 891         xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 892         portRESET_PRIVILEGE( xRunningPrivileged );\r
 893         return xReturn;\r
 894 }\r
 895 /*-----------------------------------------------------------*/\r
 896 \r
 897 unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )\r
 898 {\r
 899 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 900 unsigned portBASE_TYPE uxReturn;\r
 901 \r
 902         uxReturn = uxQueueMessagesWaiting( pxQueue );\r
 903         portRESET_PRIVILEGE( xRunningPrivileged );\r
 904         return uxReturn;\r
 905 }\r
 906 /*-----------------------------------------------------------*/\r
 907 \r
 908 signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 909 {\r
 910 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 911 signed portBASE_TYPE xReturn;\r
 912 \r
 913         xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
 914         portRESET_PRIVILEGE( xRunningPrivileged );\r
 915         return xReturn;\r
 916 }\r
 917 /*-----------------------------------------------------------*/\r
 918 \r
 919 #if ( configUSE_MUTEXES == 1 )\r
 920         xQueueHandle MPU_xQueueCreateMutex( void )\r
 921         {\r
 922     xQueueHandle xReturn;\r
 923         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 924 \r
 925                 xReturn = xQueueCreateMutex();\r
 926                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 927                 return xReturn;\r
 928         }\r
 929 #endif\r
 930 /*-----------------------------------------------------------*/\r
 931 \r
 932 #if configUSE_COUNTING_SEMAPHORES == 1\r
 933         xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )\r
 934         {\r
 935     xQueueHandle xReturn;\r
 936         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 937 \r
 938                 xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );\r
 939                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 940                 return xReturn;\r
 941         }\r
 942 #endif\r
 943 /*-----------------------------------------------------------*/\r
 944 \r
 945 #if ( configUSE_MUTEXES == 1 )\r
 946         portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )\r
 947         {\r
 948         portBASE_TYPE xReturn;\r
 949         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 950 \r
 951                 xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );\r
 952                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 953                 return xReturn;\r
 954         }\r
 955 #endif\r
 956 /*-----------------------------------------------------------*/\r
 957 \r
 958 #if ( configUSE_MUTEXES == 1 )\r
 959         portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )\r
 960         {\r
 961         portBASE_TYPE xReturn;\r
 962         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 963 \r
 964                 xReturn = xQueueGiveMutexRecursive( xMutex );\r
 965                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 966                 return xReturn;\r
 967         }\r
 968 #endif\r
 969 /*-----------------------------------------------------------*/\r
 970 \r
 971 #if configUSE_ALTERNATIVE_API == 1\r
 972         signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )\r
 973         {\r
 974         signed portBASE_TYPE xReturn;\r
 975         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 976 \r
 977                 xReturn =       signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );\r
 978                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 979                 return xReturn;\r
 980         }\r
 981 #endif\r
 982 /*-----------------------------------------------------------*/\r
 983 \r
 984 #if configUSE_ALTERNATIVE_API == 1\r
 985         signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )\r
 986         {\r
 987     signed portBASE_TYPE xReturn;\r
 988         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
 989 \r
 990                 xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );\r
 991                 portRESET_PRIVILEGE( xRunningPrivileged );\r
 992                 return xReturn;\r
 993         }\r
 994 #endif\r
 995 /*-----------------------------------------------------------*/\r
 996 \r
 997 #if configQUEUE_REGISTRY_SIZE > 0\r
 998         void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )\r
 999         {\r
1000         portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1001 \r
1002                 vQueueAddToRegistry( xQueue, pcName );\r
1003 \r
1004                 portRESET_PRIVILEGE( xRunningPrivileged );\r
1005         }\r
1006 #endif\r
1007 /*-----------------------------------------------------------*/\r
1008 \r
1009 void *MPU_pvPortMalloc( size_t xSize )\r
1010 {\r
1011 void *pvReturn;\r
1012 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1013 \r
1014         pvReturn = pvPortMalloc( xSize );\r
1015 \r
1016         portRESET_PRIVILEGE( xRunningPrivileged );\r
1017 \r
1018         return pvReturn;\r
1019 }\r
1020 /*-----------------------------------------------------------*/\r
1021 \r
1022 void MPU_vPortFree( void *pv )\r
1023 {\r
1024 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1025 \r
1026         vPortFree( pv );\r
1027 \r
1028         portRESET_PRIVILEGE( xRunningPrivileged );\r
1029 }\r
1030 /*-----------------------------------------------------------*/\r
1031 \r
1032 void MPU_vPortInitialiseBlocks( void )\r
1033 {\r
1034 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1035 \r
1036         vPortInitialiseBlocks();\r
1037 \r
1038         portRESET_PRIVILEGE( xRunningPrivileged );\r
1039 }\r
1040 /*-----------------------------------------------------------*/\r
1041 \r
1042 size_t MPU_xPortGetFreeHeapSize( void )\r
1043 {\r
1044 size_t xReturn;\r
1045 portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();\r
1046 \r
1047         xReturn = xPortGetFreeHeapSize();\r
1048 \r
1049         portRESET_PRIVILEGE( xRunningPrivileged );\r
1050         \r
1051         return xReturn;\r
1052 }\r
1053 \r