git.sur5r.net Git - freertos/blob - Source/portable/GCC/ARM_CM4F/port.c

   1 /*\r
   2     FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.\r
   3 \r
   4 \r
   5     ***************************************************************************\r
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  23 \r
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  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
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  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
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  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
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  52 */\r
  53 \r
  54 /*-----------------------------------------------------------\r
  55  * Implementation of functions defined in portable.h for the ARM CM4F port.\r
  56  *----------------------------------------------------------*/\r
  57 \r
  58 /* Scheduler includes. */\r
  59 #include "FreeRTOS.h"\r
  60 #include "task.h"\r
  61 \r
  62 #ifndef __VFP_FP__\r
  63         #error This port can only be used when the project options are configured to enable hardware floating point support.\r
  64 #endif\r
  65 \r
  66 /* Constants required to manipulate the NVIC. */\r
  67 #define portNVIC_SYSTICK_CTRL           ( ( volatile unsigned long * ) 0xe000e010 )\r
  68 #define portNVIC_SYSTICK_LOAD           ( ( volatile unsigned long * ) 0xe000e014 )\r
  69 #define portNVIC_INT_CTRL                       ( ( volatile unsigned long * ) 0xe000ed04 )\r
  70 #define portNVIC_SYSPRI2                        ( ( volatile unsigned long * ) 0xe000ed20 )\r
  71 #define portNVIC_SYSTICK_CLK            0x00000004\r
  72 #define portNVIC_SYSTICK_INT            0x00000002\r
  73 #define portNVIC_SYSTICK_ENABLE         0x00000001\r
  74 #define portNVIC_PENDSVSET                      0x10000000\r
  75 #define portNVIC_PENDSV_PRI                     ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )\r
  76 #define portNVIC_SYSTICK_PRI            ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )\r
  77 \r
  78 /* Constants required to manipulate the VFP. */\r
  79 #define portFPCCR                                       ( ( volatile unsigned long * ) 0xe000ef34 ) /* Floating point context control register. */\r
  80 #define portASPEN_AND_LSPEN_BITS        ( 0x3UL << 30UL )\r
  81 \r
  82 /* Constants required to set up the initial stack. */\r
  83 #define portINITIAL_XPSR                        ( 0x01000000 )\r
  84 #define portINITIAL_EXEC_RETURN         ( 0xfffffffd )\r
  85 \r
  86 /* The priority used by the kernel is assigned to a variable to make access\r
  87 from inline assembler easier. */\r
  88 const unsigned long ulKernelPriority = configKERNEL_INTERRUPT_PRIORITY;\r
  89 \r
  90 /* Each task maintains its own interrupt status in the critical nesting\r
  91 variable. */\r
  92 static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;\r
  93 \r
  94 /*\r
  95  * Setup the timer to generate the tick interrupts.\r
  96  */\r
  97 static void prvSetupTimerInterrupt( void );\r
  98 \r
  99 /*\r
 100  * Exception handlers.\r
 101  */\r
 102 void xPortPendSVHandler( void ) __attribute__ (( naked ));\r
 103 void xPortSysTickHandler( void );\r
 104 void vPortSVCHandler( void ) __attribute__ (( naked ));\r
 105 \r
 106 /*\r
 107  * Start first task is a separate function so it can be tested in isolation.\r
 108  */\r
 109 static void vPortStartFirstTask( void ) __attribute__ (( naked ));\r
 110 \r
 111 /*\r
 112  * Function to enable the VFP.\r
 113  */\r
 114  static void vPortEnableVFP( void ) __attribute__ (( naked ));\r
 115 \r
 116 \r
 117 /*-----------------------------------------------------------*/\r
 118 \r
 119 /*\r
 120  * See header file for description.\r
 121  */\r
 122 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 123 {\r
 124         /* Simulate the stack frame as it would be created by a context switch\r
 125         interrupt. */\r
 126 \r
 127         /* Offset added to account for the way the MCU uses the stack on entry/exit\r
 128         of interrupts, and to ensure alignment. */\r
 129         pxTopOfStack -= 2;\r
 130 \r
 131         *pxTopOfStack = portINITIAL_XPSR;       /* xPSR */\r
 132         pxTopOfStack--;\r
 133         *pxTopOfStack = ( portSTACK_TYPE ) pxCode;      /* PC */\r
 134         pxTopOfStack--;\r
 135         *pxTopOfStack = 0;      /* LR */\r
 136 \r
 137         /* Save code space by skipping register initialisation. */\r
 138         pxTopOfStack -= 5;      /* R12, R3, R2 and R1. */\r
 139         *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;        /* R0 */\r
 140 \r
 141         /* A save method is being used that requiers each task to maintain its\r
 142         own exec return value. */\r
 143         pxTopOfStack--;\r
 144         *pxTopOfStack = portINITIAL_EXEC_RETURN;\r
 145 \r
 146         pxTopOfStack -= 8;      /* R11, R10, R9, R8, R7, R6, R5 and R4. */\r
 147 \r
 148         return pxTopOfStack;\r
 149 }\r
 150 /*-----------------------------------------------------------*/\r
 151 \r
 152 void vPortSVCHandler( void )\r
 153 {\r
 154         __asm volatile (\r
 155                                         "       ldr     r3, pxCurrentTCBConst2          \n" /* Restore the context. */\r
 156                                         "       ldr r1, [r3]                                    \n" /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */\r
 157                                         "       ldr r0, [r1]                                    \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 158                                         "       ldmia r0!, {r4-r11, r14}                \n" /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */\r
 159                                         "       msr psp, r0                                             \n" /* Restore the task stack pointer. */\r
 160                                         "       mov r0, #0                                              \n"\r
 161                                         "       msr     basepri, r0                                     \n"\r
 162                                         "       bx r14                                                  \n"\r
 163                                         "                                                                       \n"\r
 164                                         "       .align 2                                                \n"\r
 165                                         "pxCurrentTCBConst2: .word pxCurrentTCB                         \n"\r
 166                                 );\r
 167 }\r
 168 /*-----------------------------------------------------------*/\r
 169 \r
 170 static void vPortStartFirstTask( void )\r
 171 {\r
 172         __asm volatile(\r
 173                                         " ldr r0, =0xE000ED08   \n" /* Use the NVIC offset register to locate the stack. */\r
 174                                         " ldr r0, [r0]                  \n"\r
 175                                         " ldr r0, [r0]                  \n"\r
 176                                         " msr msp, r0                   \n" /* Set the msp back to the start of the stack. */\r
 177                                         " cpsie i                               \n" /* Globally enable interrupts. */\r
 178                                         " svc 0                                 \n" /* System call to start first task. */\r
 179                                         " nop                                   \n"\r
 180                                 );\r
 181 }\r
 182 /*-----------------------------------------------------------*/\r
 183 \r
 184 /*\r
 185  * See header file for description.\r
 186  */\r
 187 portBASE_TYPE xPortStartScheduler( void )\r
 188 {\r
 189         /* Make PendSV and SysTick the lowest priority interrupts. */\r
 190         *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;\r
 191         *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;\r
 192 \r
 193         /* Start the timer that generates the tick ISR.  Interrupts are disabled\r
 194         here already. */\r
 195         prvSetupTimerInterrupt();\r
 196 \r
 197         /* Initialise the critical nesting count ready for the first task. */\r
 198         uxCriticalNesting = 0;\r
 199 \r
 200         /* Ensure the VFP is enabled - it should be anyway. */\r
 201         vPortEnableVFP();\r
 202 \r
 203         /* Lazy save always. */\r
 204         *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;\r
 205 \r
 206         /* Start the first task. */\r
 207         vPortStartFirstTask();\r
 208 \r
 209         /* Should not get here! */\r
 210         return 0;\r
 211 }\r
 212 /*-----------------------------------------------------------*/\r
 213 \r
 214 void vPortEndScheduler( void )\r
 215 {\r
 216         /* It is unlikely that the CM4F port will require this function as there\r
 217         is nothing to return to.  */\r
 218 }\r
 219 /*-----------------------------------------------------------*/\r
 220 \r
 221 void vPortYieldFromISR( void )\r
 222 {\r
 223         /* Set a PendSV to request a context switch. */\r
 224         *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 225 }\r
 226 /*-----------------------------------------------------------*/\r
 227 \r
 228 void vPortEnterCritical( void )\r
 229 {\r
 230         portDISABLE_INTERRUPTS();\r
 231         uxCriticalNesting++;\r
 232 }\r
 233 /*-----------------------------------------------------------*/\r
 234 \r
 235 void vPortExitCritical( void )\r
 236 {\r
 237         uxCriticalNesting--;\r
 238         if( uxCriticalNesting == 0 )\r
 239         {\r
 240                 portENABLE_INTERRUPTS();\r
 241         }\r
 242 }\r
 243 /*-----------------------------------------------------------*/\r
 244 \r
 245 void xPortPendSVHandler( void )\r
 246 {\r
 247         /* This is a naked function. */\r
 248 \r
 249         __asm volatile\r
 250         (\r
 251         "       mrs r0, psp                                                     \n"\r
 252         "                                                                               \n"\r
 253         "       ldr     r3, pxCurrentTCBConst                           \n" /* Get the location of the current TCB. */\r
 254         "       ldr     r2, [r3]                                                \n"\r
 255         "                                                                               \n"\r
 256         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, push high vfp registers. */\r
 257         "       it eq                                                           \n"\r
 258         "       vstmdbeq r0!, {s16-s31}                         \n"\r
 259         "                                                                               \n"\r
 260         "       stmdb r0!, {r4-r11, r14}                        \n" /* Save the core registers. */\r
 261         "                                                                               \n"\r
 262         "       str r0, [r2]                                            \n" /* Save the new top of stack into the first member of the TCB. */\r
 263         "                                                                               \n"\r
 264         "       stmdb sp!, {r3, r14}                            \n"\r
 265         "       mov r0, %0                                                      \n"\r
 266         "       msr basepri, r0                                         \n"\r
 267         "       bl vTaskSwitchContext                           \n"\r
 268         "       mov r0, #0                                                      \n"\r
 269         "       msr basepri, r0                                         \n"\r
 270         "       ldmia sp!, {r3, r14}                            \n"\r
 271         "                                                                               \n"\r
 272         "       ldr r1, [r3]                                            \n" /* The first item in pxCurrentTCB is the task top of stack. */\r
 273         "       ldr r0, [r1]                                            \n"\r
 274         "                                                                               \n"\r
 275         "       ldmia r0!, {r4-r11, r14}                        \n" /* Pop the core registers. */\r
 276         "                                                                               \n"\r
 277         "       tst r14, #0x10                                          \n" /* Is the task using the FPU context?  If so, pop the high vfp registers too. */\r
 278         "       it eq                                                           \n"\r
 279         "       vldmiaeq r0!, {s16-s31}                         \n"\r
 280         "                                                                               \n"\r
 281         "       msr psp, r0                                                     \n"\r
 282         "       bx r14                                                          \n"\r
 283         "                                                                               \n"\r
 284         "       .align 2                                                        \n"\r
 285         "pxCurrentTCBConst: .word pxCurrentTCB  \n"\r
 286         ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)\r
 287         );\r
 288 }\r
 289 /*-----------------------------------------------------------*/\r
 290 \r
 291 void xPortSysTickHandler( void )\r
 292 {\r
 293 unsigned long ulDummy;\r
 294 \r
 295         /* If using preemption, also force a context switch. */\r
 296         #if configUSE_PREEMPTION == 1\r
 297                 *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;\r
 298         #endif\r
 299 \r
 300         ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();\r
 301         {\r
 302                 vTaskIncrementTick();\r
 303         }\r
 304         portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );\r
 305 }\r
 306 /*-----------------------------------------------------------*/\r
 307 \r
 308 /*\r
 309  * Setup the systick timer to generate the tick interrupts at the required\r
 310  * frequency.\r
 311  */\r
 312 void prvSetupTimerInterrupt( void )\r
 313 {\r
 314         /* Configure SysTick to interrupt at the requested rate. */\r
 315         *(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;\r
 316         *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;\r
 317 }\r
 318 /*-----------------------------------------------------------*/\r
 319 \r
 320 /* This is a naked function. */\r
 321 static void vPortEnableVFP( void )\r
 322 {\r
 323         __asm volatile\r
 324         (\r
 325                 "       ldr.w r0, =0xE000ED88           \n" /* The FPU enable bits are in the CPACR. */\r
 326                 "       ldr r1, [r0]                            \n"\r
 327                 "                                                               \n"\r
 328                 "       orr r1, r1, #( 0xf << 20 )      \n" /* Enable CP10 and CP11 coprocessors, then save back. */\r
 329                 "       str r1, [r0]                            \n"\r
 330                 "       bx r14                                          "\r
 331         );\r
 332 }\r
 333 \r