1 /*This file has been prepared for Doxygen automatic documentation generation.*/
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2 /*! \file *********************************************************************
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4 * \brief FreeRTOS port source for AVR32 UC3.
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6 * - Compiler: GNU GCC for AVR32
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7 * - Supported devices: All AVR32 devices can be used.
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10 * \author Atmel Corporation: http://www.atmel.com \n
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11 * Support and FAQ: http://support.atmel.no/
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13 *****************************************************************************/
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16 FreeRTOS.org V4.5.0 - Copyright (C) 2003-2007 Richard Barry.
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18 This file is part of the FreeRTOS.org distribution.
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20 FreeRTOS.org is free software; you can redistribute it and/or modify
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21 it under the terms of the GNU General Public License as published by
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22 the Free Software Foundation; either version 2 of the License, or
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23 (at your option) any later version.
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25 FreeRTOS.org is distributed in the hope that it will be useful,
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26 but WITHOUT ANY WARRANTY; without even the implied warranty of
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27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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28 GNU General Public License for more details.
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30 You should have received a copy of the GNU General Public License
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31 along with FreeRTOS.org; if not, write to the Free Software
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32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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34 A special exception to the GPL can be applied should you wish to distribute
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35 a combined work that includes FreeRTOS.org, without being obliged to provide
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36 the source code for any proprietary components. See the licensing section
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37 of http://www.FreeRTOS.org for full details of how and when the exception
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40 ***************************************************************************
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41 See http://www.FreeRTOS.org for documentation, latest information, license
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42 and contact details. Please ensure to read the configuration and relevant
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43 port sections of the online documentation.
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45 Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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46 with commercial development and support options.
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47 ***************************************************************************
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51 /* Standard includes. */
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52 #include <sys/cpu.h>
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53 #include <sys/usart.h>
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56 /* Scheduler includes. */
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57 #include "FreeRTOS.h"
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60 /* AVR32 UC3 includes. */
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61 #include <avr32/io.h>
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63 #if( configTICK_USE_TC==1 )
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68 /* Constants required to setup the task context. */
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69 #define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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70 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )
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72 /* Each task maintains its own critical nesting variable. */
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73 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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74 volatile unsigned portLONG ulCriticalNesting = 9999UL;
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76 #if( configTICK_USE_TC==0 )
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77 static void prvScheduleNextTick( void );
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79 static void prvClearTcInt( void );
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82 /* Setup the timer to generate the tick interrupts. */
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83 static void prvSetupTimerInterrupt( void );
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85 /*-----------------------------------------------------------*/
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88 * Low-level initialization routine called during startup, before the main
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90 * This version comes in replacement to the default one provided by Newlib.
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91 * Newlib's _init_startup only calls init_exceptions, but Newlib's exception
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92 * vectors are not compatible with the SCALL management in the current FreeRTOS
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93 * port. More low-level initializations are besides added here.
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95 void _init_startup(void)
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97 /* Import the Exception Vector Base Address. */
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100 #if configHEAP_INIT
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101 extern void __heap_start__;
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102 extern void __heap_end__;
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103 portBASE_TYPE *pxMem;
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106 /* Load the Exception Vector Base Address in the corresponding system register. */
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107 Set_system_register( AVR32_EVBA, ( int ) &_evba );
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109 /* Enable exceptions. */
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110 ENABLE_ALL_EXCEPTIONS();
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112 /* Initialize interrupt handling. */
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113 INTC_init_interrupts();
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115 #if configHEAP_INIT
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117 /* Initialize the heap used by malloc. */
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118 for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
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120 *pxMem++ = 0xA5A5A5A5;
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125 /* Give the used CPU clock frequency to Newlib, so it can work properly. */
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126 set_cpu_hz( configCPU_CLOCK_HZ );
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128 /* Code section present if and only if the debug trace is activated. */
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131 static const gpio_map_t DBG_USART_GPIO_MAP =
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133 { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
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134 { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
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137 /* Initialize the USART used for the debug trace with the configured parameters. */
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138 set_usart_base( ( void * ) configDBG_USART );
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139 gpio_enable_module( DBG_USART_GPIO_MAP,
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140 sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
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141 usart_init( configDBG_USART_BAUDRATE );
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145 /*-----------------------------------------------------------*/
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148 * malloc, realloc and free are meant to be called through respectively
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149 * pvPortMalloc, pvPortRealloc and vPortFree.
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150 * The latter functions call the former ones from within sections where tasks
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151 * are suspended, so the latter functions are task-safe. __malloc_lock and
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152 * __malloc_unlock use the same mechanism to also keep the former functions
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153 * task-safe as they may be called directly from Newlib's functions.
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154 * However, all these functions are interrupt-unsafe and SHALL THEREFORE NOT BE
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155 * CALLED FROM WITHIN AN INTERRUPT, because __malloc_lock and __malloc_unlock do
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156 * not call portENTER_CRITICAL and portEXIT_CRITICAL in order not to disable
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157 * interrupts during memory allocation management as this may be a very time-
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158 * consuming process.
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162 * Lock routine called by Newlib on malloc / realloc / free entry to guarantee a
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163 * safe section as memory allocation management uses global data.
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164 * See the aforementioned details.
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166 void __malloc_lock(struct _reent *ptr)
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172 * Unlock routine called by Newlib on malloc / realloc / free exit to guarantee
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173 * a safe section as memory allocation management uses global data.
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174 * See the aforementioned details.
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176 void __malloc_unlock(struct _reent *ptr)
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180 /*-----------------------------------------------------------*/
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182 /* Added as there is no such function in FreeRTOS. */
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183 void *pvPortRealloc( void *pv, size_t xWantedSize )
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189 pvReturn = realloc( pv, xWantedSize );
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195 /*-----------------------------------------------------------*/
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197 /* The cooperative scheduler requires a normal IRQ service routine to
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198 simply increment the system tick. */
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199 /* The preemptive scheduler is defined as "naked" as the full context is saved
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200 on entry as part of the context switch. */
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201 __attribute__((__naked__)) static void vTick( void )
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203 /* Save the context of the interrupted task. */
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204 portSAVE_CONTEXT_OS_INT();
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206 #if( configTICK_USE_TC==1 )
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207 /* Clear the interrupt flag. */
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210 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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211 clock cycles from now. */
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212 prvScheduleNextTick();
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215 /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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216 calls in a critical section . */
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217 portENTER_CRITICAL();
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218 vTaskIncrementTick();
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219 portEXIT_CRITICAL();
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221 /* Restore the context of the "elected task". */
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222 portRESTORE_CONTEXT_OS_INT();
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224 /*-----------------------------------------------------------*/
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226 __attribute__((__naked__)) void SCALLYield( void )
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228 /* Save the context of the interrupted task. */
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229 portSAVE_CONTEXT_SCALL();
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230 vTaskSwitchContext();
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231 portRESTORE_CONTEXT_SCALL();
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233 /*-----------------------------------------------------------*/
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235 /* The code generated by the GCC compiler uses the stack in different ways at
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236 different optimisation levels. The interrupt flags can therefore not always
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237 be saved to the stack. Instead the critical section nesting level is stored
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238 in a variable, which is then saved as part of the stack context. */
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239 __attribute__((__noinline__)) void vPortEnterCritical( void )
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241 /* Disable interrupts */
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242 portDISABLE_INTERRUPTS();
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244 /* Now interrupts are disabled ulCriticalNesting can be accessed
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245 directly. Increment ulCriticalNesting to keep a count of how many times
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246 portENTER_CRITICAL() has been called. */
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247 ulCriticalNesting++;
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249 /*-----------------------------------------------------------*/
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251 __attribute__((__noinline__)) void vPortExitCritical( void )
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253 if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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255 ulCriticalNesting--;
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256 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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258 /* Enable all interrupt/exception. */
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259 portENABLE_INTERRUPTS();
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263 /*-----------------------------------------------------------*/
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266 * Initialise the stack of a task to look exactly as if a call to
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267 * portSAVE_CONTEXT had been called.
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269 * See header file for description.
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271 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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273 /* Setup the initial stack of the task. The stack is set exactly as
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274 expected by the portRESTORE_CONTEXT() macro. */
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276 /* When the task starts, it will expect to find the function parameter in R12. */
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278 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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279 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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280 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */
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281 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */
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282 *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */
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283 *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */
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284 *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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285 *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */
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286 *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */
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287 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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288 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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289 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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290 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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291 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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292 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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293 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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294 *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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296 return pxTopOfStack;
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298 /*-----------------------------------------------------------*/
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300 portBASE_TYPE xPortStartScheduler( void )
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302 /* Start the timer that generates the tick ISR. Interrupts are disabled
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304 prvSetupTimerInterrupt();
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306 /* Start the first task. */
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307 portRESTORE_CONTEXT();
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309 /* Should not get here! */
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312 /*-----------------------------------------------------------*/
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314 void vPortEndScheduler( void )
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316 /* It is unlikely that the AVR32 port will require this function as there
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317 is nothing to return to. */
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319 /*-----------------------------------------------------------*/
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321 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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322 clock cycles from now. */
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323 #if( configTICK_USE_TC==0 )
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324 static void prvScheduleFirstTick(void)
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326 unsigned long lCycles;
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328 lCycles = Get_system_register(AVR32_COUNT);
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329 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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330 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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331 // generation feature does not get disabled.
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336 Set_system_register(AVR32_COMPARE, lCycles);
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339 __attribute__((__noinline__)) static void prvScheduleNextTick(void)
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341 unsigned long lCycles, lCount;
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343 lCycles = Get_system_register(AVR32_COMPARE);
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344 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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345 // If lCycles ends up to be 0, make it 1 so that the COMPARE and exception
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346 // generation feature does not get disabled.
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351 lCount = Get_system_register(AVR32_COUNT);
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352 if( lCycles < lCount )
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353 { // We missed a tick, recover for the next.
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354 lCycles += (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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356 Set_system_register(AVR32_COMPARE, lCycles);
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359 __attribute__((__noinline__)) static void prvClearTcInt(void)
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361 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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364 /*-----------------------------------------------------------*/
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366 /* Setup the timer to generate the tick interrupts. */
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367 static void prvSetupTimerInterrupt(void)
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369 #if( configTICK_USE_TC==1 )
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371 volatile avr32_tc_t *tc = &AVR32_TC;
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373 // Options for waveform genration.
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374 tc_waveform_opt_t waveform_opt =
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376 .channel = configTICK_TC_CHANNEL, /* Channel selection. */
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378 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
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379 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
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380 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
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381 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
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383 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
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384 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
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385 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
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386 .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
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388 .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
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389 .enetrg = FALSE, /* External event trigger enable. */
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390 .eevt = 0, /* External event selection. */
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391 .eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
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392 .cpcdis = FALSE, /* Counter disable when RC compare. */
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393 .cpcstop = FALSE, /* Counter clock stopped with RC compare. */
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395 .burst = FALSE, /* Burst signal selection. */
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396 .clki = FALSE, /* Clock inversion. */
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397 .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
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400 tc_interrupt_t tc_interrupt =
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414 /* Disable all interrupt/exception. */
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415 portDISABLE_INTERRUPTS();
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417 /* Register the compare interrupt handler to the interrupt controller and
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418 enable the compare interrupt. */
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420 #if( configTICK_USE_TC==1 )
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422 INTC_register_interrupt(&vTick, configTICK_TC_IRQ, INT0);
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424 /* Initialize the timer/counter. */
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425 tc_init_waveform(tc, &waveform_opt);
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427 /* Set the compare triggers.
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428 Remember TC counter is 16-bits, so counting second is not possible!
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429 That's why we configure it to count ms. */
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430 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / configTICK_RATE_HZ );
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432 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
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434 /* Start the timer/counter. */
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435 tc_start(tc, configTICK_TC_CHANNEL);
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439 INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
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440 prvScheduleFirstTick();
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