2 FreeRTOS.org V5.3.1 - Copyright (C) 2003-2009 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify it
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7 under the terms of the GNU General Public License (version 2) as published
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8 by the Free Software Foundation and modified by the FreeRTOS exception.
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9 **NOTE** The exception to the GPL is included to allow you to distribute a
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10 combined work that includes FreeRTOS.org without being obliged to provide
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11 the source code for any proprietary components. Alternative commercial
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12 license and support terms are also available upon request. See the
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13 licensing section of http://www.FreeRTOS.org for full details.
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15 FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT
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16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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20 You should have received a copy of the GNU General Public License along
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21 with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59
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22 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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25 ***************************************************************************
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27 * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation *
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29 * This is a concise, step by step, 'hands on' guide that describes both *
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30 * general multitasking concepts and FreeRTOS specifics. It presents and *
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31 * explains numerous examples that are written using the FreeRTOS API. *
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32 * Full source code for all the examples is provided in an accompanying *
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35 ***************************************************************************
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39 Please ensure to read the configuration and relevant port sections of the
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40 online documentation.
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42 http://www.FreeRTOS.org - Documentation, latest information, license and
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45 http://www.SafeRTOS.com - A version that is certified for use in safety
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48 http://www.OpenRTOS.com - Commercial support, development, porting,
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49 licensing and training services.
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60 /*-----------------------------------------------------------
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61 * Port specific definitions.
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63 * The settings in this file configure FreeRTOS correctly for the
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64 * given hardware and compiler.
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66 * These settings should not be altered.
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67 *-----------------------------------------------------------
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70 /* Type definitions. */
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71 #define portCHAR char
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72 #define portFLOAT float
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73 #define portDOUBLE double
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74 #define portLONG long
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75 #define portSHORT short
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76 #define portSTACK_TYPE unsigned portCHAR
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77 #define portBASE_TYPE char
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79 #if( configUSE_16_BIT_TICKS == 1 )
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80 typedef unsigned portSHORT portTickType;
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81 #define portMAX_DELAY ( portTickType ) 0xffff
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83 typedef unsigned portLONG portTickType;
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84 #define portMAX_DELAY ( portTickType ) 0xffffffff
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86 /*-----------------------------------------------------------*/
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88 /* Hardware specifics. */
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89 #define portBYTE_ALIGNMENT 1
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90 #define portSTACK_GROWTH ( -1 )
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91 #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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92 #define portYIELD() __asm( "swi" );
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93 /*-----------------------------------------------------------*/
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95 /* Critical section handling. */
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96 #define portENABLE_INTERRUPTS() __asm( "cli" )
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97 #define portDISABLE_INTERRUPTS() __asm( "sei" )
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100 * Disable interrupts before incrementing the count of critical section nesting.
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101 * The nesting count is maintained so we know when interrupts should be
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102 * re-enabled. Once interrupts are disabled the nesting count can be accessed
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103 * directly. Each task maintains its own nesting count.
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105 #define portENTER_CRITICAL() \
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107 extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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109 portDISABLE_INTERRUPTS(); \
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110 uxCriticalNesting++; \
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114 * Interrupts are disabled so we can access the nesting count directly. If the
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115 * nesting is found to be 0 (no nesting) then we are leaving the critical
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116 * section and interrupts can be re-enabled.
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118 #define portEXIT_CRITICAL() \
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120 extern volatile unsigned portBASE_TYPE uxCriticalNesting; \
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122 uxCriticalNesting--; \
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123 if( uxCriticalNesting == 0 ) \
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125 portENABLE_INTERRUPTS(); \
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128 /*-----------------------------------------------------------*/
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130 /* Task utilities. */
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133 * These macros are very simple as the processor automatically saves and
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134 * restores its registers as interrupts are entered and exited. In
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135 * addition to the (automatically stacked) registers we also stack the
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136 * critical nesting count. Each task maintains its own critical nesting
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137 * count as it is legitimate for a task to yield from within a critical
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138 * section. If the banked memory model is being used then the PPAGE
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139 * register is also stored as part of the tasks context.
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142 #ifdef BANKED_MODEL
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144 * Load the stack pointer for the task, then pull the critical nesting
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145 * count and PPAGE register from the stack. The remains of the
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146 * context are restored by the RTI instruction.
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148 #define portRESTORE_CONTEXT() \
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151 .globl pxCurrentTCB ; void * \n\
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152 .globl uxCriticalNesting ; char \n\
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154 ldx pxCurrentTCB \n\
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155 lds 0,x ; Stack \n\
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157 movb 1,sp+,uxCriticalNesting \n\
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158 movb 1,sp+,0x30 ; PPAGE \n\
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163 * By the time this macro is called the processor has already stacked the
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164 * registers. Simply stack the nesting count and PPAGE value, then save
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165 * the task stack pointer.
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167 #define portSAVE_CONTEXT() \
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170 .globl pxCurrentTCB ; void * \n\
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171 .globl uxCriticalNesting ; char \n\
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173 movb 0x30, 1,-sp ; PPAGE \n\
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174 movb uxCriticalNesting, 1,-sp \n\
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176 ldx pxCurrentTCB \n\
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177 sts 0,x ; Stack \n\
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183 * These macros are as per the BANKED versions above, but without saving
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184 * and restoring the PPAGE register.
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187 #define portRESTORE_CONTEXT() \
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190 .globl pxCurrentTCB ; void * \n\
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191 .globl uxCriticalNesting ; char \n\
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193 ldx pxCurrentTCB \n\
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194 lds 0,x ; Stack \n\
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196 movb 1,sp+,uxCriticalNesting \n\
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200 #define portSAVE_CONTEXT() \
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203 .globl pxCurrentTCB ; void * \n\
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204 .globl uxCriticalNesting ; char \n\
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206 movb uxCriticalNesting, 1,-sp \n\
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208 ldx pxCurrentTCB \n\
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209 sts 0,x ; Stack \n\
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215 * Utility macros to save/restore correct software registers for GCC. This is
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216 * useful when GCC does not generate appropriate ISR head/tail code.
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218 #define portISR_HEAD() \
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221 movw _.frame, 2,-sp \n\
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222 movw _.tmp, 2,-sp \n\
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223 movw _.z, 2,-sp \n\
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224 movw _.xy, 2,-sp \n\
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225 ;movw _.d2, 2,-sp \n\
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226 ;movw _.d1, 2,-sp \n\
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230 #define portISR_TAIL() \
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233 movw 2,sp+, _.xy \n\
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234 movw 2,sp+, _.z \n\
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235 movw 2,sp+, _.tmp \n\
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236 movw 2,sp+, _.frame \n\
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237 ;movw 2,sp+, _.d1 \n\
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238 ;movw 2,sp+, _.d2 \n\
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244 * Utility macro to call macros above in correct order in order to perform a
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245 * task switch from within a standard ISR. This macro can only be used if
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246 * the ISR does not use any local (stack) variables. If the ISR uses stack
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247 * variables portYIELD() should be used in it's place.
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250 #define portTASK_SWITCH_FROM_ISR() \
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251 portSAVE_CONTEXT(); \
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252 vTaskSwitchContext(); \
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253 portRESTORE_CONTEXT();
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256 /* Task function macros as described on the FreeRTOS.org WEB site. */
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257 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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258 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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264 #endif /* PORTMACRO_H */
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