git.sur5r.net Git - freertos/blob - Source/portable/GCC/RX600/port_asm.asm

   1 /*\r
   2     FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.\r
   3 \r
   4     ***************************************************************************\r
   5     *                                                                         *\r
   6     * If you are:                                                             *\r
   7     *                                                                         *\r
   8     *    + New to FreeRTOS,                                                   *\r
   9     *    + Wanting to learn FreeRTOS or multitasking in general quickly       *\r
  10     *    + Looking for basic training,                                        *\r
  11     *    + Wanting to improve your FreeRTOS skills and productivity           *\r
  12     *                                                                         *\r
  13     * then take a look at the FreeRTOS eBook                                  *\r
  14     *                                                                         *\r
  15     *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *\r
  16     *                  http://www.FreeRTOS.org/Documentation                  *\r
  17     *                                                                         *\r
  18     * A pdf reference manual is also available.  Both are usually delivered   *\r
  19     * to your inbox within 20 minutes to two hours when purchased between 8am *\r
  20     * and 8pm GMT (although please allow up to 24 hours in case of            *\r
  21     * exceptional circumstances).  Thank you for your support!                *\r
  22     *                                                                         *\r
  23     ***************************************************************************\r
  24 \r
  25     This file is part of the FreeRTOS distribution.\r
  26 \r
  27     FreeRTOS is free software; you can redistribute it and/or modify it under\r
  28     the terms of the GNU General Public License (version 2) as published by the\r
  29     Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
  30     ***NOTE*** The exception to the GPL is included to allow you to distribute\r
  31     a combined work that includes FreeRTOS without being obliged to provide the\r
  32     source code for proprietary components outside of the FreeRTOS kernel.\r
  33     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT\r
  34     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  35     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
  36     more details. You should have received a copy of the GNU General Public \r
  37     License and the FreeRTOS license exception along with FreeRTOS; if not it \r
  38     can be viewed here: http://www.freertos.org/a00114.html and also obtained \r
  39     by writing to Richard Barry, contact details for whom are available on the\r
  40     FreeRTOS WEB site.\r
  41 \r
  42     1 tab == 4 spaces!\r
  43 \r
  44     http://www.FreeRTOS.org - Documentation, latest information, license and\r
  45     contact details.\r
  46 \r
  47     http://www.SafeRTOS.com - A version that is certified for use in safety\r
  48     critical systems.\r
  49 \r
  50     http://www.OpenRTOS.com - Commercial support, development, porting,\r
  51     licensing and training services.\r
  52 */\r
  53 \r
  54         .list\r
  55         .section .text\r
  56         .global _prvStartFirstTask\r
  57         .global _vSoftwareInterruptISR\r
  58         .global _ulPortGetIPL\r
  59         .global _vPortSetIPL\r
  60         \r
  61         .extern _pxCurrentTCB\r
  62 \r
  63         .align 4\r
  64         \r
  65 _prvStartFirstTask:\r
  66 \r
  67                 /* When starting the scheduler there is nothing that needs moving to the\r
  68                 interrupt stack because the function is not called from an interrupt.\r
  69                 Just ensure the current stack is the user stack. */\r
  70                 SETPSW  U                                               \r
  71 \r
  72                 /* Obtain the location of the stack associated with which ever task \r
  73                 pxCurrentTCB is currently pointing to. */\r
  74                 MOV.L   #_pxCurrentTCB, R15             \r
  75                 MOV.L   [R15], R15                              \r
  76                 MOV.L   [R15], R0                               \r
  77 \r
  78                 /* Restore the registers from the stack of the task pointed to by \r
  79                 pxCurrentTCB. */\r
  80             POP         R15                                     \r
  81                 \r
  82                 /* Accumulator low 32 bits. */\r
  83             MVTACLO     R15                             \r
  84             POP         R15                                     \r
  85                 \r
  86                 /* Accumulator high 32 bits. */\r
  87             MVTACHI     R15                             \r
  88             POP         R15                                     \r
  89                 \r
  90                 /* Floating point status word. */\r
  91             MVTC                R15, FPSW                       \r
  92                 \r
  93                 /* R1 to R15 - R0 is not included as it is the SP. */\r
  94             POPM                R1-R15                          \r
  95                 \r
  96                 /* This pops the remaining registers. */\r
  97             RTE                                                 \r
  98             NOP                                                 \r
  99             NOP                                                 \r
 100 \r
 101 /*-----------------------------------------------------------*/\r
 102 \r
 103                 .align 4\r
 104 _vSoftwareInterruptISR:\r
 105 \r
 106                 /* Re-enable interrupts. */\r
 107                 SETPSW          I\r
 108 \r
 109                 /* Move the data that was automatically pushed onto the interrupt stack when\r
 110                 the interrupt occurred from the interrupt stack to the user stack.  \r
 111         \r
 112                 R15 is saved before it is clobbered. */\r
 113                 PUSH.L          R15                                                     \r
 114         \r
 115                 /* Read the user stack pointer. */\r
 116                 MVFC            USP, R15                                        \r
 117         \r
 118                 /* Move the address down to the data being moved. */\r
 119                 SUB             #12, R15                                        \r
 120                 MVTC            R15, USP                                        \r
 121         \r
 122                 /* Copy the data across, R15, then PC, then PSW. */\r
 123                 MOV.L           [ R0 ], [ R15 ]                         \r
 124                 MOV.L           4[ R0 ], 4[ R15 ]                       \r
 125                 MOV.L           8[ R0 ], 8[ R15 ]                       \r
 126 \r
 127                 /* Move the interrupt stack pointer to its new correct position. */\r
 128                 ADD             #12, R0                                         \r
 129         \r
 130                 /* All the rest of the registers are saved directly to the user stack. */\r
 131                 SETPSW          U                                                       \r
 132 \r
 133                 /* Save the rest of the general registers (R15 has been saved already). */\r
 134                 PUSHM           R1-R14                                          \r
 135         \r
 136                 /* Save the FPSW and accumulator. */\r
 137                 MVFC            FPSW, R15                                       \r
 138                 PUSH.L          R15                                                     \r
 139                 MVFACHI         R15                                                     \r
 140                 PUSH.L          R15                                                     \r
 141                 \r
 142                 /* Middle word. */\r
 143                 MVFACMI R15                                                     \r
 144                 \r
 145                 /* Shifted left as it is restored to the low order word. */\r
 146                 SHLL            #16, R15                                        \r
 147                 PUSH.L          R15                                                     \r
 148 \r
 149                 /* Save the stack pointer to the TCB. */\r
 150                 MOV.L           #_pxCurrentTCB, R15                     \r
 151                 MOV.L           [ R15 ], R15                            \r
 152                 MOV.L           R0, [ R15 ]                                     \r
 153                         \r
 154                 /* Ensure the interrupt mask is set to the syscall priority while the kernel\r
 155                 structures are being accessed. */\r
 156                 MVTIPL          #4                                                      \r
 157 \r
 158                 /* Select the next task to run. */\r
 159                 BSR.A           _vTaskSwitchContext                     \r
 160 \r
 161                 /* Reset the interrupt mask as no more data structure access is required. */\r
 162                 MVTIPL          #1                                                      \r
 163 \r
 164                 /* Load the stack pointer of the task that is now selected as the Running\r
 165                 state task from its TCB. */\r
 166                 MOV.L           #_pxCurrentTCB,R15                      \r
 167                 MOV.L           [ R15 ], R15                            \r
 168                 MOV.L           [ R15 ], R0                                     \r
 169 \r
 170                 /* Restore the context of the new task.  The PSW (Program Status Word) and\r
 171                 PC will be popped by the RTE instruction. */\r
 172                 POP                     R15                                                     \r
 173                 MVTACLO         R15                                                     \r
 174                 POP                     R15                                                     \r
 175                 MVTACHI         R15                                                     \r
 176                 POP                     R15                                                     \r
 177                 MVTC            R15, FPSW                                       \r
 178                 POPM            R1-R15                                          \r
 179                 RTE                                                                     \r
 180                 NOP                                                                     \r
 181                 NOP                                                                       \r
 182                 \r
 183                 /*:: i(configMAX_SYSCALL_INTERRUPT_PRIORITY), i(configKERNEL_INTERRUPT_PRIORITY)*/\r
 184 /*-----------------------------------------------------------*/\r
 185 \r
 186                 .align 4\r
 187                 \r
 188 _ulPortGetIPL:\r
 189 \r
 190                 MVFC    PSW, R1\r
 191                 SHLR    #24, R1\r
 192                 RTS                                       \r
 193 /*-----------------------------------------------------------*/\r
 194 \r
 195                 .align 4\r
 196                 \r
 197 _vPortSetIPL:\r
 198 \r
 199                 MVFC    PSW, R5\r
 200                 SHLL    #24, R1                 \r
 201                 AND             #-0F000001H, R5 \r
 202                 OR              R1, R5                  \r
 203                 MVTC    R5, PSW                 \r
 204                 RTS                                       \r
 205 \r
 206                 .end\r