2 FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry.
\r
4 This file is part of the FreeRTOS.org distribution.
\r
6 FreeRTOS.org is free software; you can redistribute it and/or modify
\r
7 it under the terms of the GNU General Public License as published by
\r
8 the Free Software Foundation; either version 2 of the License, or
\r
9 (at your option) any later version.
\r
11 FreeRTOS.org is distributed in the hope that it will be useful,
\r
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
\r
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
\r
14 GNU General Public License for more details.
\r
16 You should have received a copy of the GNU General Public License
\r
17 along with FreeRTOS.org; if not, write to the Free Software
\r
18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
\r
20 A special exception to the GPL can be applied should you wish to distribute
\r
21 a combined work that includes FreeRTOS.org, without being obliged to provide
\r
22 the source code for any proprietary components. See the licensing section
\r
23 of http://www.FreeRTOS.org for full details of how and when the exception
\r
26 ***************************************************************************
\r
28 Please ensure to read the configuration and relevant port sections of the
\r
29 online documentation.
\r
31 +++ http://www.FreeRTOS.org +++
\r
32 Documentation, latest information, license and contact details.
\r
34 +++ http://www.SafeRTOS.com +++
\r
35 A version that is certified for use in safety critical systems.
\r
37 +++ http://www.OpenRTOS.com +++
\r
38 Commercial support, development, porting, licensing and training services.
\r
40 ***************************************************************************
\r
43 /*-----------------------------------------------------------
\r
44 * Implementation of functions defined in portable.h for the ST STR75x ARM7
\r
46 *----------------------------------------------------------*/
\r
48 /* Library includes. */
\r
50 #include "75x_eic.h"
\r
52 /* Scheduler includes. */
\r
53 #include "FreeRTOS.h"
\r
56 /* Constants required to setup the initial stack. */
\r
57 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
\r
58 #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )
\r
59 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
\r
61 /* Constants required to handle critical sections. */
\r
62 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
\r
64 /* Prescale used on the timer clock when calculating the tick period. */
\r
65 #define portPRESCALE 20
\r
68 /*-----------------------------------------------------------*/
\r
70 /* Setup the TB to generate the tick interrupts. */
\r
71 static void prvSetupTimerInterrupt( void );
\r
73 /*-----------------------------------------------------------*/
\r
76 * Initialise the stack of a task to look exactly as if a call to
\r
77 * portSAVE_CONTEXT had been called.
\r
79 * See header file for description.
\r
81 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
\r
83 portSTACK_TYPE *pxOriginalTOS;
\r
85 pxOriginalTOS = pxTopOfStack;
\r
87 /* Setup the initial stack of the task. The stack is set exactly as
\r
88 expected by the portRESTORE_CONTEXT() macro. */
\r
90 /* First on the stack is the return address - which in this case is the
\r
91 start of the task. The offset is added to make the return address appear
\r
92 as it would within an IRQ ISR. */
\r
93 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
\r
96 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
\r
98 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
\r
100 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
\r
102 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
\r
104 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
\r
106 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
\r
108 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
\r
110 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
\r
112 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
\r
114 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
\r
116 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
\r
118 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
\r
120 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
\r
122 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
\r
125 /* When the task starts is will expect to find the function parameter in
\r
127 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
\r
130 /* The status register is set for system mode, with interrupts enabled. */
\r
131 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
\r
133 #ifdef THUMB_INTERWORK
\r
135 /* We want the task to start in thumb mode. */
\r
136 *pxTopOfStack |= portTHUMB_MODE_BIT;
\r
142 /* Interrupt flags cannot always be stored on the stack and will
\r
143 instead be stored in a variable, which is then saved as part of the
\r
145 *pxTopOfStack = portNO_CRITICAL_NESTING;
\r
147 return pxTopOfStack;
\r
149 /*-----------------------------------------------------------*/
\r
151 portBASE_TYPE xPortStartScheduler( void )
\r
153 extern void vPortISRStartFirstTask( void );
\r
155 /* Start the timer that generates the tick ISR. Interrupts are disabled
\r
157 prvSetupTimerInterrupt();
\r
159 /* Start the first task. */
\r
160 vPortISRStartFirstTask();
\r
162 /* Should not get here! */
\r
165 /*-----------------------------------------------------------*/
\r
167 void vPortEndScheduler( void )
\r
169 /* It is unlikely that the ARM port will require this function as there
\r
170 is nothing to return to. */
\r
172 /*-----------------------------------------------------------*/
\r
174 static void prvSetupTimerInterrupt( void )
\r
176 EIC_IRQInitTypeDef EIC_IRQInitStructure;
\r
177 TB_InitTypeDef TB_InitStructure;
\r
179 /* Setup the EIC for the TB. */
\r
180 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
\r
181 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
\r
182 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
\r
183 EIC_IRQInit(&EIC_IRQInitStructure);
\r
185 /* Setup the TB for the generation of the tick interrupt. */
\r
186 TB_InitStructure.TB_Mode = TB_Mode_Timing;
\r
187 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
\r
188 TB_InitStructure.TB_Prescaler = portPRESCALE;
\r
189 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / ( portPRESCALE + 1 ) ) / configTICK_RATE_HZ ) + 1;
\r
190 TB_Init(&TB_InitStructure);
\r
192 /* Enable TB Update interrupt */
\r
193 TB_ITConfig(TB_IT_Update, ENABLE);
\r
195 /* Clear TB Update interrupt pending bit */
\r
196 TB_ClearITPendingBit(TB_IT_Update);
\r
201 /*-----------------------------------------------------------*/
\r