2 FreeRTOS V7.0.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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5 ***************************************************************************
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7 * FreeRTOS tutorial books are available in pdf and paperback. *
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8 * Complete, revised, and edited pdf reference manuals are also *
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11 * Purchasing FreeRTOS documentation will not only help you, by *
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12 * ensuring you get running as quickly as possible and with an *
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13 * in-depth knowledge of how to use FreeRTOS, it will also help *
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14 * the FreeRTOS project to continue with its mission of providing *
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15 * professional grade, cross platform, de facto standard solutions *
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16 * for microcontrollers - completely free of charge! *
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18 * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
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20 * Thank you for using FreeRTOS, and thank you for your support! *
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22 ***************************************************************************
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25 This file is part of the FreeRTOS distribution.
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27 FreeRTOS is free software; you can redistribute it and/or modify it under
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28 the terms of the GNU General Public License (version 2) as published by the
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29 Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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30 >>>NOTE<<< The modification to the GPL is included to allow you to
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31 distribute a combined work that includes FreeRTOS without being obliged to
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32 provide the source code for proprietary components outside of the FreeRTOS
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33 kernel. FreeRTOS is distributed in the hope that it will be useful, but
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34 WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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35 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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36 more details. You should have received a copy of the GNU General Public
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37 License and the FreeRTOS license exception along with FreeRTOS; if not it
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38 can be viewed here: http://www.freertos.org/a00114.html and also obtained
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39 by writing to Richard Barry, contact details for whom are available on the
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44 http://www.FreeRTOS.org - Documentation, latest information, license and
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47 http://www.SafeRTOS.com - A version that is certified for use in safety
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50 http://www.OpenRTOS.com - Commercial support, development, porting,
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51 licensing and training services.
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55 /*-----------------------------------------------------------
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56 * Components that can be compiled to either ARM or THUMB mode are
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57 * contained in port.c The ISR routines, which can only be compiled
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58 * to ARM mode, are contained in this file.
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59 *----------------------------------------------------------*/
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64 /* Scheduler includes. */
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65 #include "FreeRTOS.h"
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68 /* Constants required to handle critical sections. */
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69 #define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )
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71 volatile unsigned long ulCriticalNesting = 9999UL;
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73 /*-----------------------------------------------------------*/
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76 * The scheduler can only be started from ARM mode, hence the inclusion of this
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79 void vPortISRStartFirstTask( void );
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80 /*-----------------------------------------------------------*/
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82 void vPortISRStartFirstTask( void )
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84 /* Simply start the scheduler. This is included here as it can only be
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85 called from ARM mode. */
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87 "LDR R0, =pxCurrentTCB \n\t" \
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88 "LDR R0, [R0] \n\t" \
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89 "LDR LR, [R0] \n\t" \
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91 /* The critical nesting depth is the first item on the stack. */ \
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92 /* Load it into the ulCriticalNesting variable. */ \
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93 "LDR R0, =ulCriticalNesting \n\t" \
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94 "LDMFD LR!, {R1} \n\t" \
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95 "STR R1, [R0] \n\t" \
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97 /* Get the SPSR from the stack. */ \
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98 "LDMFD LR!, {R0} \n\t" \
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99 "MSR SPSR, R0 \n\t" \
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101 /* Restore all system mode registers for the task. */ \
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102 "LDMFD LR, {R0-R14}^ \n\t" \
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105 /* Restore the return address. */ \
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106 "LDR LR, [LR, #+60] \n\t" \
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108 /* And return - correcting the offset in the LR to obtain the */ \
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109 /* correct address. */ \
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110 "SUBS PC, LR, #4 \n\t" \
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113 /*-----------------------------------------------------------*/
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115 void vPortTickISR( void )
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117 /* Increment the RTOS tick count, then look for the highest priority
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118 task that is ready to run. */
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119 vTaskIncrementTick();
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121 #if configUSE_PREEMPTION == 1
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122 vTaskSwitchContext();
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125 /* Ready for the next interrupt. */
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126 TB_ClearITPendingBit( TB_IT_Update );
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129 /*-----------------------------------------------------------*/
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132 * The interrupt management utilities can only be called from ARM mode. When
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133 * THUMB_INTERWORK is defined the utilities are defined as functions here to
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134 * ensure a switch to ARM mode. When THUMB_INTERWORK is not defined then
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135 * the utilities are defined as macros in portmacro.h - as per other ports.
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137 #ifdef THUMB_INTERWORK
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139 void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked));
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140 void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked));
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142 void vPortDisableInterruptsFromThumb( void )
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145 "STMDB SP!, {R0} \n\t" /* Push R0. */
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146 "MRS R0, CPSR \n\t" /* Get CPSR. */
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147 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
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148 "MSR CPSR, R0 \n\t" /* Write back modified value. */
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149 "LDMIA SP!, {R0} \n\t" /* Pop R0. */
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150 "BX R14" ); /* Return back to thumb. */
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153 void vPortEnableInterruptsFromThumb( void )
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156 "STMDB SP!, {R0} \n\t" /* Push R0. */
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157 "MRS R0, CPSR \n\t" /* Get CPSR. */
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158 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
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159 "MSR CPSR, R0 \n\t" /* Write back modified value. */
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160 "LDMIA SP!, {R0} \n\t" /* Pop R0. */
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161 "BX R14" ); /* Return back to thumb. */
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164 #endif /* THUMB_INTERWORK */
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165 /*-----------------------------------------------------------*/
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167 void vPortEnterCritical( void )
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169 /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
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171 "STMDB SP!, {R0} \n\t" /* Push R0. */
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172 "MRS R0, CPSR \n\t" /* Get CPSR. */
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173 "ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */
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174 "MSR CPSR, R0 \n\t" /* Write back modified value. */
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175 "LDMIA SP!, {R0}" ); /* Pop R0. */
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177 /* Now interrupts are disabled ulCriticalNesting can be accessed
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178 directly. Increment ulCriticalNesting to keep a count of how many times
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179 portENTER_CRITICAL() has been called. */
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180 ulCriticalNesting++;
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182 /*-----------------------------------------------------------*/
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184 void vPortExitCritical( void )
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186 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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188 /* Decrement the nesting count as we are leaving a critical section. */
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189 ulCriticalNesting--;
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191 /* If the nesting level has reached zero then interrupts should be
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193 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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195 /* Enable interrupts as per portEXIT_CRITICAL(). */
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197 "STMDB SP!, {R0} \n\t" /* Push R0. */
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198 "MRS R0, CPSR \n\t" /* Get CPSR. */
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199 "BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */
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200 "MSR CPSR, R0 \n\t" /* Write back modified value. */
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201 "LDMIA SP!, {R0}" ); /* Pop R0. */
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