2 FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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31 Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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32 with commercial development and support options.
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33 ***************************************************************************
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37 /*-----------------------------------------------------------
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38 * Implementation of functions defined in portable.h for the ARM CM3 port.
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39 *----------------------------------------------------------*/
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41 /* Scheduler includes. */
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42 #include "FreeRTOS.h"
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45 /* Constants required to manipulate the NVIC. */
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46 #define portNVIC_SYSTICK_CTRL ( ( volatile unsigned portLONG *) 0xe000e010 )
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47 #define portNVIC_SYSTICK_LOAD ( ( volatile unsigned portLONG *) 0xe000e014 )
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48 #define portNVIC_INT_CTRL ( ( volatile unsigned portLONG *) 0xe000ed04 )
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49 #define portNVIC_SYSPRI2 ( ( volatile unsigned portLONG *) 0xe000ed20 )
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50 #define portNVIC_SYSPRI1 ( ( volatile unsigned portLONG *) 0xe000ed1c )
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51 #define portNVIC_SYSTICK_CLK 0x00000004
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52 #define portNVIC_SYSTICK_INT 0x00000002
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53 #define portNVIC_SYSTICK_ENABLE 0x00000001
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54 #define portNVIC_PENDSVSET 0x10000000
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55 #define portNVIC_PENDSV_PRI 0x00ff0000
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56 #define portNVIC_SVCALL_PRI 0xff000000
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57 #define portNVIC_SYSTICK_PRI 0xff000000
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59 /* Constants required to set up the initial stack. */
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60 #define portINITIAL_XPSR ( 0x01000000 )
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62 /* Each task maintains its own interrupt status in the critical nesting
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64 unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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67 * Setup the timer to generate the tick interrupts.
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69 static void prvSetupTimerInterrupt( void );
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72 * Set the MSP/PSP to a known value.
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74 extern void vSetMSP( unsigned long ulValue );
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75 extern void vSetPSP( unsigned long ulValue );
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77 /*-----------------------------------------------------------*/
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80 * See header file for description.
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82 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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84 /* Simulate the stack frame as it would be created by a context switch
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86 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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88 *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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90 *pxTopOfStack = 0xfffffffd; /* LR */
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91 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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92 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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93 pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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94 *pxTopOfStack = 0x00000000; /* uxCriticalNesting. */
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96 return pxTopOfStack;
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98 /*-----------------------------------------------------------*/
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101 * See header file for description.
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103 portBASE_TYPE xPortStartScheduler( void )
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105 /* Make PendSV, CallSV and SysTick the lowest priority interrupts. */
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106 *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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107 *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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109 /* Start the timer that generates the tick ISR. Interrupts are disabled
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111 prvSetupTimerInterrupt();
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113 /* Start the first task. */
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115 vSetMSP( *((unsigned portLONG *) 0 ) );
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116 *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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118 /* Enable interrupts */
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119 portENABLE_INTERRUPTS();
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121 /* Should not get here! */
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124 /*-----------------------------------------------------------*/
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126 void vPortEndScheduler( void )
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128 /* It is unlikely that the CM3 port will require this function as there
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129 is nothing to return to. */
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131 /*-----------------------------------------------------------*/
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133 void vPortYieldFromISR( void )
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135 /* Set a PendSV to request a context switch. */
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136 *(portNVIC_INT_CTRL) |= portNVIC_PENDSVSET;
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138 /* This function is also called in response to a Yield(), so we want
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139 the yield to occur immediately. */
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140 portENABLE_INTERRUPTS();
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142 /*-----------------------------------------------------------*/
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144 void vPortEnterCritical( void )
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146 portDISABLE_INTERRUPTS();
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147 uxCriticalNesting++;
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149 /*-----------------------------------------------------------*/
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151 void vPortExitCritical( void )
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153 uxCriticalNesting--;
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154 if( uxCriticalNesting == 0 )
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156 portENABLE_INTERRUPTS();
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159 /*-----------------------------------------------------------*/
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163 * Setup the systick timer to generate the tick interrupts at the required
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166 void prvSetupTimerInterrupt( void )
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168 /* Configure SysTick to interrupt at the requested rate. */
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169 *(portNVIC_SYSTICK_LOAD) = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
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170 *(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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