1 /******************************************************************************
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2 * Exception and interrupt vectors.
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4 * This file has been built from the Newlib exception.S. It maps all events
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5 * supported by a UC3.
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7 * - Compiler: IAR EWAVR32
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8 * - Supported devices: All AVR32A devices with an INTC module can be used.
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11 * - author Atmel Corporation: http://www.atmel.com \n
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12 * Support email: avr32@atmel.com
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14 ******************************************************************************/
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16 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
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18 * Redistribution and use in source and binary forms, with or without
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19 * modification, are permitted provided that the following conditions are met:
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21 * 1. Redistributions of source code must retain the above copyright notice,
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22 * this list of conditions and the following disclaimer.
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24 * 2. Redistributions in binary form must reproduce the above copyright notice,
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25 * this list of conditions and the following disclaimer in the documentation
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26 * and/or other materials provided with the distribution.
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28 * 3. The name of ATMEL may not be used to endorse or promote products derived
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29 * from this software without specific prior written permission.
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31 * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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32 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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33 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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34 * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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35 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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40 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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44 #include <avr32/iouc3a0512.h>
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45 #include <avr32/uc3a0512.h>
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49 // Start of Exception Vector Table.
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51 // EVBA must be aligned with a power of two strictly greater than the EVBA-
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52 // relative offset of the last vector.
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53 COMMON EVTAB:CODE:ROOT(9)
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56 // Force EVBA initialization.
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67 // Unrecoverable Exception.
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68 _handle_Unrecoverable_Exception:
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72 // TLB Multiple Hit: UNUSED IN AVR32A.
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73 _handle_TLB_Multiple_Hit:
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77 // Bus Error Data Fetch.
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78 _handle_Bus_Error_Data_Fetch:
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82 // Bus Error Instruction Fetch.
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83 _handle_Bus_Error_Instruction_Fetch:
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92 // Instruction Address.
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93 _handle_Instruction_Address:
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98 _handle_ITLB_Protection:
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103 _handle_Breakpoint:
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108 _handle_Illegal_Opcode:
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112 // Unimplemented Instruction.
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113 _handle_Unimplemented_Instruction:
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117 // Privilege Violation.
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118 _handle_Privilege_Violation:
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122 // Floating-Point: UNUSED IN AVR32A.
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123 _handle_Floating_Point:
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127 // Coprocessor Absent: UNUSED IN AVR32A.
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128 _handle_Coprocessor_Absent:
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132 // Data Address (Read).
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133 _handle_Data_Address_Read:
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137 // Data Address (Write).
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138 _handle_Data_Address_Write:
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142 // DTLB Protection (Read).
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143 _handle_DTLB_Protection_Read:
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147 // DTLB Protection (Write).
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148 _handle_DTLB_Protection_Write:
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152 // DTLB Modified: UNUSED IN AVR32A.
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153 _handle_DTLB_Modified:
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157 // ITLB Miss: UNUSED IN AVR32A.
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162 // DTLB Miss (Read): UNUSED IN AVR32A.
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163 _handle_DTLB_Miss_Read:
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167 // DTLB Miss (Write): UNUSED IN AVR32A.
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168 _handle_DTLB_Miss_Write:
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172 // Supervisor Call.
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173 _handle_Supervisor_Call:
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174 lddpc pc, __SCALLYield
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177 // Interrupt support.
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178 // The interrupt controller must provide the offset address relative to EVBA.
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180 // All interrupts call a C function named _get_interrupt_handler.
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181 // This function will read group and interrupt line number to then return in
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182 // R12 a pointer to a user-provided interrupt handler.
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187 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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188 // CPU upon interrupt entry.
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189 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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191 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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194 lddsp r12, sp[0 * 4]
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195 stdsp sp[6 * 4], r12
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196 lddsp r12, sp[1 * 4]
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197 stdsp sp[7 * 4], r12
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198 lddsp r12, sp[3 * 4]
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203 mov r12, 0 // Pass the int_lev parameter to the _get_interrupt_handler function.
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204 mcall __get_interrupt_handler
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205 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
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206 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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207 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
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210 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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211 // CPU upon interrupt entry.
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212 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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214 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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217 lddsp r12, sp[0 * 4]
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218 stdsp sp[6 * 4], r12
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219 lddsp r12, sp[1 * 4]
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220 stdsp sp[7 * 4], r12
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221 lddsp r12, sp[3 * 4]
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226 mov r12, 1 // Pass the int_lev parameter to the _get_interrupt_handler function.
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227 mcall __get_interrupt_handler
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228 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
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229 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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230 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
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233 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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234 // CPU upon interrupt entry.
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235 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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237 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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240 lddsp r12, sp[0 * 4]
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241 stdsp sp[6 * 4], r12
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242 lddsp r12, sp[1 * 4]
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243 stdsp sp[7 * 4], r12
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244 lddsp r12, sp[3 * 4]
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249 mov r12, 2 // Pass the int_lev parameter to the _get_interrupt_handler function.
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250 mcall __get_interrupt_handler
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251 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
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252 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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253 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
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256 // R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
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257 // CPU upon interrupt entry.
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258 #if 1 // B1832: interrupt stack changed to exception stack if exception is detected.
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260 bfextu r12, r12, AVR32_SR_M0_OFFSET, AVR32_SR_M0_SIZE + AVR32_SR_M1_SIZE + AVR32_SR_M2_SIZE
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263 lddsp r12, sp[0 * 4]
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264 stdsp sp[6 * 4], r12
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265 lddsp r12, sp[1 * 4]
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266 stdsp sp[7 * 4], r12
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267 lddsp r12, sp[3 * 4]
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272 mov r12, 3 // Pass the int_lev parameter to the _get_interrupt_handler function.
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273 mcall __get_interrupt_handler
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274 cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
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275 movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
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276 rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
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279 // Constant data area.
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285 EXTERN _get_interrupt_handler
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288 __get_interrupt_handler:
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289 DC32 _get_interrupt_handler
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291 // Values to store in the interrupt priority registers for the various interrupt priority levels.
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292 // The interrupt priority registers contain the interrupt priority level and
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293 // the EVBA-relative interrupt vector offset.
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296 DC32 (INT0 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int0 - _evba),\
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297 (INT1 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int1 - _evba),\
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298 (INT2 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int2 - _evba),\
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299 (INT3 << AVR32_INTC_IPR0_INTLEV_OFFSET) | (_int3 - _evba)
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