1 /*This file has been prepared for Doxygen automatic documentation generation.*/
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2 /*! \file *********************************************************************
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4 * \brief FreeRTOS port source for AVR32 UC3.
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6 * - Compiler: IAR EWAVR32
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7 * - Supported devices: All AVR32 devices can be used.
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10 * \author Atmel Corporation: http://www.atmel.com \n
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11 * Support email: avr32@atmel.com
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13 *****************************************************************************/
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16 FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
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18 This file is part of the FreeRTOS.org distribution.
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20 FreeRTOS.org is free software; you can redistribute it and/or modify
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21 it under the terms of the GNU General Public License as published by
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22 the Free Software Foundation; either version 2 of the License, or
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23 (at your option) any later version.
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25 FreeRTOS.org is distributed in the hope that it will be useful,
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26 but WITHOUT ANY WARRANTY; without even the implied warranty of
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27 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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28 GNU General Public License for more details.
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30 You should have received a copy of the GNU General Public License
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31 along with FreeRTOS.org; if not, write to the Free Software
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32 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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34 A special exception to the GPL can be applied should you wish to distribute
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35 a combined work that includes FreeRTOS.org, without being obliged to provide
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36 the source code for any proprietary components. See the licensing section
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37 of http://www.FreeRTOS.org for full details of how and when the exception
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40 ***************************************************************************
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41 See http://www.FreeRTOS.org for documentation, latest information, license
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42 and contact details. Please ensure to read the configuration and relevant
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43 port sections of the online documentation.
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44 ***************************************************************************
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48 /* Scheduler includes. */
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49 #include "FreeRTOS.h"
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51 /* Get rid of inline in task.h. */
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54 /* AVR32 UC3 includes. */
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55 #include <avr32/iouc3a0512.h>
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56 #include <intrinsics.h>
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63 #if( configTICK_USE_TC==1 )
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68 /* Constants required to setup the task context. */
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69 #define portINITIAL_SR ( ( portSTACK_TYPE ) 0x00400000 ) /* AVR32 : [M2:M0]=001 I1M=0 I0M=0, GM=0 */
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70 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0 )
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72 /* Each task maintains its own critical nesting variable. */
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73 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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74 volatile unsigned portLONG ulCriticalNesting = 9999UL;
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76 #if( configTICK_USE_TC==0 )
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77 static void prvScheduleNextTick( void );
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79 /*-----------------------------------------------------------*/
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82 * Low-level initialization routine called during startup, before the main
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85 int __low_level_init(void)
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88 #pragma segment = "HEAP"
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89 portBASE_TYPE *pxMem;
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92 /* Enable exceptions. */
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93 ENABLE_ALL_EXCEPTIONS();
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95 /* Initialize interrupt handling. */
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96 INTC_init_interrupts();
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100 /* Initialize the heap used by malloc. */
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101 for( pxMem = __segment_begin( "HEAP" ); pxMem < ( portBASE_TYPE * ) __segment_end( "HEAP" ); )
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103 *pxMem++ = 0xA5A5A5A5;
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108 /* Code section present if and only if the debug trace is activated. */
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111 static const usart_options_t usart_opt =
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113 .baudrate = configDBG_USART_BAUDRATE,
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115 .paritytype = USART_NO_PARITY,
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116 .stopbits = USART_1_STOPBIT,
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117 .channelmode = USART_MODE_NORMAL
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120 /* Initialize the USART used for the debug trace with the configured parameters. */
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121 extern volatile avr32_usart_t *volatile stdio_usart_base;
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122 stdio_usart_base = configDBG_USART;
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123 gpio_enable_module_pin(configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION);
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124 gpio_enable_module_pin(configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION);
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125 usart_init_rs232(configDBG_USART, &usart_opt, configCPU_CLOCK_HZ);
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129 /* Request initialization of data segments. */
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132 /*-----------------------------------------------------------*/
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134 /* Added as there is no such function in FreeRTOS. */
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135 void *pvPortRealloc( void *pv, size_t xWantedSize )
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141 pvReturn = realloc( pv, xWantedSize );
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147 /*-----------------------------------------------------------*/
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149 /* The cooperative scheduler requires a normal IRQ service routine to
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150 simply increment the system tick. */
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151 /* The preemptive scheduler is defined as "naked" as the full context is saved
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152 on entry as part of the context switch. */
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153 #pragma shadow_registers = full // Naked.
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154 static void vTick( void )
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156 /* Save the context of the interrupted task. */
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157 portSAVE_CONTEXT_OS_INT();
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159 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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160 clock cycles from now. */
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161 #if( configTICK_USE_TC==1 )
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162 /* Clear the interrupt flag. */
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163 AVR32_TC.channel[configTICK_TC_CHANNEL].sr;
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165 prvScheduleNextTick();
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168 /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
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169 calls in a critical section . */
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170 portENTER_CRITICAL();
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171 vTaskIncrementTick();
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172 portEXIT_CRITICAL();
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174 /* Restore the context of the "elected task". */
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175 portRESTORE_CONTEXT_OS_INT();
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177 /*-----------------------------------------------------------*/
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179 #pragma shadow_registers = full // Naked.
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180 void SCALLYield( void )
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182 /* Save the context of the interrupted task. */
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183 portSAVE_CONTEXT_SCALL();
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184 vTaskSwitchContext();
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185 portRESTORE_CONTEXT_SCALL();
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187 /*-----------------------------------------------------------*/
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189 /* The code generated by the GCC compiler uses the stack in different ways at
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190 different optimisation levels. The interrupt flags can therefore not always
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191 be saved to the stack. Instead the critical section nesting level is stored
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192 in a variable, which is then saved as part of the stack context. */
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193 void vPortEnterCritical( void )
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195 /* Disable interrupts */
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196 portDISABLE_INTERRUPTS();
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198 /* Now interrupts are disabled ulCriticalNesting can be accessed
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199 directly. Increment ulCriticalNesting to keep a count of how many times
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200 portENTER_CRITICAL() has been called. */
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201 ulCriticalNesting++;
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203 /*-----------------------------------------------------------*/
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205 void vPortExitCritical( void )
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207 if(ulCriticalNesting > portNO_CRITICAL_NESTING)
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209 ulCriticalNesting--;
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210 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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212 /* Enable all interrupt/exception. */
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213 portENABLE_INTERRUPTS();
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217 /*-----------------------------------------------------------*/
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219 /* Setup the timer to generate the tick interrupts. */
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220 static void prvSetupTimerInterrupt( void );
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221 /*-----------------------------------------------------------*/
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224 * Initialise the stack of a task to look exactly as if a call to
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225 * portSAVE_CONTEXT had been called.
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227 * See header file for description.
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229 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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231 /* Setup the initial stack of the task. The stack is set exactly as
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232 expected by the portRESTORE_CONTEXT() macro. */
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234 /* When the task starts, it will expect to find the function parameter in R12. */
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236 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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237 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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238 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A; /* R10 */
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239 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B; /* R11 */
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240 *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters; /* R12 */
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241 *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF; /* R14/LR */
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242 *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
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243 *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR; /* SR */
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244 *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF; /* R0 */
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245 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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246 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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247 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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248 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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249 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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250 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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251 *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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252 *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING; /* ulCriticalNesting */
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254 return pxTopOfStack;
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256 /*-----------------------------------------------------------*/
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258 portBASE_TYPE xPortStartScheduler( void )
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260 /* Start the timer that generates the tick ISR. Interrupts are disabled
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262 prvSetupTimerInterrupt();
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264 /* Start the first task. */
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265 portRESTORE_CONTEXT();
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267 /* Should not get here! */
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270 /*-----------------------------------------------------------*/
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272 void vPortEndScheduler( void )
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274 /* It is unlikely that the AVR32 port will require this function as there
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275 is nothing to return to. */
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277 /*-----------------------------------------------------------*/
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279 /* Schedule the COUNT&COMPARE match interrupt in (configCPU_CLOCK_HZ/configTICK_RATE_HZ)
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280 clock cycles from now. */
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281 #if( configTICK_USE_TC==0 )
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282 static void prvScheduleNextTick(void)
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284 unsigned long lCountVal, lCompareVal;
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286 lCountVal = Get_system_register(AVR32_COUNT);
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287 lCompareVal = lCountVal + (configCPU_CLOCK_HZ/configTICK_RATE_HZ);
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288 Set_system_register(AVR32_COMPARE, lCompareVal);
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291 /*-----------------------------------------------------------*/
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293 /* Setup the timer to generate the tick interrupts. */
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294 static void prvSetupTimerInterrupt(void)
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296 #if( configTICK_USE_TC==1 )
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298 volatile avr32_tc_t *tc = &AVR32_TC;
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300 // Options for waveform genration.
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301 tc_waveform_opt_t waveform_opt =
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303 .channel = configTICK_TC_CHANNEL, /* Channel selection. */
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305 .bswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOB. */
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306 .beevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOB. */
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307 .bcpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOB. */
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308 .bcpb = TC_EVT_EFFECT_NOOP, /* RB compare effect on TIOB. */
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310 .aswtrg = TC_EVT_EFFECT_NOOP, /* Software trigger effect on TIOA. */
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311 .aeevt = TC_EVT_EFFECT_NOOP, /* External event effect on TIOA. */
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312 .acpc = TC_EVT_EFFECT_NOOP, /* RC compare effect on TIOA: toggle. */
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313 .acpa = TC_EVT_EFFECT_NOOP, /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
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315 .wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
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316 .enetrg = FALSE, /* External event trigger enable. */
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317 .eevt = 0, /* External event selection. */
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318 .eevtedg = TC_SEL_NO_EDGE, /* External event edge selection. */
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319 .cpcdis = FALSE, /* Counter disable when RC compare. */
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320 .cpcstop = FALSE, /* Counter clock stopped with RC compare. */
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322 .burst = FALSE, /* Burst signal selection. */
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323 .clki = FALSE, /* Clock inversion. */
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324 .tcclks = TC_CLOCK_SOURCE_TC2 /* Internal source clock 2. */
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327 tc_interrupt_t tc_interrupt =
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341 /* Disable all interrupt/exception. */
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342 portDISABLE_INTERRUPTS();
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344 /* Register the compare interrupt handler to the interrupt controller and
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345 enable the compare interrupt. */
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347 #if( configTICK_USE_TC==1 )
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349 INTC_register_interrupt((__int_handler)&vTick, configTICK_TC_IRQ, INT0);
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351 /* Initialize the timer/counter. */
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352 tc_init_waveform(tc, &waveform_opt);
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354 /* Set the compare triggers.
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355 Remember TC counter is 16-bits, so counting second is not possible!
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356 That's why we configure it to count ms. */
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357 tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ / 4) / 1000 );
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359 tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
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361 /* Start the timer/counter. */
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362 tc_start(tc, configTICK_TC_CHANNEL);
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366 INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, INT0);
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367 prvScheduleNextTick();
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