2 FreeRTOS.org V4.2.1 - Copyright (C) 2003-2007 Richard Barry.
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4 This file is part of the FreeRTOS.org distribution.
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6 FreeRTOS.org is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 2 of the License, or
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9 (at your option) any later version.
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11 FreeRTOS.org is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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16 You should have received a copy of the GNU General Public License
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17 along with FreeRTOS.org; if not, write to the Free Software
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18 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 A special exception to the GPL can be applied should you wish to distribute
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21 a combined work that includes FreeRTOS.org, without being obliged to provide
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22 the source code for any proprietary components. See the licensing section
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23 of http://www.FreeRTOS.org for full details of how and when the exception
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26 ***************************************************************************
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27 See http://www.FreeRTOS.org for documentation, latest information, license
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28 and contact details. Please ensure to read the configuration and relevant
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29 port sections of the online documentation.
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31 Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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32 with commercial development and support options.
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33 ***************************************************************************
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36 /*-----------------------------------------------------------
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37 * Implementation of functions defined in portable.h for the Atmel ARM7 port.
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38 *----------------------------------------------------------*/
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41 /* Standard includes. */
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43 #include <intrinsic.h>
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45 /* Scheduler includes. */
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46 #include "FreeRTOS.h"
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49 /* Constants required to setup the initial stack. */
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50 #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */
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51 #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )
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53 /* Constants required to setup the PIT. */
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54 #define portPIT_CLOCK_DIVISOR ( ( unsigned portLONG ) 16 )
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55 #define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS )
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57 /* Constants required to handle critical sections. */
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58 #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 )
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61 #define portINT_LEVEL_SENSITIVE 0
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62 #define portPIT_ENABLE ( ( unsigned portSHORT ) 0x1 << 24 )
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63 #define portPIT_INT_ENABLE ( ( unsigned portSHORT ) 0x1 << 25 )
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64 /*-----------------------------------------------------------*/
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66 /* Setup the PIT to generate the tick interrupts. */
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67 static void prvSetupTimerInterrupt( void );
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69 /* ulCriticalNesting will get set to zero when the first task starts. It
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70 cannot be initialised to 0 as this will cause interrupts to be enabled
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71 during the kernel initialisation process. */
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72 unsigned portLONG ulCriticalNesting = ( unsigned portLONG ) 9999;
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74 /*-----------------------------------------------------------*/
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77 * Initialise the stack of a task to look exactly as if a call to
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78 * portSAVE_CONTEXT had been called.
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80 * See header file for description.
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82 portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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84 portSTACK_TYPE *pxOriginalTOS;
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86 pxOriginalTOS = pxTopOfStack;
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88 /* Setup the initial stack of the task. The stack is set exactly as
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89 expected by the portRESTORE_CONTEXT() macro. */
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91 /* First on the stack is the return address - which in this case is the
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92 start of the task. The offset is added to make the return address appear
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93 as it would within an IRQ ISR. */
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94 *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;
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97 *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */
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99 *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
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101 *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */
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103 *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */
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105 *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */
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107 *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */
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109 *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */
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111 *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */
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113 *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */
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115 *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */
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117 *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */
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119 *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */
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121 *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */
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123 *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */
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126 /* When the task starts is will expect to find the function parameter in
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128 *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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131 /* The status register is set for system mode, with interrupts enabled. */
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132 *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;
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135 /* Interrupt flags cannot always be stored on the stack and will
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136 instead be stored in a variable, which is then saved as part of the
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138 *pxTopOfStack = portNO_CRITICAL_NESTING;
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140 return pxTopOfStack;
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142 /*-----------------------------------------------------------*/
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144 portBASE_TYPE xPortStartScheduler( void )
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146 extern void vPortStartFirstTask( void );
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148 /* Start the timer that generates the tick ISR. Interrupts are disabled
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150 prvSetupTimerInterrupt();
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152 /* Start the first task. */
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153 vPortStartFirstTask();
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155 /* Should not get here! */
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158 /*-----------------------------------------------------------*/
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160 void vPortEndScheduler( void )
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162 /* It is unlikely that the ARM port will require this function as there
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163 is nothing to return to. */
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165 /*-----------------------------------------------------------*/
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167 #if configUSE_PREEMPTION == 0
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169 /* The cooperative scheduler requires a normal IRQ service routine to
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170 simply increment the system tick. */
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171 static __arm __irq void vPortNonPreemptiveTick( void );
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172 static __arm __irq void vPortNonPreemptiveTick( void )
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174 unsigned portLONG ulDummy;
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176 /* Increment the tick count - which may wake some tasks but as the
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177 preemptive scheduler is not being used any woken task is not given
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178 processor time no matter what its priority. */
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179 vTaskIncrementTick();
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181 /* Clear the PIT interrupt. */
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182 ulDummy = AT91C_BASE_PITC->PITC_PIVR;
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184 /* End the interrupt in the AIC. */
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185 AT91C_BASE_AIC->AIC_EOICR = ulDummy;
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190 /* Currently the IAR port requires the preemptive tick function to be
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191 defined in an asm file. */
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195 /*-----------------------------------------------------------*/
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197 static void prvSetupTimerInterrupt( void )
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199 AT91PS_PITC pxPIT = AT91C_BASE_PITC;
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201 /* Setup the AIC for PIT interrupts. The interrupt routine chosen depends
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202 on whether the preemptive or cooperative scheduler is being used. */
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203 #if configUSE_PREEMPTION == 0
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205 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortNonPreemptiveTick );
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209 extern void ( vPortPreemptiveTick )( void );
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210 AT91F_AIC_ConfigureIt( AT91C_BASE_AIC, AT91C_ID_SYS, AT91C_AIC_PRIOR_HIGHEST, portINT_LEVEL_SENSITIVE, ( void (*)(void) ) vPortPreemptiveTick );
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214 /* Configure the PIT period. */
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215 pxPIT->PITC_PIMR = portPIT_ENABLE | portPIT_INT_ENABLE | portPIT_COUNTER_VALUE;
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217 /* Enable the interrupt. Global interrupts are disables at this point so
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219 AT91F_AIC_EnableIt( AT91C_BASE_AIC, AT91C_ID_SYS );
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221 /*-----------------------------------------------------------*/
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223 void vPortEnterCritical( void )
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225 /* Disable interrupts first! */
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226 __disable_interrupt();
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228 /* Now interrupts are disabled ulCriticalNesting can be accessed
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229 directly. Increment ulCriticalNesting to keep a count of how many times
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230 portENTER_CRITICAL() has been called. */
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231 ulCriticalNesting++;
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233 /*-----------------------------------------------------------*/
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235 void vPortExitCritical( void )
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237 if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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239 /* Decrement the nesting count as we are leaving a critical section. */
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240 ulCriticalNesting--;
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242 /* If the nesting level has reached zero then interrupts should be
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244 if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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246 __enable_interrupt();
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250 /*-----------------------------------------------------------*/
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